{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:26:10Z","timestamp":1750220770386,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":38,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,6,29]],"date-time":"2020-06-29T00:00:00Z","timestamp":1593388800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"NSF","award":["CCF-1823403"],"award-info":[{"award-number":["CCF-1823403"]}]},{"DOI":"10.13039\/100014718","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1912617"],"award-info":[{"award-number":["CCF-1912617"]}],"id":[{"id":"10.13039\/100014718","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2902"],"award-info":[{"award-number":["2902"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"name":"NSF2","award":["I\/UCRC-1439722"],"award-info":[{"award-number":["I\/UCRC-1439722"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,6,29]]},"DOI":"10.1145\/3392717.3392735","type":"proceedings-article","created":{"date-parts":[[2020,6,29]],"date-time":"2020-06-29T18:49:02Z","timestamp":1593456542000},"page":"1-12","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["SB-Fetch"],"prefix":"10.1145","author":[{"given":"Laith M.","family":"AlBarakat","sequence":"first","affiliation":[{"name":"Texas A&M University"}]},{"given":"Paul V.","family":"Gratz","sequence":"additional","affiliation":[{"name":"Texas A&M University"}]},{"given":"Daniel A.","family":"Jim\u00e9nez","sequence":"additional","affiliation":[{"name":"Texas A&M University"}]}],"member":"320","published-online":{"date-parts":[[2020,6,29]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Alaa Alameldeen Zeshan Chishti Aamer Jaleel Daniel Luchi and Chris Wilkerson. 2015. The Second Data Prefetching Championship (DPC-2).  Alaa Alameldeen Zeshan Chishti Aamer Jaleel Daniel Luchi and Chris Wilkerson. 2015. The Second Data Prefetching Championship (DPC-2)."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2018.2847345"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/6513.6514"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.381947"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165146"},{"volume-title":"Alpha Architecture Handbook","key":"e_1_3_2_1_10_1","unstructured":"Digital. 1992. Alpha Architecture Handbook . Digital Press . https:\/\/books.google.com\/books?id=JmoiAQAAMAAJ Digital. 1992. Alpha Architecture Handbook. Digital Press. https:\/\/books.google.com\/books?id=JmoiAQAAMAAJ"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628093"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749726"},{"key":"e_1_3_2_1_13_1","volume-title":"Amdahl's law in the multicore era. Computer 41, 7","author":"Hill Mark D","year":"2008","unstructured":"Mark D Hill and Michael R Marty . 2008. Amdahl's law in the multicore era. Computer 41, 7 ( 2008 ). Mark D Hill and Michael R Marty. 2008. Amdahl's law in the multicore era. Computer 41, 7 (2008)."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024406"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2304576.2304614"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2017.16"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"crossref","unstructured":"Akanksha Jain and Calvin Lin. 2013. Linearizing irregular memory accesses for improved correlated prefetching.. In MICRO. 247--259.  Akanksha Jain and Calvin Lin. 2013. Linearizing irregular memory accesses for improved correlated prefetching.. In MICRO. 247--259.","DOI":"10.1145\/2540708.2540730"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2006.1620802"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.29"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.82"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783763"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/264107.264206"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.44"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/2890505"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995715"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.14"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446087"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1998.694773"},{"volume-title":"High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings. The Ninth International Symposium on. 129--140","author":"Mutlu O.","key":"e_1_3_2_1_30_1","unstructured":"O. Mutlu , J. Stark , C. Wilkerson , and Y. N. Patt . 2003. Runahead execution: an alternative to very large instruction windows for out-of-order processors . In High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings. The Ninth International Symposium on. 129--140 . O. Mutlu, J. Stark, C. Wilkerson, and Y. N. Patt. 2003. Runahead execution: an alternative to very large instruction windows for out-of-order processors. In High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings. The Ninth International Symposium on. 129--140."},{"volume-title":"2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT). 485--485","author":"Panda B.","key":"e_1_3_2_1_31_1","unstructured":"B. Panda and S. Balachandran . 2012. Hardware prefetchers for emerging parallel applications . In 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT). 485--485 . B. Panda and S. Balachandran. 2012. Hardware prefetchers for emerging parallel applications. In 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT). 485--485."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2014.092"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2011.33"},{"key":"e_1_3_2_1_34_1","unstructured":"Seth H Pugsley Alaa Alameldeen and Chris Wilkerson. 2009. The First Data Prefetching Championship (DPC-1).  Seth H Pugsley Alaa Alameldeen and Chris Wilkerson. 2009. The First Data Prefetching Championship (DPC-1)."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830793"},{"key":"e_1_3_2_1_36_1","volume-title":"Sequential Program Prefetching in Memory Hierarchies. Computer 11 (December","author":"Smith A. J.","year":"1978","unstructured":"A. J. Smith . 1978. Sequential Program Prefetching in Memory Hierarchies. Computer 11 (December 1978 ), 7--21. Issue 12. A. J. Smith. 1978. Sequential Program Prefetching in Memory Hierarchies. Computer 11 (December 1978), 7--21. Issue 12."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555766"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2006.38"},{"key":"e_1_3_2_1_39_1","volume-title":"Parboil: A Revised Benchmark Suite for Scientific and Commercial Throughput Computing.","author":"Stratton John A.","year":"2012","unstructured":"John A. Stratton , Christopher I. Rodrigues , I- Jui Sung , Nady Obeid , Li-Wen Chang , Nasser Anssari , Geng Liu , and Wen mei W. Hwu . 2012 . Parboil: A Revised Benchmark Suite for Scientific and Commercial Throughput Computing. John A. Stratton, Christopher I. Rodrigues, I-Jui Sung, Nady Obeid, Li-Wen Chang, Nasser Anssari, Geng Liu, and Wen mei W. Hwu. 2012. Parboil: A Revised Benchmark Suite for Scientific and Commercial Throughput Computing."},{"key":"e_1_3_2_1_40_1","volume-title":"Proceedings of the 2nd USENIX Conference on Hot Topics in Parallelism (HOTPAR'10)","author":"Zhou Xiaocheng","year":"2010","unstructured":"Xiaocheng Zhou , Hu Chen , Sai Luo , Ying Gao , Shoumeng Yan , Wei Liu , Brian Lewis , and Bratin Saha . 2010 . A Case for Software Managed Coherence in Many-core Processors . Proceedings of the 2nd USENIX Conference on Hot Topics in Parallelism (HOTPAR'10) (06 2010). Xiaocheng Zhou, Hu Chen, Sai Luo, Ying Gao, Shoumeng Yan, Wei Liu, Brian Lewis, and Bratin Saha. 2010. A Case for Software Managed Coherence in Many-core Processors. Proceedings of the 2nd USENIX Conference on Hot Topics in Parallelism (HOTPAR'10) (06 2010)."}],"event":{"name":"ICS '20: 2020 International Conference on Supercomputing","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Barcelona Spain","acronym":"ICS '20"},"container-title":["Proceedings of the 34th ACM International Conference on Supercomputing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3392717.3392735","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3392717.3392735","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3392717.3392735","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:41:15Z","timestamp":1750200075000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3392717.3392735"}},"subtitle":["synchronization aware hardware prefetching for chip multiprocessors"],"short-title":[],"issued":{"date-parts":[[2020,6,29]]},"references-count":38,"alternative-id":["10.1145\/3392717.3392735","10.1145\/3392717"],"URL":"https:\/\/doi.org\/10.1145\/3392717.3392735","relation":{},"subject":[],"published":{"date-parts":[[2020,6,29]]},"assertion":[{"value":"2020-06-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}