{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T05:21:04Z","timestamp":1755926464415,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":48,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,6,29]],"date-time":"2020-06-29T00:00:00Z","timestamp":1593388800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,6,29]]},"DOI":"10.1145\/3392717.3392738","type":"proceedings-article","created":{"date-parts":[[2020,6,29]],"date-time":"2020-06-29T18:49:02Z","timestamp":1593456542000},"page":"1-13","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["AMOEBA"],"prefix":"10.1145","author":[{"given":"Xianwei","family":"Cheng","sequence":"first","affiliation":[{"name":"University of North Texas"}]},{"given":"Hui","family":"Zhao","sequence":"additional","affiliation":[{"name":"University of North Texas"}]},{"given":"Mahmut","family":"Kandemir","sequence":"additional","affiliation":[{"name":"Pensylvania State University"}]},{"given":"Beilei","family":"Jiang","sequence":"additional","affiliation":[{"name":"University of North Texas"}]},{"given":"Gayatri","family":"Mehta","sequence":"additional","affiliation":[{"name":"University of North Texas"}]}],"member":"320","published-online":{"date-parts":[[2020,6,29]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Proceedings of the 18th HPCA.","author":"Adriaens J. T.","year":"2012","unstructured":"J. T. Adriaens , K. compton, N. S. Kim , and M. J. schutle. 2012 . The case for GPGPU spatial mutlitasking . In Proceedings of the 18th HPCA. J. T. Adriaens, K. compton, N. S. Kim, and M. J. schutle. 2012. The case for GPGPU spatial mutlitasking. In Proceedings of the 18th HPCA."},{"key":"e_1_3_2_1_2_1","unstructured":"Amazon 2010. Amazon Web Service. https:\/\/aws.amazon.com\/ec2.  Amazon 2010. Amazon Web Service. https:\/\/aws.amazon.com\/ec2."},{"volume-title":"Proceedings of the 32nd International Symposium on Computer Architecture.","author":"Annavaram M.","key":"e_1_3_2_1_3_1","unstructured":"M. Annavaram , E. Grochowski , and J. Shen . 2005. Mitigating amdahl's Law through epi throttling . In Proceedings of the 32nd International Symposium on Computer Architecture. M. Annavaram, E. Grochowski, and J. Shen. 2005. Mitigating amdahl's Law through epi throttling. In Proceedings of the 32nd International Symposium on Computer Architecture."},{"volume-title":"Proceedings of 43rd Annual IEEE\/ACM International Symposium on Microarchitecture.","author":"Bakhoda Ali","key":"e_1_3_2_1_4_1","unstructured":"Ali Bakhoda , John Kim , and Tor M. Aamodt . 2010. Throughput-Effective On-Chip Networks for Manycore Accelerators . In Proceedings of 43rd Annual IEEE\/ACM International Symposium on Microarchitecture. Ali Bakhoda, John Kim, and Tor M. Aamodt. 2010. Throughput-Effective On-Chip Networks for Manycore Accelerators. In Proceedings of 43rd Annual IEEE\/ACM International Symposium on Microarchitecture."},{"volume-title":"IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).","author":"Bakhoda Ali","key":"e_1_3_2_1_5_1","unstructured":"Ali Bakhoda , George L. Yuan , Wilson W. L. Fung , Henry Wong , and Tor M. Aamodt . 2009. Analyzing CUDA workloads using a detailed GPU simulator . In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, Henry Wong, and Tor M. Aamodt. 2009. Analyzing CUDA workloads using a detailed GPU simulator. In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)."},{"volume-title":"IEEE International Symposium on Performance Analysis of Systems and Software.","author":"Bakhoda A.","key":"e_1_3_2_1_6_1","unstructured":"A. Bakhoda , G. L. Yuan , W. W. L. Fung , H. Wong , and T. M. Aamodt . 2009. Analyzing CUDA workloads using a detailed GPU simulator . In IEEE International Symposium on Performance Analysis of Systems and Software. A. Bakhoda, G. L. Yuan, W. W. L. Fung, H. Wong, and T. M. Aamodt. 2009. Analyzing CUDA workloads using a detailed GPU simulator. In IEEE International Symposium on Performance Analysis of Systems and Software."},{"volume-title":"Proceedings of the 32nd International Symposium on Computer Architecture.","author":"Balakrishnan R.","key":"e_1_3_2_1_7_1","unstructured":"R. Balakrishnan , R. Rajwar , M. Upton , and K. Lai . 2005. The Impact of Performance Asymmetry in Emerging Multicore Architectures . In Proceedings of the 32nd International Symposium on Computer Architecture. R. Balakrishnan, R. Rajwar, M. Upton, and K. Lai. 2005. The Impact of Performance Asymmetry in Emerging Multicore Architectures. In Proceedings of the 32nd International Symposium on Computer Architecture."},{"volume-title":"Proceedings of Euromicro Conference on Real-Time Systems.","author":"Kang C.","key":"e_1_3_2_1_8_1","unstructured":"C. basaran and K. D. Kang . 2012. Supporting preemptive task executions and memory copies in GPGPUs . In Proceedings of Euromicro Conference on Real-Time Systems. C. basaran and K. D. Kang. 2012. Supporting preemptive task executions and memory copies in GPGPUs. In Proceedings of Euromicro Conference on Real-Time Systems."},{"key":"e_1_3_2_1_9_1","volume-title":"ACM Transations on Architecture and Code Optimization","volume":"0","author":"G. V. D. Braak and H. Corp","unstructured":"G. V. D. Braak and H. Corp oraal . 2015. R-GPU: a Reconfigurable GPU Architecture . In ACM Transations on Architecture and Code Optimization , Vol. 0 , No. 0, Article 0. G. V. D. Braak and H. Corporaal. 2015. R-GPU: a Reconfigurable GPU Architecture. In ACM Transations on Architecture and Code Optimization, Vol.0, No. 0, Article 0."},{"volume-title":"IEEE International Symposium on Workload Characterization (IISWC).","author":"Che S.","key":"e_1_3_2_1_10_1","unstructured":"S. Che , M. Boyer , J. Meng , D. Tarjan , J. W. Sheaffer , S. Lee , and K. Skadron . 2009. Rodinia: A benchmark suite for heterogeneous computing . In IEEE International Symposium on Workload Characterization (IISWC). S. Che, M. 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In Proceedings of 40th International symposium on Microarchitecture. W. W. L. Fung, I. Sham, G. Yuan, and T. M. Aamodt. 2007. Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow. In Proceedings of 40th International symposium on Microarchitecture."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"crossref","unstructured":"S. Grauer-Gray L. Xu R. Searles S. Ayalasomayajula and J. Cavazos. 2012. Auto-tuning a high-level language targeted to GPU codes. In Innovative Parallel Computing (InPar).  S. Grauer-Gray L. Xu R. Searles S. Ayalasomayajula and J. Cavazos. 2012. Auto-tuning a high-level language targeted to GPU codes. In Innovative Parallel Computing (InPar).","DOI":"10.1109\/InPar.2012.6339595"},{"key":"e_1_3_2_1_15_1","unstructured":"Green500 2016. Green500 list. https:\/\/www.top500.org\/green500\/lists\/2016\/11.  Green500 2016. Green500 list. https:\/\/www.top500.org\/green500\/lists\/2016\/11."},{"key":"e_1_3_2_1_16_1","unstructured":"P. Greenhalgh. 2011. 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Han and T. S. Abdelrahman . 2011. Reducing Branch Divergence in GPU Programs . In Proceedings of GPGPU-4 workshop. T. D. Han and T. S. Abdelrahman. 2011. Reducing Branch Divergence in GPU Programs. In Proceedings of GPGPU-4 workshop."},{"volume-title":"International Conference on Parallel Architectures and Compilation Techniques (PACT).","author":"He B.","key":"e_1_3_2_1_20_1","unstructured":"B. He , W. Fang , Q. Luo , N. K. Govindaraju , and T. Wang . 2008. Mars: A MapReduce Framework on graphics processors . In International Conference on Parallel Architectures and Compilation Techniques (PACT). B. He, W. Fang, Q. Luo, N. K. Govindaraju, and T. Wang. 2008. Mars: A MapReduce Framework on graphics processors. In International Conference on Parallel Architectures and Compilation Techniques (PACT)."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"crossref","unstructured":"M. Hill and M. Marty. 2008. Amdahl's Law in the Multicore Era. In IEEE Computer 41(7).  M. Hill and M. Marty. 2008. Amdahl's Law in the Multicore Era. In IEEE Computer 41(7).","DOI":"10.1109\/MC.2008.209"},{"volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA).","author":"Ipek Engin","key":"e_1_3_2_1_22_1","unstructured":"Engin Ipek , Meyrem Kirman , Nevin Kirman , and Jose F. Martinez . 2007. Core Fusion: Accommodating Software Diversity in Chip Multiprocessors . In Proceedings of the International Symposium on Computer Architecture (ISCA). Engin Ipek, Meyrem Kirman, Nevin Kirman, and Jose F. Martinez. 2007. Core Fusion: Accommodating Software Diversity in Chip Multiprocessors. In Proceedings of the International Symposium on Computer Architecture (ISCA)."},{"key":"e_1_3_2_1_23_1","first-page":"1","article-title":"Optimizing energy consumption in GPUS through feedback-driven CTA scheduling","volume":"2017","author":"Jadidi A.","year":"2017","unstructured":"A. Jadidi , M. Arjomand , M. Kandemir , and C. Das . 2017 . Optimizing energy consumption in GPUS through feedback-driven CTA scheduling . In Proceedings of SpringSim (HPC) 2017 : 12: 1 -- 12 :12. A. Jadidi, M. Arjomand, M. Kandemir, and C. Das. 2017. Optimizing energy consumption in GPUS through feedback-driven CTA scheduling. In Proceedings of SpringSim (HPC) 2017: 12:1--12:12.","journal-title":"Proceedings of SpringSim (HPC)"},{"volume-title":"Proceedings of the 2011 USENIX conference on USENIX annual technical conference.","author":"Kato S.","key":"e_1_3_2_1_24_1","unstructured":"S. Kato , K. Lakshmanan , R. R. Rajkumar , and Y. Ishikawa . 2011. TimeGraph: GPU scheduling for real-time multi-tasking environments . In Proceedings of the 2011 USENIX conference on USENIX annual technical conference. S. Kato, K. Lakshmanan, R. R. Rajkumar, and Y. Ishikawa. 2011. TimeGraph: GPU scheduling for real-time multi-tasking environments. In Proceedings of the 2011 USENIX conference on USENIX annual technical conference."},{"volume-title":"Proceedings fo the International Symposium on Microarchitecture.","author":"Kim C.","key":"e_1_3_2_1_25_1","unstructured":"C. Kim , S. Sethumadhavan , M. S. Govindan , N. Ranganathan , D. Gulati , D. Burger , and S. W. Keckler . 2007. Composable lightweight processors . In Proceedings fo the International Symposium on Microarchitecture. C. Kim, S. Sethumadhavan, M. S. Govindan, N. Ranganathan, D. Gulati, D. Burger, and S. W. Keckler. 2007. Composable lightweight processors. In Proceedings fo the International Symposium on Microarchitecture."},{"volume-title":"Proceedings of the International Symposium on Microarchitecture.","author":"Kumar Rakesh","key":"e_1_3_2_1_26_1","unstructured":"Rakesh Kumar , Keith I. Farkas , Norman P. Jouppi , Parthasarathy Ranganathan , and Dean M. Tullsen . 2003. Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction . In Proceedings of the International Symposium on Microarchitecture. Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, and Dean M. Tullsen. 2003. Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction. In Proceedings of the International Symposium on Microarchitecture."},{"volume-title":"Proceedings of HPCA.","author":"Lieberman S. A.","key":"e_1_3_2_1_27_1","unstructured":"S. A. Lieberman and S. A. Mahlke . 2007. Extending multicore architectures to exploit hybrid parallelism in single-thread applications . In Proceedings of HPCA. S. A. Lieberman and S. A. Mahlke. 2007. Extending multicore architectures to exploit hybrid parallelism in single-thread applications. In Proceedings of HPCA."},{"key":"e_1_3_2_1_28_1","volume-title":"Computer","author":"Luebke David","year":"2007","unstructured":"David Luebke and Greg Humphreys . 2007. How GPUs work . In Computer ( Volume : 40, Issue : 2, Feb. 2007 ). David Luebke and Greg Humphreys. 2007. How GPUs work. In Computer (Volume: 40, Issue: 2, Feb. 2007)."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.37"},{"volume-title":"Proceedings of International Symposium on Computer Architecture.","author":"Mai K.","key":"e_1_3_2_1_30_1","unstructured":"K. Mai , T. Paaske , N. Jayasena , R. Ho , W. J. Dally , and M. Horowitz . 2000. Smart Memories: a modular reconfigurable architecture . In Proceedings of International Symposium on Computer Architecture. K. Mai, T. Paaske, N. Jayasena, R. Ho, W. J. Dally, and M. Horowitz. 2000. Smart Memories: a modular reconfigurable architecture. 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ELF: Maximizing memory level parallelism for GPUs with coordinated warp and fetch scheduling . In Proceedings of SC15 . J. J. K. Park, Y. Park, and S. Mahlke. 2015. ELF: Maximizing memory level parallelism for GPUs with coordinated warp and fetch scheduling. In Proceedings of SC15."},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898031"},{"volume-title":"Proceedings of ISCA.","author":"Rogers T.","key":"e_1_3_2_1_39_1","unstructured":"T. Rogers , D. R. Johnson , M. O'Connor , and S. W. Keckler . 2015. A Variable Warp Size Architecture . In Proceedings of ISCA. T. Rogers, D. R. Johnson, M. O'Connor, and S. W. Keckler. 2015. A Variable Warp Size Architecture. In Proceedings of ISCA."},{"volume-title":"Proceedings of the 23rd ACM Symposium on Operating System Principles.","author":"Rossback C. J.","key":"e_1_3_2_1_40_1","unstructured":"C. J. Rossback , J. currey, M. silberstein, B. Ray , and E. Witchel . 2011. PTask: Operating system abstrations to manage GPUs as compute devices . In Proceedings of the 23rd ACM Symposium on Operating System Principles. C. J. Rossback, J. currey, M. silberstein, B. Ray, and E. Witchel. 2011. PTask: Operating system abstrations to manage GPUs as compute devices. In Proceedings of the 23rd ACM Symposium on Operating System Principles."},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.873611"},{"volume-title":"Proceedings of International Symposium on Computer Architecture.","author":"K.","key":"e_1_3_2_1_42_1","unstructured":"K. sankaralingam, R. Nagarajan , H. Liu , C. Kim , J. Huh , D. Burger , S. W. Keckler , and C. R. Moore . 2003. Exploiting ILP, TLP and DLPP with the polymorphous TRIPS architecture . In Proceedings of International Symposium on Computer Architecture. K. sankaralingam, R. Nagarajan, H. Liu, C. Kim, J. Huh, D. Burger, S. W. Keckler, and C. R. Moore. 2003. Exploiting ILP, TLP and DLPP with the polymorphous TRIPS architecture. In Proceedings of International Symposium on Computer Architecture."},{"volume-title":"Proceedings of ASPLOS.","author":"Suleman M. A.","key":"e_1_3_2_1_43_1","unstructured":"M. A. Suleman , O. Mutlu , M. K. Qureshi , and Y. N. Patt . 2009. Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures . In Proceedings of ASPLOS. M. A. Suleman, O. Mutlu, M. K. Qureshi, and Y. N. Patt. 2009. Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures. In Proceedings of ASPLOS."},{"key":"e_1_3_2_1_44_1","unstructured":"Top500 2016. Top500 list. https:\/\/www.top500.org\/lists\/2016\/11.  Top500 2016. Top500 list. https:\/\/www.top500.org\/lists\/2016\/11."},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665703"},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00030"},{"volume-title":"Proceedings of IEEE International Symposium on High Performance Computer Architecture (HPCA).","author":"Wang Z.","key":"e_1_3_2_1_47_1","unstructured":"Z. Wang , J. Yang , R. Melhem , B. Childers , Y. Zhang , and M. Guo . 2016. Simultaneous Multikernel GPU: Multi-tasking Throughtput Processors via Fine-Grained Sharing . In Proceedings of IEEE International Symposium on High Performance Computer Architecture (HPCA). Z. Wang, J. Yang, R. Melhem, B. Childers, Y. Zhang, and M. Guo. 2016. Simultaneous Multikernel GPU: Multi-tasking Throughtput Processors via Fine-Grained Sharing. In Proceedings of IEEE International Symposium on High Performance Computer Architecture (HPCA)."},{"volume-title":"Proceedings of the 43rd Annual International Symposium on Computer Architecture.","author":"Xu Q.","key":"e_1_3_2_1_48_1","unstructured":"Q. Xu , H. Jeon , K. Kim , W. W. Ro , and M. Annavaram . 2016. Warped-slicer: Efficient intra-SM slicing through dynamic resource partitioning for GPU multiprogramming . In Proceedings of the 43rd Annual International Symposium on Computer Architecture. Q. Xu, H. Jeon, K. Kim, W. W. Ro, and M. Annavaram. 2016. Warped-slicer: Efficient intra-SM slicing through dynamic resource partitioning for GPU multiprogramming. In Proceedings of the 43rd Annual International Symposium on Computer Architecture."}],"event":{"name":"ICS '20: 2020 International Conference on Supercomputing","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Barcelona Spain","acronym":"ICS '20"},"container-title":["Proceedings of the 34th ACM International Conference on Supercomputing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3392717.3392738","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3392717.3392738","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:41:15Z","timestamp":1750200075000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3392717.3392738"}},"subtitle":["a coarse grained reconfigurable architecture for dynamic GPU scaling"],"short-title":[],"issued":{"date-parts":[[2020,6,29]]},"references-count":48,"alternative-id":["10.1145\/3392717.3392738","10.1145\/3392717"],"URL":"https:\/\/doi.org\/10.1145\/3392717.3392738","relation":{},"subject":[],"published":{"date-parts":[[2020,6,29]]},"assertion":[{"value":"2020-06-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}