{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,21]],"date-time":"2026-05-21T15:13:55Z","timestamp":1779376435866,"version":"3.53.1"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2021,1,18]],"date-time":"2021-01-18T00:00:00Z","timestamp":1610928000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2021,1,18]]},"DOI":"10.1145\/3394885.3431524","type":"proceedings-article","created":{"date-parts":[[2021,1,29]],"date-time":"2021-01-29T11:32:48Z","timestamp":1611919968000},"page":"120-125","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["RIME"],"prefix":"10.1145","author":[{"given":"Zhaojun","family":"Lu","sequence":"first","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Md Tanvir","family":"Arafin","sequence":"additional","affiliation":[{"name":"Morgan State University, Baltimore, Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Gang","family":"Qu","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2021,1,29]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593158"},{"key":"e_1_3_2_1_2_1","volume-title":"Asic Implementation of Efficient Floating Point Multiplier. In 2018 4th International Conference on Electrical Energy Systems (ICEES). IEEE, 138--141","author":"Anuhya Pasupuleti","year":"2018","unstructured":"Pasupuleti Anuhya and R Dhanabal . 2018 . Asic Implementation of Efficient Floating Point Multiplier. In 2018 4th International Conference on Electrical Energy Systems (ICEES). IEEE, 138--141 . Pasupuleti Anuhya and R Dhanabal. 2018. Asic Implementation of Efficient Floating Point Multiplier. In 2018 4th International Conference on Electrical Energy Systems (ICEES). IEEE, 138--141."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927095"},{"key":"e_1_3_2_1_4_1","volume-title":"Memristive'switches enable 'stateful'logic operations via material implication. Nature 464, 7290","author":"Borghetti Julien","year":"2010","unstructured":"Julien Borghetti , Gregory S Snider , Philip J Kuekes , J Joshua Yang , Duncan R Stewart , and R Stanley Williams . 2010. ' Memristive'switches enable 'stateful'logic operations via material implication. Nature 464, 7290 ( 2010 ), 873. Julien Borghetti, Gregory S Snider, Philip J Kuekes, J Joshua Yang, Duncan R Stewart, and R Stanley Williams. 2010. 'Memristive'switches enable 'stateful'logic operations via material implication. Nature 464, 7290 (2010), 873."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446095"},{"key":"e_1_3_2_1_6_1","volume-title":"Prime: A novel processing-in-memory architecture for neural network computation in reram-based main memory. In ACM SIGARCH Computer Architecture News","author":"Chi Ping","year":"2016","unstructured":"Ping Chi , Shuangchen Li , Cong Xu , Tao Zhang , Jishen Zhao , Yongpan Liu , Yu Wang , and Yuan Xie . 2016 . Prime: A novel processing-in-memory architecture for neural network computation in reram-based main memory. In ACM SIGARCH Computer Architecture News , Vol. 44 . IEEE Press , 27--39. Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, and Yuan Xie. 2016. Prime: A novel processing-in-memory architecture for neural network computation in reram-based main memory. In ACM SIGARCH Computer Architecture News, Vol. 44. IEEE Press, 27--39."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00039"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240811"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351561"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3307650.3322237"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062337"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVDAT.2015.7208143"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2357292"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2433536"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2016.2570248"},{"key":"e_1_3_2_1_18_1","volume-title":"TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. In 2020 57th ACM\/IEEE Design Automation Conference (DAC). IEEE, 1--6.","author":"Wang Xueyan","year":"2020","unstructured":"Xueyan Wang , Jianlei Yang , Yinglin Zhao , Yingjie Qi , Meichen Liu , Xingzhou Cheng , Xiaotao Jia , Xiaoming Chen , Gang Qu , and Weisheng Zhao . 2020 . TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. In 2020 57th ACM\/IEEE Design Automation Conference (DAC). IEEE, 1--6. Xueyan Wang, Jianlei Yang, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu, and Weisheng Zhao. 2020. TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. In 2020 57th ACM\/IEEE Design Automation Conference (DAC). IEEE, 1--6."},{"key":"e_1_3_2_1_19_1","volume-title":"Memristive devices for computing. Nature nanotechnology 8, 1","author":"Yang J Joshua","year":"2013","unstructured":"J Joshua Yang , Dmitri B Strukov , and Duncan R Stewart . 2013. Memristive devices for computing. Nature nanotechnology 8, 1 ( 2013 ), 13. J Joshua Yang, Dmitri B Strukov, and Duncan R Stewart. 2013. Memristive devices for computing. Nature nanotechnology 8, 1 (2013), 13."}],"event":{"name":"ASPDAC '21: 26th Asia and South Pacific Design Automation Conference","location":"Tokyo Japan","acronym":"ASPDAC '21","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CEDA"]},"container-title":["Proceedings of the 26th Asia and South Pacific Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3394885.3431524","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3394885.3431524","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T21:32:02Z","timestamp":1750195922000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3394885.3431524"}},"subtitle":["A Scalable and Energy-Efficient Processing-In-Memory Architecture for Floating-Point Operations"],"short-title":[],"issued":{"date-parts":[[2021,1,18]]},"references-count":19,"alternative-id":["10.1145\/3394885.3431524","10.1145\/3394885"],"URL":"https:\/\/doi.org\/10.1145\/3394885.3431524","relation":{},"subject":[],"published":{"date-parts":[[2021,1,18]]},"assertion":[{"value":"2021-01-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}