{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,9]],"date-time":"2025-12-09T11:36:27Z","timestamp":1765280187121,"version":"3.41.0"},"reference-count":57,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2020,8,27]],"date-time":"2020-08-27T00:00:00Z","timestamp":1598486400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61602022 and 61701013"],"award-info":[{"award-number":["61602022 and 61701013"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"name":"National Key Technology Program of China","award":["2017ZX01032101"],"award-info":[{"award-number":["2017ZX01032101"]}]},{"DOI":"10.13039\/501100011347","name":"State Key Laboratory of Software Development Environment","doi-asserted-by":"crossref","award":["SKLSDE-2018ZX-07"],"award-info":[{"award-number":["SKLSDE-2018ZX-07"]}],"id":[{"id":"10.13039\/501100011347","id-type":"DOI","asserted-by":"crossref"}]},{"name":"State Key Laboratory of Computer Architecture","award":["CARCH-201917"],"award-info":[{"award-number":["CARCH-201917"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2020,10,31]]},"abstract":"<jats:p>\n            Computing-in-memory (CIM) is proposed to alleviate the processor-memory data transfer bottleneck in traditional von Neumann architectures, and spintronics-based magnetic memory has demonstrated many facilitation in implementing CIM paradigm. Since hardware security has become one of the major concerns in circuit designs, this article, for the first time, investigates spin-based computing-in-memory (SpinCIM) from a security perspective.\n            <jats:italic>We focus on two fundamental questions:<\/jats:italic>\n            (1) How can the new SpinCIM computing paradigm be exploited to enhance hardware security?; (2) What security concerns has this new SpinCIM computing paradigm incurred?\n          <\/jats:p>","DOI":"10.1145\/3397513","type":"journal-article","created":{"date-parts":[[2020,7,7]],"date-time":"2020-07-07T12:38:34Z","timestamp":1594125514000},"page":"1-18","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Hardware Security in Spin-based Computing-in-memory"],"prefix":"10.1145","volume":"16","author":[{"given":"Xueyan","family":"Wang","sequence":"first","affiliation":[{"name":"Beihang University, Haidian District, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8424-7040","authenticated-orcid":false,"given":"Jienlei","family":"Yang","sequence":"additional","affiliation":[{"name":"Beihang University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yinglin","family":"Zhao","sequence":"additional","affiliation":[{"name":"Beihang University, Haidian District, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaotao","family":"Jia","sequence":"additional","affiliation":[{"name":"Beihang University, Haidian District, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gang","family":"Qu","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, MD, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weisheng","family":"Zhao","sequence":"additional","affiliation":[{"name":"Beihang University, Haidian District, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2020,8,27]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/977091.977115"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-018-03140-z"},{"volume-title":"Proceedings of the IEEE International Solid State Circuits Conference (ISSCC\u201918)","author":"Dong Q.","key":"e_1_2_1_3_1","unstructured":"Q. Dong , Z. Wang , J. Lim , Y. Zhang , Y. Shih , Y. Chih , J. Chang , D. Blaauw , and D. Sylvester . 2018. A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination . In Proceedings of the IEEE International Solid State Circuits Conference (ISSCC\u201918) . Q. Dong, Z. Wang, J. Lim, Y. Zhang, Y. Shih, Y. Chih, J. Chang, D. Blaauw, and D. Sylvester. 2018. A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination. In Proceedings of the IEEE International Solid State Circuits Conference (ISSCC\u201918)."},{"key":"e_1_2_1_4_1","volume-title":"Proceedings of USENIX Security Symposium (USENIXSecurity\u201918)","author":"Lipp Moritz","year":"2018","unstructured":"Moritz Lipp , Michael Schwarz , Daniel Gruss , Thomas Prescher , Werner Haas , Anders Fogh , Jann Horn , Stefan Mangard , Paul Kocher , Daniel Genkin et \u00a0al . 2018 . Meltdown: Reading kernel memory from user space . In Proceedings of USENIX Security Symposium (USENIXSecurity\u201918) . 973--990. Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Anders Fogh, Jann Horn, Stefan Mangard, Paul Kocher, Daniel Genkin et\u00a0al. 2018. Meltdown: Reading kernel memory from user space. In Proceedings of USENIX Security Symposium (USENIXSecurity\u201918). 973--990."},{"key":"e_1_2_1_5_1","volume-title":"Proceedings of International Symposium on Nanoscale Architectures (NANOARCH\u201916)","author":"Wang You","year":"2016","unstructured":"You Wang , Hao Cai , Lirida A. B. Naviner , Jacques-Olivier Klein , Jianlei Yang , and Weisheng Zhao . 2016 . A novel circuit design of true random number generator using magnetic tunnel junction . In Proceedings of International Symposium on Nanoscale Architectures (NANOARCH\u201916) . 123--128. You Wang, Hao Cai, Lirida A. B. Naviner, Jacques-Olivier Klein, Jianlei Yang, and Weisheng Zhao. 2016. A novel circuit design of true random number generator using magnetic tunnel junction. In Proceedings of International Symposium on Nanoscale Architectures (NANOARCH\u201916). 123--128."},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2809781"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2016.7477292"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2361767"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2474366"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1039\/C8NR05928D"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2879502"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH.2009.5226363"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750385"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744900"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2627625"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2776954"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2017.2751042"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898064"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2017.2703863"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297350"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2335155"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.7"},{"volume-title":"Introduction to Hardware Security and Trust","author":"Tehranipoor Mohammad","key":"e_1_2_1_23_1","unstructured":"Mohammad Tehranipoor and Cliff Wang . 2011. Introduction to Hardware Security and Trust . Springer Science 8 Business Media. Mohammad Tehranipoor and Cliff Wang. 2011. Introduction to Hardware Security and Trust. Springer Science 8 Business Media."},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.3390\/electronics4040763"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0993"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898099"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2802870"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2016.7684086"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228377"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516656"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967012"},{"volume-title":"Proceedings of International Conference on Computer-Aided Design (ICCAD\u201916)","author":"Li Meng","key":"e_1_2_1_32_1","unstructured":"Meng Li , Kaveh Shamsi , Travis Meade , Zheng Zhao , Bei Yu , Yier Jin , and David Z. Pan . 2016. Provably secure camouflaging strategy for IC protection . In Proceedings of International Conference on Computer-Aided Design (ICCAD\u201916) . 28. Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, and David Z. Pan. 2016. Provably secure camouflaging strategy for IC protection. In Proceedings of International Conference on Computer-Aided Design (ICCAD\u201916). 28."},{"key":"e_1_2_1_33_1","volume-title":"Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC\u201917)","author":"Basin Muhammad","year":"2017","unstructured":"Muhammad Basin , Bodhisatwa Mazumdar , Ozgur Sinanoglu , and Jeyavijayan Rajendran . 2017 . Security analysis of anti-SAT . In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC\u201917) . To appear. Muhammad Basin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, and Jeyavijayan Rajendran. 2017. Security analysis of anti-SAT. In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC\u201917). To appear."},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-66787-4_10"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2017.2740364"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2017.7951805"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/3060403.3060469"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8341986"},{"key":"e_1_2_1_39_1","volume-title":"Opening the doors to dynamic camouflaging: Harnessing the power of polymorphic devices","author":"Rangarajan Nikhil","year":"2020","unstructured":"Nikhil Rangarajan , Satwik Patnaik , Johann Knechtel , Ramesh Karri , Ozgur Sinanoglu , and Shaloo Rakheja . 2020. Opening the doors to dynamic camouflaging: Harnessing the power of polymorphic devices . IEEE Transactions on Emerging Topics in Computing ( 2020 ). DOI:10.1109\/TETC.2020.2991134 10.1109\/TETC.2020.2991134 Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, and Shaloo Rakheja. 2020. Opening the doors to dynamic camouflaging: Harnessing the power of polymorphic devices. IEEE Transactions on Emerging Topics in Computing (2020). DOI:10.1109\/TETC.2020.2991134"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/3060403.3060471"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001159"},{"volume-title":"Proceedings of International Conference on Parallel Architectures and Compilation. 31--44","author":"Pattnaik Ashutosh","key":"e_1_2_1_42_1","unstructured":"Ashutosh Pattnaik , Xulong Tang , Adwait Jog , Onur Kayiran , Asit K. Mishra , Mahmut T. Kandemir , Onur Mutlu , and Chita R. Das . 2016. Scheduling techniques for GPU architectures with processing-in-memory capabilities . In Proceedings of International Conference on Parallel Architectures and Compilation. 31--44 . Ashutosh Pattnaik, Xulong Tang, Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, and Chita R. Das. 2016. Scheduling techniques for GPU architectures with processing-in-memory capabilities. In Proceedings of International Conference on Parallel Architectures and Compilation. 31--44."},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-68697-5_9"},{"key":"e_1_2_1_44_1","first-page":"388","article-title":"Side-channel attacks: Ten years after its publication and the impacts on cryptographic module security testing","volume":"2005","author":"Zhou YongBin","year":"2005","unstructured":"YongBin Zhou and DengGuo Feng . 2005 . Side-channel attacks: Ten years after its publication and the impacts on cryptographic module security testing . IACR Cryptol. ePrint Arch. 2005 (2005), 388 . YongBin Zhou and DengGuo Feng. 2005. Side-channel attacks: Ten years after its publication and the impacts on cryptographic module security testing. IACR Cryptol. ePrint Arch. 2005 (2005), 388.","journal-title":"IACR Cryptol. ePrint Arch."},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2980064"},{"key":"e_1_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2017.7951835"},{"key":"e_1_2_1_47_1","volume-title":"Proceedings of IEEE International Symposium on Nanoelectronic and Information Systems. 117--122","author":"Dinesh Kumar S.","year":"2017","unstructured":"S. Dinesh Kumar and Himanshu Thapliyal . 2017 . Security evaluation of MTJ\/CMOS circuits against power analysis attacks . In Proceedings of IEEE International Symposium on Nanoelectronic and Information Systems. 117--122 . S. Dinesh Kumar and Himanshu Thapliyal. 2017. Security evaluation of MTJ\/CMOS circuits against power analysis attacks. In Proceedings of IEEE International Symposium on Nanoelectronic and Information Systems. 117--122."},{"volume-title":"Introduction to Hardware Security and Trust","author":"Schaumont Patrick","key":"e_1_2_1_48_1","unstructured":"Patrick Schaumont and Zhimin Chen . 2012. Side-channel attacks and countermeasures for embedded microcontrollers . In Introduction to Hardware Security and Trust . Springer , 263--282. Patrick Schaumont and Zhimin Chen. 2012. Side-channel attacks and countermeasures for embedded microcontrollers. In Introduction to Hardware Security and Trust. Springer, 263--282."},{"volume-title":"Proceedings of IEEE International Electron Devices Meeting (IEDM\u201915)","author":"Lu Y.","key":"e_1_2_1_49_1","unstructured":"Y. Lu , T. Zhong , W. Hsu , S. Kim , X. Luet al.2015. Fully functional perpendicular STT-MRAM macro embedded in 40 nm logic for energy-efficient IOT applications . In Proceedings of IEEE International Electron Devices Meeting (IEDM\u201915) . 26--1. Y. Lu, T. Zhong, W. Hsu, S. Kim, X. Luet al.2015. Fully functional perpendicular STT-MRAM macro embedded in 40 nm logic for energy-efficient IOT applications. In Proceedings of IEEE International Electron Devices Meeting (IEDM\u201915). 26--1."},{"key":"e_1_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2412960"},{"key":"e_1_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2407711"},{"key":"e_1_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2010.2043645"},{"key":"e_1_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2019.2898391"},{"key":"e_1_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2015.2456510"},{"volume-title":"Proceedings of Design, Automation and Test in Europe Conference (DATE\u201914)","author":"Bel Brandon Del","key":"e_1_2_1_55_1","unstructured":"Brandon Del Bel , Jongyeon Kim , Chris H. Kim , and Sachin S. Sapatnekar . 2014. Improving STT-MRAM density through multibit error correction . In Proceedings of Design, Automation and Test in Europe Conference (DATE\u201914) . 1--6. Brandon Del Bel, Jongyeon Kim, Chris H. Kim, and Sachin S. Sapatnekar. 2014. Improving STT-MRAM density through multibit error correction. In Proceedings of Design, Automation and Test in Europe Conference (DATE\u201914). 1--6."},{"key":"e_1_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2013.07.036"},{"key":"e_1_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2016.2608910"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3397513","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3397513","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T20:47:33Z","timestamp":1750193253000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3397513"}},"subtitle":["Analysis, Exploits, and Mitigation Techniques"],"short-title":[],"issued":{"date-parts":[[2020,8,27]]},"references-count":57,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2020,10,31]]}},"alternative-id":["10.1145\/3397513"],"URL":"https:\/\/doi.org\/10.1145\/3397513","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"type":"print","value":"1550-4832"},{"type":"electronic","value":"1550-4840"}],"subject":[],"published":{"date-parts":[[2020,8,27]]},"assertion":[{"value":"2019-05-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2020-04-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2020-08-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}