{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,8]],"date-time":"2026-04-08T22:36:26Z","timestamp":1775687786157,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":35,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,11,2]],"date-time":"2020-11-02T00:00:00Z","timestamp":1604275200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100006435","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1716541,1901901"],"award-info":[{"award-number":["1716541,1901901"]}],"id":[{"id":"10.13039\/100006435","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,11,2]]},"DOI":"10.1145\/3400302.3415695","type":"proceedings-article","created":{"date-parts":[[2020,12,18]],"date-time":"2020-12-18T01:17:48Z","timestamp":1608254268000},"page":"1-9","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":18,"title":["Information leakage from FPGA routing and logic elements"],"prefix":"10.1145","author":[{"given":"Ilias","family":"Giechaskiel","sequence":"first","affiliation":[{"name":"Independent Researcher London, United Kingdom"}]},{"given":"Jakub","family":"Szefer","sequence":"additional","affiliation":[{"name":"Yale University"}]}],"member":"320","published-online":{"date-parts":[[2020,12,17]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"crossref","unstructured":"Stuart Byma J. Gregory Steffan Hadi Bannazadeh Alberto L. Garcia and Paul Chow. 2014. FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack. In Field-Programmable Custom Computing Machines (FCCM).  Stuart Byma J. Gregory Steffan Hadi Bannazadeh Alberto L. Garcia and Paul Chow. 2014. FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack. In Field-Programmable Custom Computing Machines (FCCM).","DOI":"10.1109\/FCCM.2014.42"},{"key":"e_1_3_2_1_2_1","volume-title":"Enabling FPGAs in the Cloud. In ACM Conference on Computing Frontiers (CF).","author":"Chen Fei","year":"2014"},{"key":"e_1_3_2_1_3_1","unstructured":"Digilent Inc. 2016. Nexys4 DDR FPGA Board Reference Manual. https:\/\/reference.digilentinc.com\/_media\/reference\/programmablelogic\/nexys-4-ddr\/nexys4ddr_rm.pdf. Accessed: 2020-05-24.  Digilent Inc. 2016. Nexys4 DDR FPGA Board Reference Manual. https:\/\/reference.digilentinc.com\/_media\/reference\/programmablelogic\/nexys-4-ddr\/nexys4ddr_rm.pdf. Accessed: 2020-05-24."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"crossref","unstructured":"Esam El-Araby Ivan Gonzalez and Tarek El-Ghazawi. 2008. Virtualizing and Sharing Reconfigurable Resources in High-Performance Reconfigurable Computing Systems. In International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA).  Esam El-Araby Ivan Gonzalez and Tarek El-Ghazawi. 2008. Virtualizing and Sharing Reconfigurable Resources in High-Performance Reconfigurable Computing Systems. In International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA).","DOI":"10.1109\/HPRCTA.2008.4745683"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714904"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2012.6219057"},{"key":"e_1_3_2_1_7_1","first-page":"3","article-title":"Leakier Wires: Exploiting FPGA Long Wires for Covert- and Side-Channel Attacks","volume":"12","author":"Giechaskiel Ilias","year":"2019","journal-title":"ACM Transactions on Reconfigurable Technology and Systems (TRETS)"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/3196494.3196518"},{"key":"e_1_3_2_1_9_1","volume-title":"Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs. In International Conference on Field Programmable Logic and Applications (FPL).","author":"Giechaskiel Ilias","year":"2019"},{"key":"e_1_3_2_1_10_1","volume-title":"Reading Between the Dies: Cross-SLR Covert Channels on Multi-Tenant Cloud FPGAs. In IEEE International Conference on Computer Design (ICCD).","author":"Giechaskiel Ilias","year":"2019"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00070"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.766813"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1367045.1367053"},{"key":"e_1_3_2_1_14_1","volume-title":"Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems. In IEEE Symposium on Security and Privacy (S&P).","author":"Huffmire Ted","year":"2007"},{"key":"e_1_3_2_1_15_1","volume-title":"USENIX Symposium on Operating Systems Design and Implementation (OSDI).","author":"Khawaja Ahmed"},{"key":"e_1_3_2_1_16_1","first-page":"3","article-title":"FPGAs and the Cloud - An Endless Tale of Virtualization, Elasticity and Efficiency","volume":"11","author":"Knodel Oliver","year":"2018","journal-title":"International Journal on Advances in Systems and Measurements"},{"key":"e_1_3_2_1_17_1","volume-title":"International Conference on Advances in Circuits, Electronics and Micro-Electronics (CENICS).","author":"Knodel Oliver"},{"key":"e_1_3_2_1_18_1","first-page":"3","article-title":"Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the Cloud","volume":"12","author":"Krautter Jonas","year":"2019","journal-title":"ACM Transactions on Reconfigurable Technology and Systems (TRETS)"},{"key":"e_1_3_2_1_19_1","volume-title":"HILL: A Hardware Isolation Framework Against Information Leakage on Multi-Tenant FPGA Long-Wires. In International Conference on Field-Programmable Technology (FPT).","author":"Luo Yukui","year":"2019"},{"key":"e_1_3_2_1_20_1","volume-title":"Characterization of Long Wire Data Leakage in Deep Submicron FPGAs. In ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA).","author":"Provelengios George","year":"2019"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2018.00016"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2145694.2145708"},{"key":"e_1_3_2_1_23_1","volume-title":"International Conference on Computer-Aided Design (ICCAD).","author":"Schellenberg Falk"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/3373087.3375319"},{"key":"e_1_3_2_1_25_1","first-page":"11","article-title":"Oscillator without a Combinatorial Loop and its Threat to FPGA in Data Centre","volume":"15","author":"Sugawara Takeshi","year":"2019","journal-title":"Electronics Letters"},{"key":"e_1_3_2_1_26_1","volume-title":"PYNQ-Z2 Reference Manual","author":"TUL Corporation"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2018.00031"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"crossref","volume-title":"Enabling FPGAs in Hyperscale Data Centers","author":"Weerasinghe Jagath","DOI":"10.1109\/UIC-ATC-ScalCom-CBDCom-IoP.2015.199"},{"key":"e_1_3_2_1_29_1","unstructured":"Xilinx Inc. 2016. 7 Series FPGAs Configurable Logic Block: User Guide (UG474). https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug474_7Series_CLB.pdf. Accessed: 2020-05-24.  Xilinx Inc. 2016. 7 Series FPGAs Configurable Logic Block: User Guide (UG474). https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug474_7Series_CLB.pdf. Accessed: 2020-05-24."},{"key":"e_1_3_2_1_30_1","unstructured":"Xilinx Inc. 2017. UltraScale Architecture Configurable Logic Block: User Guide (UG574). https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug574-ultrascale-clb.pdf. Accessed: 2020-05-24.  Xilinx Inc. 2017. UltraScale Architecture Configurable Logic Block: User Guide (UG574). https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug574-ultrascale-clb.pdf. Accessed: 2020-05-24."},{"key":"e_1_3_2_1_31_1","unstructured":"Xilinx Inc. 2018. 7 Series FPGAs Data Sheet: Overview (DS180). https:\/\/www.xilinx.com\/support\/documentation\/data_sheets\/ds180_7Series_Overview.pdf. Accessed: 2020-05-24.  Xilinx Inc. 2018. 7 Series FPGAs Data Sheet: Overview (DS180). https:\/\/www.xilinx.com\/support\/documentation\/data_sheets\/ds180_7Series_Overview.pdf. Accessed: 2020-05-24."},{"key":"e_1_3_2_1_32_1","volume-title":"Board: User Guide (UG1260). https:\/\/www.xilinx.com\/support\/documentation\/boards_and_kits\/kcu1500\/ug1260-kcu1500-data-center.pdf. Accessed: 2020-05-24.","author":"Xilinx","year":"2018"},{"key":"e_1_3_2_1_33_1","unstructured":"Xilinx Inc. 2018. Zynq-7000 SoC Data Sheet: Overview (DS190). https:\/\/www.xilinx.com\/support\/documentation\/data_sheets\/ds190-Zynq-7000-Overview.pdf. Accessed: 2020-05-24.  Xilinx Inc. 2018. Zynq-7000 SoC Data Sheet: Overview (DS190). https:\/\/www.xilinx.com\/support\/documentation\/data_sheets\/ds190-Zynq-7000-Overview.pdf. Accessed: 2020-05-24."},{"key":"e_1_3_2_1_34_1","volume-title":"FPGA: User Guide (UG810). https:\/\/www.xilinx.com\/support\/documentation\/boards_and_kits\/kc705\/ug810_KC705_Eval_Bd.pdf. Accessed: 2020-05-24.","author":"Xilinx","year":"2019"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2919644"}],"event":{"name":"ICCAD '20: IEEE\/ACM International Conference on Computer-Aided Design","location":"Virtual Event USA","acronym":"ICCAD '20","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CEDA","IEEE CS"]},"container-title":["Proceedings of the 39th International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3400302.3415695","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3400302.3415695","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:02:52Z","timestamp":1750197772000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3400302.3415695"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,11,2]]},"references-count":35,"alternative-id":["10.1145\/3400302.3415695","10.1145\/3400302"],"URL":"https:\/\/doi.org\/10.1145\/3400302.3415695","relation":{},"subject":[],"published":{"date-parts":[[2020,11,2]]},"assertion":[{"value":"2020-12-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}