{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:46:02Z","timestamp":1772725562859,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":43,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,11,9]],"date-time":"2020-11-09T00:00:00Z","timestamp":1604880000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"National Science Foundation","award":["CNS 1718880"],"award-info":[{"award-number":["CNS 1718880"]}]},{"name":"National Security Agency","award":["Science of Security initiative contract no. #H98230-18-D-0009"],"award-info":[{"award-number":["Science of Security initiative contract no. #H98230-18-D-0009"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,11,13]]},"DOI":"10.1145\/3411504.3421216","type":"proceedings-article","created":{"date-parts":[[2020,11,5]],"date-time":"2020-11-05T23:43:32Z","timestamp":1604619812000},"page":"117-126","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":30,"title":["SpectreRewind"],"prefix":"10.1145","author":[{"given":"Jacob","family":"Fustos","sequence":"first","affiliation":[{"name":"University of Kansas, Lawrence, KS, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael","family":"Bechtel","sequence":"additional","affiliation":[{"name":"University of Kansas, Lawrence, KS, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Heechul","family":"Yun","sequence":"additional","affiliation":[{"name":"University of Kansas, Lawrence, KS, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2020,11,9]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Cache Speculation Side-channels. ARM White paper","year":"2018","unstructured":"&gt;2018. Cache Speculation Side-channels. ARM White paper ( 2018 ). &gt;2018. Cache Speculation Side-channels. ARM White paper (2018)."},{"key":"e_1_3_2_1_2_1","volume-title":"Architectural Support for Programming Languages and Operating Systems (ASPLOS)","author":"Abel Andreas","unstructured":"Andreas Abel and Jan Reineke . 2019. uops.info: Characterizing Latency, Throughput, and Port Usage of Instructions on Intel Microarchitectures . In Architectural Support for Programming Languages and Operating Systems (ASPLOS) . ACM , New York, NY, USA , 673--686. Andreas Abel and Jan Reineke. 2019. uops.info: Characterizing Latency, Throughput, and Port Usage of Instructions on Intel Microarchitectures. In Architectural Support for Programming Languages and Operating Systems (ASPLOS). ACM, New York, NY, USA, 673--686."},{"key":"e_1_3_2_1_3_1","volume-title":"Cheap Hardware Parallelism Implies Cheap Security. Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC). 80--91","author":"Aciicmez Onur","year":"2007","unstructured":"Onur Aciicmez and Jean-Pierre Seifert . 2007 . Cheap Hardware Parallelism Implies Cheap Security. Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC). 80--91 . Onur Aciicmez and Jean-Pierre Seifert. 2007. Cheap Hardware Parallelism Implies Cheap Security. Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC). 80--91."},{"key":"e_1_3_2_1_4_1","unstructured":"ARM. 2015. Cortex-A72 Software Optimization Guide. https:\/\/static.docs.arm.com\/uan0016\/a\/cortex_a72_software_optimization_guide_external.pdf. (2015).  ARM. 2015. Cortex-A72 Software Optimization Guide. https:\/\/static.docs.arm.com\/uan0016\/a\/cortex_a72_software_optimization_guide_external.pdf. (2015)."},{"key":"e_1_3_2_1_5_1","unstructured":"ARM. 2016. Cortex-A57 Software Optimization Guide. https:\/\/static.docs.arm.com\/uan0015\/b\/Cortex_A57_Software_Optimization_Guide_external.pdf. (2016).  ARM. 2016. Cortex-A57 Software Optimization Guide. https:\/\/static.docs.arm.com\/uan0015\/b\/Cortex_A57_Software_Optimization_Guide_external.pdf. (2016)."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3363194"},{"key":"e_1_3_2_1_7_1","first-page":"274","article-title":"Memory type which is cacheable yet inaccessible by speculative instructions. (Jan. 3 2019)","volume":"16","author":"Boggs Darrell D","year":"2019","unstructured":"Darrell D Boggs , Ross Segelken , Mike Cornaby , Nick Fortino , Shailender Chaudhry , Denis Khartikov , Alok Mooley , Nathan Tuck , and Gordon Vreugdenhil . 2019 . Memory type which is cacheable yet inaccessible by speculative instructions. (Jan. 3 2019) . US Patent App. 16\/022 , 274 . Darrell D Boggs, Ross Segelken, Mike Cornaby, Nick Fortino, Shailender Chaudhry, Denis Khartikov, Alok Mooley, Nathan Tuck, and Gordon Vreugdenhil. 2019. Memory type which is cacheable yet inaccessible by speculative instructions. (Jan. 3 2019). US Patent App. 16\/022,274.","journal-title":"US Patent App."},{"key":"e_1_3_2_1_8_1","volume-title":"Port Contention for Fun and Profit. In IEEE Symposium on Security and Privacy (SP).","author":"Aldaya Alejandro Cabrera","year":"2019","unstructured":"Alejandro Cabrera Aldaya , Billy Bob Brumley , Sohaib ul Hassan , Cesar Pereida Garc\u00eda , and Nicola Tuveri . 2019 . Port Contention for Fun and Profit. In IEEE Symposium on Security and Privacy (SP). Alejandro Cabrera Aldaya, Billy Bob Brumley, Sohaib ul Hassan, Cesar Pereida Garc\u00eda, and Nicola Tuveri. 2019. Port Contention for Fun and Profit. In IEEE Symposium on Security and Privacy (SP)."},{"key":"e_1_3_2_1_9_1","volume-title":"USENIX Security Symposium.","author":"Canella Claudio","year":"2019","unstructured":"Claudio Canella , Jo Van Bulck , Michael Schwarz , Moritz Lipp , Benjamin von Berg , Philipp Ortner , Frank Piessens , Dmitry Evtyushkin , and Daniel Gruss . 2019 . A Systematic Evaluation of Transient Execution Attacks and Defenses . In USENIX Security Symposium. Claudio Canella, Jo Van Bulck, Michael Schwarz, Moritz Lipp, Benjamin von Berg, Philipp Ortner, Frank Piessens, Dmitry Evtyushkin, and Daniel Gruss. 2019. A Systematic Evaluation of Transient Execution Attacks and Defenses. In USENIX Security Symposium."},{"key":"e_1_3_2_1_10_1","unstructured":"Anders Fogh. 2016. https:\/\/cyber.wtf\/2016\/09\/27\/covertshotgun\/. (2016).  Anders Fogh. 2016. https:\/\/cyber.wtf\/2016\/09\/27\/covertshotgun\/. (2016)."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317914"},{"key":"e_1_3_2_1_12_1","volume-title":"Third Workshop on Computer Architecture Research with RISC-V (CARRV).","author":"Gonzalez Abraham","year":"2019","unstructured":"Abraham Gonzalez , Ben Korpan , Jerry Zhao , Ed Younis , and Krste Asanovi\u0107 . 2019 . Replicating and Mitigating Spectre Attacks on an Open Source RISC-V Microarchitecture . In Third Workshop on Computer Architecture Research with RISC-V (CARRV). Abraham Gonzalez, Ben Korpan, Jerry Zhao, Ed Younis, and Krste Asanovi\u0107. 2019. Replicating and Mitigating Spectre Attacks on an Open Source RISC-V Microarchitecture. In Third Workshop on Computer Architecture Research with RISC-V (CARRV)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","unstructured":"Ben Gras Cristiano Giuffrida Michael Kurth Herbert Bos and Kaveh Razavi. 2020. ABSynthe: Automatic Blackbox Side-channel Synthesis on Commodity Microarchitectures. In Network and Distributed Systems Security (NDSS).  Ben Gras Cristiano Giuffrida Michael Kurth Herbert Bos and Kaveh Razavi. 2020. ABSynthe: Automatic Blackbox Side-channel Synthesis on Commodity Microarchitectures. In Network and Distributed Systems Security (NDSS).","DOI":"10.14722\/ndss.2020.23018"},{"key":"e_1_3_2_1_14_1","unstructured":"Jann Horn. 2018. speculative execution variant 4: speculative store bypass. https:\/\/bugs.chromium.org\/p\/project-zero\/issues\/detail?id=1528. (2018).  Jann Horn. 2018. speculative execution variant 4: speculative store bypass. https:\/\/bugs.chromium.org\/p\/project-zero\/issues\/detail?id=1528. (2018)."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317903"},{"key":"e_1_3_2_1_17_1","volume-title":"Speculative buffer overflows: Attacks and defenses. arXiv preprint arXiv:1807.03757","author":"Kiriansky Vladimir","year":"2018","unstructured":"Vladimir Kiriansky and Carl Waldspurger . 2018. Speculative buffer overflows: Attacks and defenses. arXiv preprint arXiv:1807.03757 ( 2018 ). Vladimir Kiriansky and Carl Waldspurger. 2018. Speculative buffer overflows: Attacks and defenses. arXiv preprint arXiv:1807.03757 (2018)."},{"key":"e_1_3_2_1_18_1","volume-title":"Spectre Attacks: Exploiting Speculative Execution. IEEE Symposium on Security and Privacy (SP). IEEE Computer Society.","author":"Kocher Paul","year":"2019","unstructured":"Paul Kocher , Jann Horn , Anders Fogh , Daniel Genkin , Daniel Gruss , Werner Haas , M Mike Hamburg , Moritz Lipp , Stefan Mangard , Thomas Prescher , Michael Schwarz , and Yuval Yarom . 2019 . Spectre Attacks: Exploiting Speculative Execution. IEEE Symposium on Security and Privacy (SP). IEEE Computer Society. Paul Kocher, Jann Horn, Anders Fogh, Daniel Genkin, Daniel Gruss, Werner Haas, MMike Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher, Michael Schwarz, and Yuval Yarom. 2019. Spectre Attacks: Exploiting Speculative Execution. IEEE Symposium on Security and Privacy (SP). IEEE Computer Society."},{"key":"e_1_3_2_1_19_1","volume-title":"USENIX Workshop on Offensive Technologies (WOOT).","author":"Koruyeh Esmaeil Mohammadian","year":"2018","unstructured":"Esmaeil Mohammadian Koruyeh , Khaled N Khasawneh , Chengyu Song , and Nael Abu-Ghazaleh . 2018 . Spectre returns! speculation attacks using the return stack buffer . In USENIX Workshop on Offensive Technologies (WOOT). Esmaeil Mohammadian Koruyeh, Khaled N Khasawneh, Chengyu Song, and Nael Abu-Ghazaleh. 2018. Spectre returns! speculation attacks using the return stack buffer. In USENIX Workshop on Offensive Technologies (WOOT)."},{"key":"e_1_3_2_1_20_1","volume-title":"Meltdown: Reading Kernel Memory from User Space. USENIX Security.","author":"Lipp Moritz","year":"2018","unstructured":"Moritz Lipp , Michael Schwarz , Daniel Gruss , Thomas Prescher , Werner Haas , Anders Fogh , Jann Horn , Stefan Mangard , Paul Kocher , Daniel Genkin , Yuval Yarom , and Mike Hamburg . 2018 . Meltdown: Reading Kernel Memory from User Space. USENIX Security. Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Anders Fogh, Jann Horn, Stefan Mangard, Paul Kocher, Daniel Genkin, Yuval Yarom, and Mike Hamburg. 2018. Meltdown: Reading Kernel Memory from User Space. USENIX Security."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/3243734.3243761"},{"key":"e_1_3_2_1_22_1","volume-title":"Daniel Genkin, Daniel Gruss, Berk Sunar, Frank Piessens, and Yuval Yarom.","author":"Minkin Marina","year":"2019","unstructured":"Marina Minkin , Daniel Moghimi , Moritz Lipp , Michael Schwarz , Jo Van Bulck , Daniel Genkin, Daniel Gruss, Berk Sunar, Frank Piessens, and Yuval Yarom. 2019 . Fallout : Reading Kernel Writes From User Space . Marina Minkin, Daniel Moghimi, Moritz Lipp, Michael Schwarz, Jo Van Bulck, Daniel Genkin, Daniel Gruss, Berk Sunar, Frank Piessens, and Yuval Yarom. 2019. Fallout: Reading Kernel Writes From User Space."},{"key":"e_1_3_2_1_23_1","volume-title":"Memjam: A false dependency attack against constant-time crypto implementations. International Journal of Parallel Programming","author":"Moghimi Ahmad","year":"2019","unstructured":"Ahmad Moghimi , Jan Wichelmann , Thomas Eisenbarth , and Berk Sunar . 2019 . Memjam: A false dependency attack against constant-time crypto implementations. International Journal of Parallel Programming (2019). Ahmad Moghimi, Jan Wichelmann, Thomas Eisenbarth, and Berk Sunar. 2019. Memjam: A false dependency attack against constant-time crypto implementations. International Journal of Parallel Programming (2019)."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.1999.762835"},{"key":"e_1_3_2_1_25_1","volume-title":"International Symposium on Microarchitecture (MICRO). ACM, 73--86","author":"Saileshwar Gururaj","unstructured":"Gururaj Saileshwar and Moinuddin K. Qureshi . 2019. CleanupSpec: An 'Undo' Approach to Safe Speculation . In International Symposium on Microarchitecture (MICRO). ACM, 73--86 . Gururaj Saileshwar and Moinuddin K. Qureshi. 2019. CleanupSpec: An 'Undo' Approach to Safe Speculation. In International Symposium on Microarchitecture (MICRO). ACM, 73--86."},{"key":"e_1_3_2_1_26_1","volume-title":"Robert Schilling, Florian Kargl, and Daniel Gru\u00df.","author":"Schwarz Michael","year":"2020","unstructured":"Michael Schwarz , Moritz Lipp , Claudio Alberto Canella , Robert Schilling, Florian Kargl, and Daniel Gru\u00df. 2020 . ConTExT: A Generic Approach for Mitigating Spectre. In Network and Distributed System Security (NDSS) . Michael Schwarz, Moritz Lipp, Claudio Alberto Canella, Robert Schilling, Florian Kargl, and Daniel Gru\u00df. 2020. ConTExT: A Generic Approach for Mitigating Spectre. In Network and Distributed System Security (NDSS)."},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3354252"},{"key":"e_1_3_2_1_28_1","volume-title":"Financial Cryptography and Data Security,","author":"Schwarz Michael","unstructured":"Michael Schwarz , Cl\u00e9mentine Maurice , Daniel Gruss , and Stefan Mangard . 2017. Fantastic Timers and Where to Find Them: High-Resolution Microarchitectural Attacks in JavaScript . In Financial Cryptography and Data Security, , Aggelos Kiayias (Ed.). Springer International Publishing , Cham , 247--267. Michael Schwarz, Cl\u00e9mentine Maurice, Daniel Gruss, and Stefan Mangard. 2017. Fantastic Timers and Where to Find Them: High-Resolution Microarchitectural Attacks in JavaScript. In Financial Cryptography and Data Security,, Aggelos Kiayias (Ed.). Springer International Publishing, Cham, 247--267."},{"key":"e_1_3_2_1_29_1","volume-title":"LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. arXiv preprint arXiv:1806.07480","author":"Stecklina Julian","year":"2018","unstructured":"Julian Stecklina and Thomas Prescher . 2018. LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. arXiv preprint arXiv:1806.07480 ( 2018 ). Julian Stecklina and Thomas Prescher. 2018. LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. arXiv preprint arXiv:1806.07480 (2018)."},{"key":"e_1_3_2_1_30_1","unstructured":"K Sun R Branco and K Hu. 2019. A New Memory Type Against Speculative Side Channel Attacks. (2019).  K Sun R Branco and K Hu. 2019. A New Memory Type Against Speculative Side Channel Attacks. (2019)."},{"key":"e_1_3_2_1_31_1","volume-title":"SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors. In 2019 28th International Conference on Parallel Architectures and Compilation Techniques (PACT).","author":"Townley Daniel","year":"2019","unstructured":"Daniel Townley and Dmitry Ponomarev . 2019 . SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors. In 2019 28th International Conference on Parallel Architectures and Compilation Techniques (PACT). Daniel Townley and Dmitry Ponomarev. 2019. SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors. In 2019 28th International Conference on Parallel Architectures and Compilation Techniques (PACT)."},{"key":"e_1_3_2_1_32_1","volume-title":"Dag Arne Osvik, and Adi Shamir","author":"Tromer Eran","year":"2010","unstructured":"Eran Tromer , Dag Arne Osvik, and Adi Shamir . 2010 . Efficient Cache Attacks on AES, and Countermeasures. J. Cryptology , Vol. 23 (07 2010), 37--71. Eran Tromer, Dag Arne Osvik, and Adi Shamir. 2010. Efficient Cache Attacks on AES, and Countermeasures. J. Cryptology, Vol. 23 (07 2010), 37--71."},{"key":"e_1_3_2_1_33_1","volume-title":"Simultaneous Multithreading: Maximizing On-chip Parallelism. In International Symposium on Computer Architecture (ISCA). ACM, 392--403","author":"Tullsen Dean M.","unstructured":"Dean M. Tullsen , Susan J. Eggers , and Henry M. Levy . 1995 . Simultaneous Multithreading: Maximizing On-chip Parallelism. In International Symposium on Computer Architecture (ISCA). ACM, 392--403 . Dean M. Tullsen, Susan J. Eggers, and Henry M. Levy. 1995. Simultaneous Multithreading: Maximizing On-chip Parallelism. In International Symposium on Computer Architecture (ISCA). ACM, 392--403."},{"key":"e_1_3_2_1_34_1","volume-title":"USENIX Security Symposium. USENIX Association.","author":"Bulck Jo Van","year":"2018","unstructured":"Jo Van Bulck , Marina Minkin , Ofir Weisse , Daniel Genkin , Baris Kasikci , Frank Piessens , Mark Silberstein , Thomas F. Wenisch , Yuval Yarom , and Raoul Strackx . 2018 . Foreshadow: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution . In USENIX Security Symposium. USENIX Association. Jo Van Bulck, Marina Minkin, Ofir Weisse, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Thomas F. Wenisch, Yuval Yarom, and Raoul Strackx. 2018. Foreshadow: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution. In USENIX Security Symposium. USENIX Association."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00089"},{"key":"e_1_3_2_1_36_1","volume-title":"RIDL: Rogue In-flight Data Load. In S&P.","author":"van Schaik Stephan","year":"2019","unstructured":"Stephan van Schaik , Alyssa Milburn , Sebastian \u00d6sterlund , Pietro Frigo , Giorgi Maisuradze , Kaveh Razavi , Herbert Bos , and Cristiano Giuffrida . 2019 . RIDL: Rogue In-flight Data Load. In S&P. Stephan van Schaik, Alyssa Milburn, Sebastian \u00d6sterlund, Pietro Frigo, Giorgi Maisuradze, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida. 2019. RIDL: Rogue In-flight Data Load. In S&P."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"crossref","unstructured":"Stephan van Schaik Marina Minkin Andrew Kwong Daniel Genkin and Yuval Yarom. 2020. CacheOut: Leaking Data on Intel CPUs via Cache Evictions. https:\/\/cacheoutattack.com\/. (2020).  Stephan van Schaik Marina Minkin Andrew Kwong Daniel Genkin and Yuval Yarom. 2020. CacheOut: Leaking Data on Intel CPUs via Cache Evictions. https:\/\/cacheoutattack.com\/. (2020).","DOI":"10.1109\/SP40001.2021.00064"},{"key":"e_1_3_2_1_38_1","volume-title":"Annual Computer Security Applications Conference (ACSAC). 473--482","author":"Wang Z.","unstructured":"Z. Wang and R. B. Lee . 2006. Covert and Side Channels Due to Processor Architecture . In Annual Computer Security Applications Conference (ACSAC). 473--482 . Z. Wang and R. B. Lee. 2006. Covert and Side Channels Due to Processor Architecture. In Annual Computer Security Applications Conference (ACSAC). 473--482."},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358306"},{"key":"e_1_3_2_1_40_1","volume-title":"Marina Minkin, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Raoul Strackx, Thomas F. Wenisch, and Yuval Yarom.","author":"Weisse Ofir","year":"2018","unstructured":"Ofir Weisse , Jo Van Bulck , Marina Minkin, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Raoul Strackx, Thomas F. Wenisch, and Yuval Yarom. 2018 . Foreshadow-NG: Breaking the Virtual Memory Abstraction with Transient Out-of-Order Execution. Technical report (2018). Ofir Weisse, Jo Van Bulck, Marina Minkin, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Raoul Strackx, Thomas F. Wenisch, and Yuval Yarom. 2018. Foreshadow-NG: Breaking the Virtual Memory Abstraction with Transient Out-of-Order Execution. Technical report (2018)."},{"key":"e_1_3_2_1_41_1","volume-title":"InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy. In International Symposium on Microarchitecture (MICRO).","author":"Yan Mengjia","year":"2018","unstructured":"Mengjia Yan , Jiho Choi , Dimitrios Skarlatos , Adam Morrison , Christopher W Fletcher , and Josep Torrellas . 2018 . InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy. In International Symposium on Microarchitecture (MICRO). Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, Adam Morrison, Christopher W Fletcher, and Josep Torrellas. 2018. InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy. In International Symposium on Microarchitecture (MICRO)."},{"key":"e_1_3_2_1_42_1","volume-title":"23rd USENIX Security Symposium (USENIX Security 14)","author":"Yarom Yuval","year":"2014","unstructured":"Yuval Yarom and Katrina Falkner . 2014 . FLUSH+RELOAD: A High Resolution, Low Noise, L3 Cache Side-Channel Attack . In 23rd USENIX Security Symposium (USENIX Security 14) . USENIX Association, San Diego, CA, 719--732. Yuval Yarom and Katrina Falkner. 2014. FLUSH+RELOAD: A High Resolution, Low Noise, L3 Cache Side-Channel Attack. In 23rd USENIX Security Symposium (USENIX Security 14). USENIX Association, San Diego, CA, 719--732."},{"key":"e_1_3_2_1_43_1","volume-title":"CacheBleed: a timing attack on OpenSSL constant-time RSA. Journal of Cryptographic Engineering","author":"Yarom Yuval","year":"2017","unstructured":"Yuval Yarom , Daniel Genkin , and Nadia Heninger . 2017. CacheBleed: a timing attack on OpenSSL constant-time RSA. Journal of Cryptographic Engineering ( 2017 ). Yuval Yarom, Daniel Genkin, and Nadia Heninger. 2017. CacheBleed: a timing attack on OpenSSL constant-time RSA. Journal of Cryptographic Engineering (2017)."},{"key":"e_1_3_2_1_44_1","volume-title":"Speculative Taint Tracking (STT) A Comprehensive Protection for Speculatively Accessed Data. In International Symposium on Microarchitecture (MICRO). 954--968","author":"Yu Jiyong","year":"2019","unstructured":"Jiyong Yu , Mengjia Yan , Artem Khyzha , Adam Morrison , Josep Torrellas , and Christopher W Fletcher . 2019 . Speculative Taint Tracking (STT) A Comprehensive Protection for Speculatively Accessed Data. In International Symposium on Microarchitecture (MICRO). 954--968 . Jiyong Yu, Mengjia Yan, Artem Khyzha, Adam Morrison, Josep Torrellas, and Christopher W Fletcher. 2019. Speculative Taint Tracking (STT) A Comprehensive Protection for Speculatively Accessed Data. In International Symposium on Microarchitecture (MICRO). 954--968."}],"event":{"name":"CCS '20: 2020 ACM SIGSAC Conference on Computer and Communications Security","location":"Virtual Event USA","acronym":"CCS '20","sponsor":["SIGSAC ACM Special Interest Group on Security, Audit, and Control"]},"container-title":["Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware Security"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3411504.3421216","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3411504.3421216","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3411504.3421216","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T21:31:42Z","timestamp":1750195902000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3411504.3421216"}},"subtitle":["Leaking Secrets to Past Instructions"],"short-title":[],"issued":{"date-parts":[[2020,11,9]]},"references-count":43,"alternative-id":["10.1145\/3411504.3421216","10.1145\/3411504"],"URL":"https:\/\/doi.org\/10.1145\/3411504.3421216","relation":{},"subject":[],"published":{"date-parts":[[2020,11,9]]},"assertion":[{"value":"2020-11-09","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}