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Syst."],"published-print":{"date-parts":[[2021,3,31]]},"abstract":"<jats:p>3D memory systems offer several advantages in terms of area, bandwidth, and energy efficiency. However, thermal issues arising out of higher power densities have limited their widespread use. While prior works have looked at reducing dynamic power through reduced memory accesses, in these memories, both leakage and dynamic power consumption are comparable. Furthermore, as the temperature rises, the leakage power increases, creating a thermal-leakage loop. We study the impact of leakage power on 3D memory temperature and propose turning OFF specific memory channels to meet thermal constraints. Data is migrated to a 2D memory before closing a 3D channel. We introduce an analytical model to assess the 2D memory delay and use the model to guide data migration decisions. The above strategy is referred to as<jats:italic>FastCool<\/jats:italic>and provides an improvement of 22%, 19%, and 32% on average (up to 57%, 72%, and 82%) in performance, memory energy, and energy-delay product (EDP), respectively, on different workloads consisting of SPEC CPU2006 benchmarks.<\/jats:p><jats:p>We further propose a thermal management strategy named<jats:italic>Energy-Efficient FastCool (EEFC)<\/jats:italic>, which improves upon FastCool by selecting the channels to be closed by considering temperature, leakage, access rate, and position of various 3D memory channels at runtime. Our experiments demonstrate that EEFC leads to an additional improvement of up to 30%, 30%, and 51% in performance, memory energy, and EDP compared to FastCool. Finally, we analyze the effects of process variations on the efficiency of the proposed FC and EEFC strategies. Variation in the manufacturing process causes changes in the leakage power and temperature profile. Since EEFC considers both while selecting channels for closure, it is more resilient to process variations and achieves a lower application execution time and memory energy compared to FastCool.<\/jats:p>","DOI":"10.1145\/3419468","type":"journal-article","created":{"date-parts":[[2020,10,23]],"date-time":"2020-10-23T21:09:36Z","timestamp":1603487376000},"page":"1-31","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["Leakage-Aware Dynamic Thermal Management of 3D Memories"],"prefix":"10.1145","volume":"26","author":[{"given":"Lokesh","family":"Siddhu","sequence":"first","affiliation":[{"name":"Department of Computer Science and Engineering, Indian Institute of Technology Delhi, Hauz Khas, New Delhi, Delhi, India"}]},{"given":"Rajesh","family":"Kedia","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, Indian Institute of Technology Delhi, Hauz Khas, New Delhi, Delhi, India"}]},{"given":"Preeti Ranjan","family":"Panda","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, Indian Institute of Technology Delhi, Hauz Khas, New Delhi, Delhi, India"}]}],"member":"320","published-online":{"date-parts":[[2020,10,23]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"ANSYS. 2013. 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