{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:23:56Z","timestamp":1750220636970,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":27,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,9,28]],"date-time":"2020-09-28T00:00:00Z","timestamp":1601251200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,9,28]]},"DOI":"10.1145\/3422575.3422788","type":"proceedings-article","created":{"date-parts":[[2021,3,22]],"date-time":"2021-03-22T01:43:40Z","timestamp":1616377420000},"page":"137-143","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["The Case for Optimizing the Frequency of Periodic Data Movements over Hybrid Memory Systems"],"prefix":"10.1145","author":[{"given":"Thaleia Dimitra","family":"Doudali","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology, United States"}]},{"given":"Daniel","family":"Zahka","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, United States"}]},{"given":"Ada","family":"Gavrilovska","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, United States"}]}],"member":"320","published-online":{"date-parts":[[2021,3,21]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"2020. Gen-Z Consortium: Computer Industry Alliance Revolutionizing Data Access. https:\/\/genzconsortium.org\/.  2020. Gen-Z Consortium: Computer Industry Alliance Revolutionizing Data Access. https:\/\/genzconsortium.org\/."},{"key":"e_1_3_2_1_2_1","unstructured":"2020. Intel Omni-Path Architecture (Intel OPA) Driving Exascale Computing and HPC Driving Exascale Computing and HPC with Intel. https:\/\/www.intel.com\/content\/www\/us\/en\/high-performance-computing-fabrics\/omni-path-driving-exascale-computing.html.  2020. Intel Omni-Path Architecture (Intel OPA) Driving Exascale Computing and HPC Driving Exascale Computing and HPC with Intel. https:\/\/www.intel.com\/content\/www\/us\/en\/high-performance-computing-fabrics\/omni-path-driving-exascale-computing.html."},{"key":"e_1_3_2_1_3_1","unstructured":"2020. Intel\u00aeOptaneTM DC Persistent Memory. https:\/\/www.intel.com\/content\/www\/us\/en\/architecture-and-technology\/optane-dc-persistent-memory.html.  2020. Intel\u00aeOptaneTM DC Persistent Memory. https:\/\/www.intel.com\/content\/www\/us\/en\/architecture-and-technology\/optane-dc-persistent-memory.html."},{"key":"e_1_3_2_1_4_1","unstructured":"2020. Pin - A Dynamic Binary Instrumentation Tool. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/pin-a-dynamic-binary-instrumentation-tool.html.  2020. Pin - A Dynamic Binary Instrumentation Tool. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/pin-a-dynamic-binary-instrumentation-tool.html."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/3093337.3037706"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132402.3132404"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/3307681.3325398"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132402.3132418"},{"volume-title":"Mnemo: Boosting Memory Cost Efficiency in Hybrid Memory Systems. In 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 412\u2013421","author":"Doudali D.","key":"e_1_3_2_1_10_1","unstructured":"T.\u00a0 D. Doudali and A. Gavrilovska . 2019 . Mnemo: Boosting Memory Cost Efficiency in Hybrid Memory Systems. In 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 412\u2013421 . T.\u00a0D. Doudali and A. Gavrilovska. 2019. Mnemo: Boosting Memory Cost Efficiency in Hybrid Memory Systems. In 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 412\u2013421."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2901318.2901344"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2817817.2731191"},{"key":"e_1_3_2_1_13_1","unstructured":"Joseph Izraelevitz Jian Yang Lu Zhang Juno Kim Xiao Liu Amirsaman Memaripour Yun\u00a0Joon Soh Zixuan Wang Yi Xu Subramanya\u00a0R. Dulloor Jishen Zhao and Steven Swanson. 2019. Basic Performance Measurements of the Intel Optane DC Persistent Memory Module. arxiv:1903.05714\u00a0[cs.DC]  Joseph Izraelevitz Jian Yang Lu Zhang Juno Kim Xiao Liu Amirsaman Memaripour Yun\u00a0Joon Soh Zixuan Wang Yi Xu Subramanya\u00a0R. Dulloor Jishen Zhao and Steven Swanson. 2019. Basic Performance Measurements of the Intel Optane DC Persistent Memory Module. arxiv:1903.05714\u00a0[cs.DC]"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080245"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/3357526.3357543"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919639"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.5555\/3026877.3026931"},{"volume-title":"Utility-Based Hybrid Memory Management. In 2017 IEEE International Conference on Cluster Computing (CLUSTER). 152\u2013165","author":"Li Y.","key":"e_1_3_2_1_18_1","unstructured":"Y. Li , S. Ghose , J. Choi , J. Sun , H. Wang , and O. Mutlu . 2017 . Utility-Based Hybrid Memory Management. In 2017 IEEE International Conference on Cluster Computing (CLUSTER). 152\u2013165 . Y. Li, S. Ghose, J. Choi, J. Sun, H. Wang, and O. Mutlu. 2017. Utility-Based Hybrid Memory Management. In 2017 IEEE International Conference on Cluster Computing (CLUSTER). 152\u2013165."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555815.1555789"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168955"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056027"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/3357526.3357541"},{"volume-title":"2014 IEEE International Conference on Cluster Computing (CLUSTER). 123\u2013131","author":"Pe\u00f1a J.","key":"e_1_3_2_1_23_1","unstructured":"A.\u00a0 J. Pe\u00f1a and P. Balaji . 2014. Toward the efficient use of multiple explicitly managed memory subsystems . In 2014 IEEE International Conference on Cluster Computing (CLUSTER). 123\u2013131 . A.\u00a0J. Pe\u00f1a and P. Balaji. 2014. Toward the efficient use of multiple explicitly managed memory subsystems. In 2014 IEEE International Conference on Cluster Computing (CLUSTER). 123\u2013131."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"crossref","unstructured":"A. Prodromou M. Meswani N. Jayasena G. Loh and D.\u00a0M. Tullsen. 2017. MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories. In 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA). 433\u2013444.  A. Prodromou M. Meswani N. Jayasena G. Loh and D.\u00a0M. Tullsen. 2017. MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories. In 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA). 433\u2013444.","DOI":"10.1109\/HPCA.2017.39"},{"key":"e_1_3_2_1_25_1","first-page":"11","article-title":"Characterizing Emerging Heterogeneous Memory","volume":"51","author":"Shen Du","year":"2016","unstructured":"Du Shen , Xu Liu , and Felix\u00a0Xiaozhu Lin . 2016 . Characterizing Emerging Heterogeneous Memory . SIGPLAN Not. 51 , 11 (June 2016), 13\u201323. https:\/\/doi.org\/10.1145\/3241624.2926702 10.1145\/3241624.2926702 Du Shen, Xu Liu, and Felix\u00a0Xiaozhu Lin. 2016. Characterizing Emerging Heterogeneous Memory. SIGPLAN Not. 51, 11 (June 2016), 13\u201323. https:\/\/doi.org\/10.1145\/3241624.2926702","journal-title":"SIGPLAN Not."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126923"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2018.00034"}],"event":{"name":"MEMSYS 2020: The International Symposium on Memory Systems","acronym":"MEMSYS 2020","location":"Washington DC USA"},"container-title":["The International Symposium on Memory Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3422575.3422788","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3422575.3422788","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:01:55Z","timestamp":1750197715000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3422575.3422788"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9,28]]},"references-count":27,"alternative-id":["10.1145\/3422575.3422788","10.1145\/3422575"],"URL":"https:\/\/doi.org\/10.1145\/3422575.3422788","relation":{},"subject":[],"published":{"date-parts":[[2020,9,28]]},"assertion":[{"value":"2021-03-21","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}