{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:24:02Z","timestamp":1750220642572,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,10,20]],"date-time":"2020-10-20T00:00:00Z","timestamp":1603152000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,10,20]]},"DOI":"10.1145\/3424978.3425029","type":"proceedings-article","created":{"date-parts":[[2020,10,15]],"date-time":"2020-10-15T19:06:17Z","timestamp":1602788777000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Multi-thread Simulation-based Equivalence Checking between SIM and RTI"],"prefix":"10.1145","author":[{"given":"Jian","family":"Hu","sequence":"first","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yongyang","family":"Hu","sequence":"additional","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guanwu","family":"Wang","sequence":"additional","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guilin","family":"Chen","sequence":"additional","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Haitao","family":"Yang","sequence":"additional","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yun","family":"Kang","sequence":"additional","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kang","family":"Wang","sequence":"additional","affiliation":[{"name":"The Sixty-third Research Institute, National University of Defense Technology, Nanjing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2020,10,20]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2314392"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-10-7470-7_72"},{"key":"e_1_3_2_1_3_1","volume-title":"17th International Symposium on Quality Electronic Design (ISQED), 129--134","author":"Hu Jian","year":"2016","unstructured":"Jian Hu , Tun Li , and Sikun Li ( 2016 ). Equivalence Checking between SLM and RTL Using Machine Learning Techniques . 17th International Symposium on Quality Electronic Design (ISQED), 129--134 . Jian Hu, Tun Li, and Sikun Li (2016). Equivalence Checking between SLM and RTL Using Machine Learning Techniques. 17th International Symposium on Quality Electronic Design (ISQED), 129--134."},{"key":"e_1_3_2_1_4_1","volume-title":"Test Workshop - LATW","author":"Castro Marquez C, Strum","year":"2014","unstructured":"Castro Marquez C, Strum M and Chau W J ( 2014 ). A unified sequential equivalence checking approach to verify high-level functionality and protocol specification implementations in RTL designs[C] . In Test Workshop - LATW , 2014 15th Latin American, 1--6. Castro Marquez C, Strum M and Chau W J (2014). A unified sequential equivalence checking approach to verify high-level functionality and protocol specification implementations in RTL designs[C]. In Test Workshop - LATW, 2014 15th Latin American, 1--6."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2015.7406927"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126619501639"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3299771.3299791"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.2016.2645687"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/3299771.3299797"},{"key":"e_1_3_2_1_10_1","volume-title":"Chandan Karfa and Purandar Bhaduri","author":"Chouksey Ramanuj","year":"2017","unstructured":"Ramanuj Chouksey , Chandan Karfa and Purandar Bhaduri ( 2017 ). Translation Validation of Loop Invariant Code Optimizations Involving False Computations. VDAT , 767--778. Ramanuj Chouksey, Chandan Karfa and Purandar Bhaduri (2017). Translation Validation of Loop Invariant Code Optimizations Involving False Computations. VDAT, 767--778."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/3172871.3180078"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2019.00083"},{"key":"e_1_3_2_1_13_1","volume-title":"Dhrubajyoti Kalita. Automatic RTL Test Generation from SystemC TLM Specifications. ACM Transactions on Embedded Computing Systems, 11(2)","author":"Chen Mingsong","year":"2012","unstructured":"Mingsong Chen and Prabhat Mishra ( 2012 ). Dhrubajyoti Kalita. Automatic RTL Test Generation from SystemC TLM Specifications. ACM Transactions on Embedded Computing Systems, 11(2) . Mingsong Chen and Prabhat Mishra (2012). Dhrubajyoti Kalita. Automatic RTL Test Generation from SystemC TLM Specifications. ACM Transactions on Embedded Computing Systems, 11(2)."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2017.88"},{"key":"e_1_3_2_1_15_1","volume-title":"Property Specification Language Reference Manual","author":"Accellera","year":"2004","unstructured":"Accellera , Property Specification Language Reference Manual , 2004 . Accellera, Property Specification Language Reference Manual, 2004."},{"key":"e_1_3_2_1_16_1","volume-title":"VLSI Design'12. 320--325.","author":"Chen Mingsong","year":"2012","unstructured":"Mingsong Chen and Prabhat Mishra ( 2012 ). Assertion-based functional consistency checking between tlm and rtl models . In VLSI Design'12. 320--325. Mingsong Chen and Prabhat Mishra (2012). Assertion-based functional consistency checking between tlm and rtl models. In VLSI Design'12. 320--325."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11704-015-4257-0"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/363235.363259"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2003.1183177"}],"event":{"name":"CSAE 2020: The 4th International Conference on Computer Science and Application Engineering","acronym":"CSAE 2020","location":"Sanya China"},"container-title":["Proceedings of the 4th International Conference on Computer Science and Application Engineering"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3424978.3425029","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3424978.3425029","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:02:10Z","timestamp":1750197730000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3424978.3425029"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10,20]]},"references-count":19,"alternative-id":["10.1145\/3424978.3425029","10.1145\/3424978"],"URL":"https:\/\/doi.org\/10.1145\/3424978.3425029","relation":{},"subject":[],"published":{"date-parts":[[2020,10,20]]},"assertion":[{"value":"2020-10-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}