{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,22]],"date-time":"2026-03-22T22:42:20Z","timestamp":1774219340594,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":36,"publisher":"ACM","license":[{"start":{"date-parts":[[2021,2,17]],"date-time":"2021-02-17T00:00:00Z","timestamp":1613520000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["2028040, 1730158, 1911095, 2003279, 1826967"],"award-info":[{"award-number":["2028040, 1730158, 1911095, 2003279, 1826967"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2021,2,17]]},"DOI":"10.1145\/3431920.3439298","type":"proceedings-article","created":{"date-parts":[[2021,2,20]],"date-time":"2021-02-20T23:15:47Z","timestamp":1613862947000},"page":"262-272","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":42,"title":["NASCENT: Near-Storage Acceleration of Database Sort on SmartSSD"],"prefix":"10.1145","author":[{"given":"Sahand","family":"Salamat","sequence":"first","affiliation":[{"name":"University of California, San Diego, La Jolla, CA, USA"}]},{"given":"Armin","family":"Haj Aboutalebi","sequence":"additional","affiliation":[{"name":"Samsung Semiconductor Inc., San Jose, CA, USA"}]},{"given":"Behnam","family":"Khaleghi","sequence":"additional","affiliation":[{"name":"University of California, San Diego, San Diego, CA, USA"}]},{"given":"Joo Hwan","family":"Lee","sequence":"additional","affiliation":[{"name":"Samsung Semiconductor Inc., San Jose, CA, USA"}]},{"given":"Yang Seok","family":"Ki","sequence":"additional","affiliation":[{"name":"Samsung Semiconductor Inc., San Jose, CA, USA"}]},{"given":"Tajana","family":"Rosing","sequence":"additional","affiliation":[{"name":"University of California, San Diego, san diego, CA, USA"}]}],"member":"320","published-online":{"date-parts":[[2021,2,17]]},"reference":[{"key":"e_1_3_2_2_1_1","volume-title":"Database management systems","author":"Ramakrishnan R.","year":"2003","unstructured":"R. Ramakrishnan , J. Gehrke , and J. Gehrke , Database management systems , vol. 3 . McGraw-Hill New York , 2003 . R. Ramakrishnan, J. Gehrke, and J. Gehrke, Database management systems, vol. 3. McGraw-Hill New York, 2003."},{"key":"e_1_3_2_2_2_1","doi-asserted-by":"crossref","first-page":"299","DOI":"10.1007\/978-981-13-0617-4_29","volume-title":"A survey: classification of big data,\" in Cognitive Informatics and Soft Computing","author":"Kumar D.","year":"2019","unstructured":"D. Kumar and M. N. Mohanty , \" A survey: classification of big data,\" in Cognitive Informatics and Soft Computing , pp. 299 -- 306 , Springer , 2019 . D. Kumar and M. N. Mohanty, \"A survey: classification of big data,\" in Cognitive Informatics and Soft Computing, pp. 299--306, Springer, 2019."},{"key":"e_1_3_2_2_3_1","volume-title":"Gullfoss: Accelerating and simplifying data movement among heterogeneous computing and storage resources. Department of Computer Science and Engineering","author":"Tseng H.-W.","year":"2015","unstructured":"H.-W. Tseng , Y. Liu , M. Gahagan , J. Li , Y. Jing , and S. J. Swanson , Gullfoss: Accelerating and simplifying data movement among heterogeneous computing and storage resources. Department of Computer Science and Engineering , University of California . . . , 2015 . H.-W. Tseng, Y. Liu, M. Gahagan, J. Li, Y. Jing, and S. J. Swanson, Gullfoss: Accelerating and simplifying data movement among heterogeneous computing and storage resources. Department of Computer Science and Engineering, University of California . . . , 2015."},{"key":"e_1_3_2_2_4_1","volume-title":"IEEE","author":"Ruan Z.","year":"2019","unstructured":"Z. Ruan and T. H. J. Cong , \"Analyzing and modeling in-storage computing workloads on eisc?an fpga-based system-level emulation platform,\" in 2019 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1--8 , IEEE , 2019 . Z. Ruan and T. H. J. Cong, \"Analyzing and modeling in-storage computing workloads on eisc?an fpga-based system-level emulation platform,\" in 2019 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1--8, IEEE, 2019."},{"key":"e_1_3_2_2_5_1","first-page":"219","volume-title":"Summarizer: trading communication with computing near storage,\" in 2017 50th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO)","author":"Koo G.","year":"2017","unstructured":"G. Koo , K. K. Matam , I. Te , H. K. G. Narra , J. Li , H.-W. Tseng , S. Swanson , and M. Annavaram , \" Summarizer: trading communication with computing near storage,\" in 2017 50th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO) , pp. 219 -- 231 , IEEE , 2017 . G. Koo, K. K. Matam, I. Te, H. K. G. Narra, J. Li, H.-W. Tseng, S. Swanson, and M. Annavaram, \"Summarizer: trading communication with computing near storage,\" in 2017 50th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO), pp. 219--231, IEEE, 2017."},{"key":"e_1_3_2_2_6_1","first-page":"379","volume-title":"{INSIDER}: Designing in-storage computing system for emerging high-performance drive,\" in 2019 {USENIX} Annual Technical Conference (USENIX ATC 19)","author":"Ruan Z.","year":"2019","unstructured":"Z. Ruan , T. He , and J. Cong , \" {INSIDER}: Designing in-storage computing system for emerging high-performance drive,\" in 2019 {USENIX} Annual Technical Conference (USENIX ATC 19) , pp. 379 -- 394 , 2019 . Z. Ruan, T. He, and J. Cong, \"{INSIDER}: Designing in-storage computing system for emerging high-performance drive,\" in 2019 {USENIX} Annual Technical Conference (USENIX ATC 19), pp. 379--394, 2019."},{"key":"e_1_3_2_2_7_1","unstructured":"\"Smartssd.\" https:\/\/samsungsemiconductor-us.com\/smartssd\/. Accessed: 2020-05--27.  \"Smartssd.\" https:\/\/samsungsemiconductor-us.com\/smartssd\/. Accessed: 2020-05--27."},{"key":"e_1_3_2_2_8_1","unstructured":"\"Scaleflux.\" http:\/\/www.scaleflux.com\/. Accessed: 2020-05--27.  \"Scaleflux.\" http:\/\/www.scaleflux.com\/. Accessed: 2020-05--27."},{"key":"e_1_3_2_2_9_1","first-page":"09","article-title":"White paper: Smarter data storage, a guide to computational storage on arm,\" tech. rep","year":"2019","unstructured":"\" White paper: Smarter data storage, a guide to computational storage on arm,\" tech. rep ., Arm , 09 2019 . \"White paper: Smarter data storage, a guide to computational storage on arm,\" tech. rep., Arm, 09 2019.","journal-title":"Arm"},{"key":"e_1_3_2_2_10_1","first-page":"1","volume-title":"Ssd in-storage computing for list intersection,\" in Proceedings of the 12th International Workshop on Data Management on New Hardware","author":"Wang J.","year":"2016","unstructured":"J. Wang , D. Park , Y.-S. Kee , Y. Papakonstantinou , and S. Swanson , \" Ssd in-storage computing for list intersection,\" in Proceedings of the 12th International Workshop on Data Management on New Hardware , pp. 1 -- 7 , 2016 . J. Wang, D. Park, Y.-S. Kee, Y. Papakonstantinou, and S. Swanson, \"Ssd in-storage computing for list intersection,\" in Proceedings of the 12th International Workshop on Data Management on New Hardware, pp. 1--7, 2016."},{"key":"e_1_3_2_2_11_1","first-page":"1","volume-title":"Rnsnet: In-memory neural network acceleration using residue number system,\" in 2018 IEEE International Conference on Rebooting Computing (ICRC)","author":"Salamat S.","year":"2018","unstructured":"S. Salamat , M. Imani , S. Gupta , and T. Rosing , \" Rnsnet: In-memory neural network acceleration using residue number system,\" in 2018 IEEE International Conference on Rebooting Computing (ICRC) , pp. 1 -- 12 , IEEE , 2018 . S. Salamat, M. Imani, S. Gupta, and T. Rosing, \"Rnsnet: In-memory neural network acceleration using residue number system,\" in 2018 IEEE International Conference on Rebooting Computing (ICRC), pp. 1--12, IEEE, 2018."},{"key":"e_1_3_2_2_12_1","unstructured":"S. H. Hashemi J. H. Lee and Y. S. KI \"Optimal dynamic shard creation in storage for graph workloads \" June 18 2020. US Patent App. 16\/274 232.  S. H. Hashemi J. H. Lee and Y. S. KI \"Optimal dynamic shard creation in storage for graph workloads \" June 18 2020. US Patent App. 16\/274 232."},{"key":"e_1_3_2_2_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.839320"},{"key":"e_1_3_2_2_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/lca.2020.3009347"},{"key":"e_1_3_2_2_15_1","first-page":"376","volume-title":"Fpga energy efficiency by leveraging thermal margin,\" in 2019 IEEE 37th International Conference on Computer Design (ICCD)","author":"Khaleghi B.","year":"2019","unstructured":"B. Khaleghi , S. Salamat , M. Imani , and T. Rosing , \" Fpga energy efficiency by leveraging thermal margin,\" in 2019 IEEE 37th International Conference on Computer Design (ICCD) , pp. 376 -- 384 , IEEE , 2019 . B. Khaleghi, S. Salamat, M. Imani, and T. Rosing, \"Fpga energy efficiency by leveraging thermal margin,\" in 2019 IEEE 37th International Conference on Computer Design (ICCD), pp. 376--384, IEEE, 2019."},{"key":"e_1_3_2_2_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2017.19"},{"key":"e_1_3_2_2_17_1","volume-title":"Workload-aware opportunistic energy efficiency in multi-fpga platforms,\" arXiv preprint arXiv:1908.06519","author":"Salamat S.","year":"2019","unstructured":"S. Salamat , B. Khaleghi , M. Imani , and T. Rosing , \" Workload-aware opportunistic energy efficiency in multi-fpga platforms,\" arXiv preprint arXiv:1908.06519 , 2019 . S. Salamat, B. Khaleghi, M. Imani, and T. Rosing, \"Workload-aware opportunistic energy efficiency in multi-fpga platforms,\" arXiv preprint arXiv:1908.06519, 2019."},{"key":"e_1_3_2_2_18_1","first-page":"133","volume-title":"End-to-end optimization of deep learning applications,\" in The 2020 ACM\/SIGDA International Symposium on Field- Programmable Gate Arrays","author":"Sohrabizadeh A.","year":"2020","unstructured":"A. Sohrabizadeh , J. Wang , and J. Cong , \" End-to-end optimization of deep learning applications,\" in The 2020 ACM\/SIGDA International Symposium on Field- Programmable Gate Arrays , pp. 133 -- 139 , 2020 . A. Sohrabizadeh, J. Wang, and J. Cong, \"End-to-end optimization of deep learning applications,\" in The 2020 ACM\/SIGDA International Symposium on Field- Programmable Gate Arrays, pp. 133--139, 2020."},{"key":"e_1_3_2_2_19_1","doi-asserted-by":"publisher","DOI":"10.14778\/3007328.3007331"},{"key":"e_1_3_2_2_20_1","doi-asserted-by":"publisher","DOI":"10.14778\/2994509.2994512"},{"key":"e_1_3_2_2_21_1","first-page":"1221","volume-title":"opportunities and challenges,\" in Proceedings of the 2013 ACM SIGMOD International Conference on Management of Data","author":"Do J.","year":"2013","unstructured":"J. Do , Y.-S. Kee , J. M. Patel , C. Park , K. Park , and D. J. DeWitt , \" Query processing on smart ssds : opportunities and challenges,\" in Proceedings of the 2013 ACM SIGMOD International Conference on Management of Data , pp. 1221 -- 1230 , 2013 . J. Do, Y.-S. Kee, J. M. Patel, C. Park, K. Park, and D. J. DeWitt, \"Query processing on smart ssds: opportunities and challenges,\" in Proceedings of the 2013 ACM SIGMOD International Conference on Management of Data, pp. 1221--1230, 2013."},{"key":"e_1_3_2_2_22_1","first-page":"1","article-title":"Ibm puredata system for analytics architecture","author":"Francisco P.","year":"2014","unstructured":"P. Francisco , \" Ibm puredata system for analytics architecture ,\" IBM Redbooks , pp. 1 -- 16 , 2014 . P. Francisco, \"Ibm puredata system for analytics architecture,\" IBM Redbooks, pp. 1--16, 2014.","journal-title":"IBM Redbooks"},{"key":"e_1_3_2_2_23_1","doi-asserted-by":"crossref","first-page":"88","DOI":"10.1145\/3358960.3375794","volume-title":"Modeling analytics for computational storage,\" in Proceedings of the ACM\/SPEC International Conference on Performance Engineering","author":"dos Reis V. Lagrange Moutinho","year":"2020","unstructured":"V. Lagrange Moutinho dos Reis , H. Li , and A. Shayesteh , \" Modeling analytics for computational storage,\" in Proceedings of the ACM\/SPEC International Conference on Performance Engineering , pp. 88 -- 99 , 2020 . V. Lagrange Moutinho dos Reis, H. Li, and A. Shayesteh, \"Modeling analytics for computational storage,\" in Proceedings of the ACM\/SPEC International Conference on Performance Engineering, pp. 88--99, 2020."},{"key":"e_1_3_2_2_24_1","doi-asserted-by":"crossref","unstructured":"G. Graefe \"Implementing sorting in database systems \" ACM Computing Surveys (CSUR) vol. 38 no. 3 pp. 10--es 2006.  G. Graefe \"Implementing sorting in database systems \" ACM Computing Surveys (CSUR) vol. 38 no. 3 pp. 10--es 2006.","DOI":"10.1145\/1132960.1132964"},{"key":"e_1_3_2_2_25_1","first-page":"1214","volume-title":"Mostly order preserving dictionaries,\" in 2019 IEEE 35th International Conference on Data Engineering (ICDE)","author":"Liu C.","year":"2019","unstructured":"C. Liu , M. Umbenhower , H. Jiang , P. Subramaniam , J. Ma , and A. J. Elmore , \" Mostly order preserving dictionaries,\" in 2019 IEEE 35th International Conference on Data Engineering (ICDE) , pp. 1214 -- 1225 , IEEE , 2019 . C. Liu, M. Umbenhower, H. Jiang, P. Subramaniam, J. Ma, and A. J. Elmore, \"Mostly order preserving dictionaries,\" in 2019 IEEE 35th International Conference on Data Engineering (ICDE), pp. 1214--1225, IEEE, 2019."},{"key":"e_1_3_2_2_26_1","unstructured":"I. Boicu \"Adaptive on-the-fly compressed execution in spark \" 2019.  I. Boicu \"Adaptive on-the-fly compressed execution in spark \" 2019."},{"key":"e_1_3_2_2_27_1","doi-asserted-by":"publisher","DOI":"10.14778\/3137765.3137776"},{"key":"e_1_3_2_2_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/3310149"},{"key":"e_1_3_2_2_29_1","doi-asserted-by":"crossref","unstructured":"D. Koch and J. Torresen \"Fpgasort: A high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting \" in Proceedings of the 19th ACM\/SIGDA international symposium on Field programmable gate arrays pp. 45--54 2011.  D. Koch and J. Torresen \"Fpgasort: A high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting \" in Proceedings of the 19th ACM\/SIGDA international symposium on Field programmable gate arrays pp. 45--54 2011.","DOI":"10.1145\/1950413.1950427"},{"key":"e_1_3_2_2_30_1","doi-asserted-by":"publisher","DOI":"10.1007\/s00778-011-0232-z"},{"key":"e_1_3_2_2_31_1","doi-asserted-by":"crossref","first-page":"222","DOI":"10.1145\/3373087.3375304","volume-title":"Fpga-accelerated samplesort for large data sets,\" in The 2020 ACM\/SIGDA International Symposium on Field- Programmable Gate Arrays","author":"Chen H.","year":"2020","unstructured":"H. Chen , S. Madaminov , M. Ferdman , and P. Milder , \" Fpga-accelerated samplesort for large data sets,\" in The 2020 ACM\/SIGDA International Symposium on Field- Programmable Gate Arrays , pp. 222 -- 232 , 2020 . H. Chen, S. Madaminov, M. Ferdman, and P. Milder, \"Fpga-accelerated samplesort for large data sets,\" in The 2020 ACM\/SIGDA International Symposium on Field- Programmable Gate Arrays, pp. 222--232, 2020."},{"key":"e_1_3_2_2_32_1","doi-asserted-by":"crossref","first-page":"128","DOI":"10.1109\/ISCI.2013.6612389","volume-title":"Zero-delay fpga-based odd-even sorting network,\" in 2013 IEEE Symposium on Computers & Informatics (ISCI)","author":"Hematian A.","year":"2013","unstructured":"A. Hematian , S. Chuprat , A. A. Manaf , and N. Parsazadeh , \" Zero-delay fpga-based odd-even sorting network,\" in 2013 IEEE Symposium on Computers & Informatics (ISCI) , pp. 128 -- 131 , IEEE , 2013 . A. Hematian, S. Chuprat, A. A. Manaf, and N. Parsazadeh, \"Zero-delay fpga-based odd-even sorting network,\" in 2013 IEEE Symposium on Computers & Informatics (ISCI), pp. 128--131, IEEE, 2013."},{"key":"e_1_3_2_2_33_1","first-page":"240","volume-title":"Energy and memory efficient mapping of bitonic sorting on fpga,\" in Proceedings of the 2015 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays","author":"Chen R.","year":"2015","unstructured":"R. Chen , S. Siriyal , and V. Prasanna , \" Energy and memory efficient mapping of bitonic sorting on fpga,\" in Proceedings of the 2015 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays , pp. 240 -- 249 , 2015 . R. Chen, S. Siriyal, and V. Prasanna, \"Energy and memory efficient mapping of bitonic sorting on fpga,\" in Proceedings of the 2015 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays, pp. 240--249, 2015."},{"key":"e_1_3_2_2_34_1","first-page":"1","volume-title":"Computer & Telecommunication Engineering (ICECTE)","author":"Lipu A. R.","year":"2016","unstructured":"A. R. Lipu , R. Amin , M. N. I. Mondal , and M. Al Mamun , \" Exploiting parallelism for faster implementation of bubble sort algorithm using fpga,\" in 2016 2nd International Conference on Electrical , Computer & Telecommunication Engineering (ICECTE) , pp. 1 -- 4 , IEEE, 2016 . A. R. Lipu, R. Amin, M. N. I. Mondal, and M. Al Mamun, \"Exploiting parallelism for faster implementation of bubble sort algorithm using fpga,\" in 2016 2nd International Conference on Electrical, Computer & Telecommunication Engineering (ICECTE), pp. 1--4, IEEE, 2016."},{"key":"e_1_3_2_2_35_1","first-page":"307","volume-title":"spring joint computer conference","author":"Batcher K. E.","year":"1968","unstructured":"K. E. Batcher , \" Sorting networks and their applications,\" in Proceedings of the April 30--May 2, 1968 , spring joint computer conference , pp. 307 -- 314 , 1968 . K. E. Batcher, \"Sorting networks and their applications,\" in Proceedings of the April 30--May 2, 1968, spring joint computer conference, pp. 307--314, 1968."},{"key":"e_1_3_2_2_36_1","unstructured":"\"Tpcc benchmark.\" http:\/\/www.tpc.org\/tpcc\/. Accessed: 2020-05--27.  \"Tpcc benchmark.\" http:\/\/www.tpc.org\/tpcc\/. Accessed: 2020-05--27."}],"event":{"name":"FPGA '21: The 2021 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","location":"Virtual Event USA","acronym":"FPGA '21","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["The 2021 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3431920.3439298","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3431920.3439298","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3431920.3439298","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T21:31:31Z","timestamp":1750195891000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3431920.3439298"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,2,17]]},"references-count":36,"alternative-id":["10.1145\/3431920.3439298","10.1145\/3431920"],"URL":"https:\/\/doi.org\/10.1145\/3431920.3439298","relation":{},"subject":[],"published":{"date-parts":[[2021,2,17]]},"assertion":[{"value":"2021-02-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}