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Syst."],"published-print":{"date-parts":[[2021,4,30]]},"abstract":"<jats:p>There have been numerous studies on heterogeneous memory systems comprised of faster DRAM (e.g., 3D stacked HBM or HMC) and slower non-volatile memories (e.g., PCM, STT-RAM). However, most of these studies focused on static policies for managing data placement and migration among the different memory devices. These policies are based on the average behavior across a range of applications. Results show that these techniques do not always result in higher performance when compared to systems that do not migrate data across the devices: some applications show performance gains, but other applications show performance losses. It is possible to utilize offline analyses to identify which applications benefit from page migration (migration friendly) and use page migration only with those applications. However, we observed that several applications exhibit both migration friendly and migration unfriendly behaviors during different phases of execution supporting a need for adaptive page migration techniques. We introduce and evaluate techniques that dynamically adapt to the behavior of applications and either reduce or increase migrations, or even halt migrations. Our adaptive techniques show performance gains for both migration friendly (on average of 81% over no migrations) and unfriendly workloads (by an average of 3%): it should be remembered that previous migration techniques resulted in performance losses for unfriendly workloads.<\/jats:p>","DOI":"10.1145\/3444750","type":"journal-article","created":{"date-parts":[[2021,3,24]],"date-time":"2021-03-24T10:16:33Z","timestamp":1616580993000},"page":"1-24","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Dynamically Adapting Page Migration Policies Based on Applications\u2019 Memory Access Behaviors"],"prefix":"10.1145","volume":"17","author":[{"given":"Shashank","family":"Adavally","sequence":"first","affiliation":[{"name":"University of North Texas, Denton, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mahzabeen","family":"Islam","sequence":"additional","affiliation":[{"name":"University of North Texas, Denton, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Krishna","family":"Kavi","sequence":"additional","affiliation":[{"name":"University of North Texas, Denton, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2021,3,24]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the Role of Reactor Physics toward a Sustainable Future (PHYSOR\u201914)","author":"Tramm John R.","year":"2014","unstructured":"John R. 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In Proceedings of the 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT\u201917) . IEEE, Los Alamitos, CA, 273--287. Amro Awad, Arkaprava Basu, Sergey Blagodurov, Yan Solihin, and Gabriel H. Loh. 2017. Avoiding TLB shootdowns through self-invalidating TLB entries. In Proceedings of the 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT\u201917). IEEE, Los Alamitos, CA, 273--287."},{"key":"e_1_2_1_3_1","volume-title":"Retrieved","author":"Bendelac Chaim","year":"2017","unstructured":"Chaim Bendelac and Panos Kokkalis . 2017 . SAP HANA Memory Usage Explained . Retrieved January 20, 2019 from https:\/\/www.sap.com\/documents\/2016\/08\/205c8299-867c-0010-82c7-eda71af511fa.html. Chaim Bendelac and Panos Kokkalis. 2017. SAP HANA Memory Usage Explained. Retrieved January 20, 2019 from https:\/\/www.sap.com\/documents\/2016\/08\/205c8299-867c-0010-82c7-eda71af511fa.html."},{"key":"e_1_2_1_4_1","volume-title":"Proceedings of the Linux Symposium. 47--54","author":"Bird Tim","year":"2009","unstructured":"Tim Bird . 2009 . Measuring function duration with FTrace . In Proceedings of the Linux Symposium. 47--54 . Tim Bird. 2009. Measuring function duration with FTrace. In Proceedings of the Linux Symposium. 47--54."},{"key":"e_1_2_1_5_1","volume-title":"Bovet and Marco Cesati","author":"Daniel","year":"2005","unstructured":"Daniel P. Bovet and Marco Cesati . 2005 . Understanding the Linux Kernel : From I\/O Ports to Process Management. O\u2019Reilly Media . Daniel P. Bovet and Marco Cesati. 2005. Understanding the Linux Kernel: From I\/O Ports to Process Management. O\u2019Reilly Media."},{"volume-title":"Proceedings of the 47th Annual IEEE\/ACM International Symposium on Microarchitecture. IEEE","author":"Chou Chiachen","key":"e_1_2_1_6_1","unstructured":"Chiachen Chou , Aamer Jaleel , and Moinuddin K. Qureshi . 2014. CAMEO: A two-level memory organization with capacity of main memory and flexibility of hardware-managed cache . In Proceedings of the 47th Annual IEEE\/ACM International Symposium on Microarchitecture. IEEE , Los Alamitos, CA, 1--12. Chiachen Chou, Aamer Jaleel, and Moinuddin K. Qureshi. 2014. CAMEO: A two-level memory organization with capacity of main memory and flexibility of hardware-managed cache. In Proceedings of the 47th Annual IEEE\/ACM International Symposium on Microarchitecture. IEEE, Los Alamitos, CA, 1--12."},{"key":"e_1_2_1_7_1","volume-title":"Retrieved","author":"HMC Consortium","year":"2018","unstructured":"HMC Consortium . 2018 . Hybrid Memory Cube Consortium . Retrieved July 27, 2018 from http:\/\/hybridmemorycube.org\/. HMC Consortium. 2018. Hybrid Memory Cube Consortium. Retrieved July 27, 2018 from http:\/\/hybridmemorycube.org\/."},{"key":"e_1_2_1_8_1","volume-title":"SPEC CPU 2006","author":"Standard Performance Evaluation Corporation","year":"2015","unstructured":"Standard Performance Evaluation Corporation . 2015 . SPEC CPU 2006 . Retrieved February 9, 2021 from https:\/\/www.spec.org\/cpu2006\/. Standard Performance Evaluation Corporation. 2015. SPEC CPU 2006. Retrieved February 9, 2021 from https:\/\/www.spec.org\/cpu2006\/."},{"key":"e_1_2_1_9_1","volume-title":"Retrieved","author":"Joint Electron Devices Engineering Council","year":"2018","unstructured":"Joint Electron Devices Engineering Council . 2018 . 3D ICs . Retrieved July 27, 2018 from http:\/\/www.jedec.org\/category\/technology-focus-area\/3d-ics-0. Joint Electron Devices Engineering Council. 2018. 3D ICs. Retrieved July 27, 2018 from http:\/\/www.jedec.org\/category\/technology-focus-area\/3d-ics-0."},{"key":"e_1_2_1_10_1","volume-title":"US Department of Energy ECP Proxy Application Suite. Retrieved","author":"US Department of Energy. 2018.","year":"2021","unstructured":"US Department of Energy. 2018. US Department of Energy ECP Proxy Application Suite. Retrieved February 9, 2021 from https:\/\/proxyapps.exascaleproject.org\/ecp-proxy-apps-suite\/. US Department of Energy. 2018. US Department of Energy ECP Proxy Application Suite. Retrieved February 9, 2021 from https:\/\/proxyapps.exascaleproject.org\/ecp-proxy-apps-suite\/."},{"key":"e_1_2_1_11_1","unstructured":"Harish Patil. 2018. PinPlay. Retrieved February 9 2021 from https:\/\/software.intel.com\/en-us\/articles\/program-recordreplay-toolkit.  Harish Patil. 2018. PinPlay. Retrieved February 9 2021 from https:\/\/software.intel.com\/en-us\/articles\/program-recordreplay-toolkit."},{"key":"e_1_2_1_12_1","unstructured":"M. Heroux and S. Hammond. 2015. MiniFE: finite element solver. https:\/\/portal.nersc.gov\/project\/CAL\/designforward.htm#MiniFE.  M. Heroux and S. Hammond. 2015. MiniFE: finite element solver. https:\/\/portal.nersc.gov\/project\/CAL\/designforward.htm#MiniFE."},{"key":"e_1_2_1_13_1","doi-asserted-by":"crossref","unstructured":"R. D. Hornung J. A. Keasler and M. B. Gokhale. 2011. Hydrodynamics Challenge Problem. Technical Report. Lawrence Livermore National Lab Livermore CA.  R. D. Hornung J. A. Keasler and M. B. Gokhale. 2011. Hydrodynamics Challenge Problem. Technical Report. Lawrence Livermore National Lab Livermore CA.","DOI":"10.2172\/1117905"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/3364179"},{"key":"e_1_2_1_15_1","unstructured":"Jewillco. 2015. Graph500-v2-spec. Retrieved February 9 2021 from https:\/\/github.com\/graph500\/graph500\/tree\/v2-spec.  Jewillco. 2015. Graph500-v2-spec. Retrieved February 9 2021 from https:\/\/github.com\/graph500\/graph500\/tree\/v2-spec."},{"volume-title":"Memory-Driven Computing","author":"Keeton Kimberly","key":"e_1_2_1_16_1","unstructured":"Kimberly Keeton . 2017. Memory-Driven Computing . USENIX Association , Santa Clara, CA . Kimberly Keeton. 2017. Memory-Driven Computing. USENIX Association, Santa Clara, CA."},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2414456"},{"volume-title":"Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture. IEEE","author":"Kokolis A.","key":"e_1_2_1_18_1","unstructured":"A. Kokolis , D. Skarlatos , and J. Torrellas . 2019. PageSeer: Using page walks to trigger page swapps in hybrid memory systems . In Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture. IEEE , Los Alamitos, CA. A. Kokolis, D. Skarlatos, and J. Torrellas. 2019. PageSeer: Using page walks to trigger page swapps in hybrid memory systems. In Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture. IEEE, Los Alamitos, CA."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00050"},{"volume-title":"Proceedings of the 2013 IEEE International Symposium on Performance Analysis of Systems Software. IEEE","author":"Kultursay E.","key":"e_1_2_1_20_1","unstructured":"E. Kultursay , M. Kandemir , A. Sivasubramaniam , and O. Mutlu . 2013. Evaluating STT-RAM as an energy-efficient main memory alternative . In Proceedings of the 2013 IEEE International Symposium on Performance Analysis of Systems Software. IEEE , Los Alamitos, CA. E. Kultursay, M. Kandemir, A. Sivasubramaniam, and O. Mutlu. 2013. Evaluating STT-RAM as an energy-efficient main memory alternative. In Proceedings of the 2013 IEEE International Symposium on Performance Analysis of Systems Software. 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IEEE, Los Alamitos, CA, 309--319. Prashant J. Nair, Chiachen Chou, Bipin Rajendran, and Moinuddin K. Qureshi. 2015. Reducing read latency of phase change memory via early read and Turbo Read. In Proceedings of the 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA\u201915). IEEE, Los Alamitos, CA, 309--319."},{"key":"e_1_2_1_26_1","volume-title":"Pin - A Dynamic Binary Instrumentation Tool. Retrieved","author":"Osnat Levi","year":"2021","unstructured":"Osnat Levi (Intel). 2018. Pin - A Dynamic Binary Instrumentation Tool. Retrieved February 9, 2021 from https:\/\/software.intel.com\/en-us\/articles\/pin-a-dynamic-binary-instrumentation-tool. Osnat Levi (Intel). 2018. Pin - A Dynamic Binary Instrumentation Tool. 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