{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,10]],"date-time":"2026-01-10T19:07:56Z","timestamp":1768072076425,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2021,4,17]],"date-time":"2021-04-17T00:00:00Z","timestamp":1618617600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc\/4.0\/"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2021,4,19]]},"DOI":"10.1145\/3445814.3446726","type":"proceedings-article","created":{"date-parts":[[2021,4,11]],"date-time":"2021-04-11T17:06:26Z","timestamp":1618160786000},"page":"182-193","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["NOREBA: a compiler-informed non-speculative out-of-order commit processor"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3219-7544","authenticated-orcid":false,"given":"Ali","family":"Hajiabadi","sequence":"first","affiliation":[{"name":"National University of Singapore, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7139-4444","authenticated-orcid":false,"given":"Andreas","family":"Diavastos","sequence":"additional","affiliation":[{"name":"Universitat Polit\u00e8cnica de Catalunya, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8742-134X","authenticated-orcid":false,"given":"Trevor E.","family":"Carlson","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2021,4,17]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"2010 (accessed August 21 2020 ). IEEE Floating-Point Arithmetic. https:\/\/docs. oracle.com\/cd\/E19957-01\/ 805-4940\/6j4m1u7pj\/index.html.  2010 (accessed August 21 2020 ). IEEE Floating-Point Arithmetic. https:\/\/docs. oracle.com\/cd\/E19957-01\/ 805-4940\/6j4m1u7pj\/index.html."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522306"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037741"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.57"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2004.1291357"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/305138.305175"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.13"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2004.10008"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155637"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2012.8"},{"key":"e_1_3_2_1_12_1","unstructured":"Andrew Glew. 1998. MLP yes! ILP no. ASPLOS Wild and Crazy Idea Session (Oct. 1998 ).  Andrew Glew. 1998. MLP yes! ILP no. ASPLOS Wild and Crazy Idea Session (Oct. 1998 )."},{"key":"e_1_3_2_1_13_1","unstructured":"Marius Grannaes Magnus Jahre and Lasse Natvig. 2011. Storage eficient hardware prefetching using delta-correlating prediction tables. Journal of InstructionLevel Parallelism 13 ( 2011 ) 1-16.  Marius Grannaes Magnus Jahre and Lasse Natvig. 2011. Storage eficient hardware prefetching using delta-correlating prediction tables. Journal of InstructionLevel Parallelism 13 ( 2011 ) 1-16."},{"key":"e_1_3_2_1_14_1","volume-title":"Intel\u00ae 64 and IA-32 architectures software developer's manual","author":"Guide Part","year":"2011","unstructured":"Part Guide . 2011. Intel\u00ae 64 and IA-32 architectures software developer's manual . Volume 3B: System Programming Guide, Part 2 ( 2011 ), 5. Part Guide. 2011. Intel\u00ae 64 and IA-32 architectures software developer's manual. Volume 3B: System Programming Guide, Part 2 ( 2011 ), 5."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830800"},{"key":"e_1_3_2_1_17_1","article-title":"Simpoint 3.0: Faster and more flexible program phase analysis","volume":"7","author":"Hamerly Greg","year":"2005","unstructured":"Greg Hamerly , Erez Perelman , Jeremy Lau , and Brad Calder . 2005 . Simpoint 3.0: Faster and more flexible program phase analysis . Journal of Instruction Level Parallelism 7 , 4 ( 2005 ), 1-28. Greg Hamerly, Erez Perelman, Jeremy Lau, and Brad Calder. 2005. Simpoint 3.0: Faster and more flexible program phase analysis. Journal of Instruction Level Parallelism 7, 4 ( 2005 ), 1-28.","journal-title":"Journal of Instruction Level Parallelism"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783764"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1186736.1186737"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1542275.1542349"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2445572.2445577"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/248208.237173"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.95"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176234"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183532"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176237"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1999.809438"},{"key":"e_1_3_2_1_30_1","first-page":"571","article-title":"Stride based prefetcher with confidence counter and dynamic prefetchahead mechanism","volume":"6","author":"Sander Benjamin T","year":"2003","unstructured":"Benjamin T Sander , William A Hughes , Sridhar P Subramanian , and Teik-Chung Tan . 2003 . Stride based prefetcher with confidence counter and dynamic prefetchahead mechanism . US Patent 6 , 571 , 318. Benjamin T Sander, William A Hughes, Sridhar P Subramanian, and Teik-Chung Tan. 2003. Stride based prefetcher with confidence counter and dynamic prefetchahead mechanism. US Patent 6, 571, 318.","journal-title":"US Patent"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358315"}],"event":{"name":"ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems","location":"Virtual USA","acronym":"ASPLOS '21","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages"]},"container-title":["Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3445814.3446726","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3445814.3446726","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T21:28:14Z","timestamp":1750195694000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3445814.3446726"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,17]]},"references-count":31,"alternative-id":["10.1145\/3445814.3446726","10.1145\/3445814"],"URL":"https:\/\/doi.org\/10.1145\/3445814.3446726","relation":{},"subject":[],"published":{"date-parts":[[2021,4,17]]},"assertion":[{"value":"2021-04-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}