{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T14:22:12Z","timestamp":1773843732763,"version":"3.50.1"},"reference-count":163,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2021,5,3]],"date-time":"2021-05-03T00:00:00Z","timestamp":1620000000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"crossref"}]},{"name":"NSF","award":["1718586"],"award-info":[{"award-number":["1718586"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["62074131"],"award-info":[{"award-number":["62074131"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Comput. Surv."],"published-print":{"date-parts":[[2022,5,31]]},"abstract":"<jats:p>Information flow tracking (IFT) is a fundamental computer security technique used to understand how information moves through a computing system. Hardware IFT techniques specifically target security vulnerabilities related to the design, verification, testing, manufacturing, and deployment of hardware circuits. Hardware IFT can detect unintentional design flaws, malicious circuit modifications, timing side channels, access control violations, and other insecure hardware behaviors. This article surveys the area of hardware IFT. We start with a discussion on the basics of IFT, whose foundations were introduced by Denning in the 1970s. Building upon this, we develop a taxonomy for hardware IFT. We use this to classify and differentiate hardware IFT tools and techniques. Finally, we discuss the challenges yet to be resolved. The survey shows that hardware IFT provides a powerful technique for identifying hardware security vulnerabilities, as well as verifying and enforcing hardware security properties.<\/jats:p>","DOI":"10.1145\/3447867","type":"journal-article","created":{"date-parts":[[2021,5,4]],"date-time":"2021-05-04T03:42:46Z","timestamp":1620099766000},"page":"1-39","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":72,"title":["Hardware Information Flow Tracking"],"prefix":"10.1145","volume":"54","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6738-4297","authenticated-orcid":false,"given":"Wei","family":"Hu","sequence":"first","affiliation":[{"name":"Northwestern Polytechnical University, Shaanxi, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Armaiti","family":"Ardeshiricham","sequence":"additional","affiliation":[{"name":"University of California, San Diego, La Jolla, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9062-5570","authenticated-orcid":false,"given":"Ryan","family":"Kastner","sequence":"additional","affiliation":[{"name":"University of California, San Diego, La Jolla, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2021,5,3]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/AIMSEC.2011.6011436"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203772"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927266"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3354246"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2535838.2535839"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNSM.2013.122313.130423"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062203"},{"key":"e_1_2_1_8_1","volume-title":"Principles of Verifiable RTL Design","author":"Bening Lionel","edition":"2"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927268"},{"key":"e_1_2_1_10_1","first-page":"10","article-title":"Data secrecy protection through information flow tracking in proof-carrying hardware IP\u2014Part II","volume":"12","author":"Bidmeshki Mohammad-Mahdi","year":"2017","journal-title":"Framework Automation. IEEE Trans. Inf. Forensics Security"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2015.7140256"},{"key":"e_1_2_1_12_1","unstructured":"Jeremy Blackstone Wei Hu Alric Althoff Armaiti Ardeshiricham Lu Zhang and Ryan Kastner. 2020. A unified model for gate level propagation analysis. arxiv:2012.02791 Jeremy Blackstone Wei Hu Alric Althoff Armaiti Ardeshiricham Lu Zhang and Ryan Kastner. 2020. A unified model for gate level propagation analysis. arxiv:2012.02791"},{"key":"e_1_2_1_13_1","volume-title":"Comp. Sec. App. Conf. (ACSAC). 121--130","author":"James"},{"key":"e_1_2_1_14_1","volume-title":"Proc. USENIX Security Symp. (USENIX Security). 991--1008","author":"Bulck Jo Van","year":"2018"},{"key":"e_1_2_1_15_1","volume-title":"Proc. IEEE Int. Verification Security Workshop (IVSW). 1--6.","author":"Cabodi G."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2017.2713393"},{"key":"e_1_2_1_17_1","volume-title":"JasperGold Security Path Verification App. Retrieved","year":"2021"},{"key":"e_1_2_1_18_1","volume-title":"Yu Ting Chen, Hsuan Hsiao, Jeffrey Goeders, Stephen Brown, and Jason Anderson.","author":"Canis Andrew","year":"2016"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.20"},{"key":"e_1_2_1_20_1","volume-title":"Proc. ACM Conf. Comp. Comm. Sec. (CCS). ACM","author":"Chen Yu-Yuan"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3123955"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.5555\/1891823.1891830"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1067625.806556"},{"key":"e_1_2_1_24_1","first-page":"297","article-title":"Information transmission in sequential programs","volume":"151","author":"Cohen Ellis S.","year":"1978","journal-title":"Foundations Sec. Comp."},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1273440.1250722"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744847"},{"key":"e_1_2_1_28_1","volume-title":"Proc. Int. Symp. Microarchitecture (MICRO). 137--148","author":"Deng Daniel Y."},{"key":"e_1_2_1_29_1","volume-title":"Proc. IEEE\/IFIP Int. Conf. Depend. Syst. Netw. (DSN). 1--12","author":"Deng Daniel Y."},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/3337167.3337174"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/360051.360056"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/365230.365252"},{"key":"e_1_2_1_34_1","volume-title":"Proc. USENIX Security Symp. (USENIX Security). 213--230","author":"Dessouky Ghada","year":"2019"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/2775054.2694383"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/1095809.1095813"},{"key":"e_1_2_1_37_1","volume-title":"Proc. USENIX Annual Technical Conf.","author":"Egele Manuel","year":"2007"},{"key":"e_1_2_1_38_1","volume-title":"Proc. Des. Autom. Conf. (DAC). 1--6.","author":"Ferraiuolo Andrew"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/3093337.3037739"},{"key":"e_1_2_1_40_1","volume-title":"Proc. ACM Conf. Comp. Comm. Sec. (CCS). ACM","author":"Ferraiuolo Andrew"},{"key":"e_1_2_1_41_1","volume-title":"Applied Assertion-Based Verification: An Industry Perspective","author":"Foster Harry"},{"key":"e_1_2_1_42_1","volume-title":"Assertion-Based Design","author":"Foster Harry"},{"key":"e_1_2_1_43_1","volume-title":"Proc. IEEE Symp. Security Privacy. 11--20","author":"Joseph"},{"key":"e_1_2_1_44_1","volume-title":"Questa Secure Check\u2014Exhaustive Verification of Secure Paths to Critical Hardware Storage. Retrieved","author":"Graphics Mentor","year":"2021"},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714906"},{"key":"e_1_2_1_46_1","volume-title":"Jasper Case Study on Formally Verifying Secure On-Chip Datapaths. Retrieved","author":"Hanna Ziyad","year":"2021"},{"key":"e_1_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203805"},{"key":"e_1_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/2746238"},{"key":"e_1_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1109\/MTV.2016.12"},{"key":"e_1_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240839"},{"key":"e_1_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1109\/MTV.2017.11"},{"key":"e_1_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967046"},{"key":"e_1_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2016.225"},{"key":"e_1_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1145\/2676548"},{"key":"e_1_2_1_55_1","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1109\/LES.2013.2261572","article-title":"Expanding gate level information flow tracking for multilevel security","volume":"5","author":"Hu Wei","year":"2013","journal-title":"IEEE Embedd. Syst. Lett."},{"key":"e_1_2_1_56_1","volume-title":"Proc. Int. Workshop Logic Synthesis (IWLS).","author":"Hu Wei","year":"2011"},{"key":"e_1_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2120970"},{"key":"e_1_2_1_58_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2012.2189105"},{"key":"e_1_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429511"},{"key":"e_1_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2018.8605726"},{"key":"e_1_2_1_61_1","volume-title":"Proc. IEEE Asian Test Symp. (ATS). 1--6.","author":"Hu W."},{"key":"e_1_2_1_62_1","doi-asserted-by":"publisher","DOI":"10.1007\/11863908_28"},{"key":"e_1_2_1_63_1","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516704"},{"key":"e_1_2_1_64_1","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3243415"},{"key":"e_1_2_1_65_1","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317798"},{"key":"e_1_2_1_66_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2017.2707323"},{"key":"e_1_2_1_67_1","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2012.6231062"},{"key":"e_1_2_1_68_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2013.6581573"},{"key":"e_1_2_1_69_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.112"},{"key":"e_1_2_1_70_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2009.5270347"},{"key":"e_1_2_1_71_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-39611-3_6"},{"key":"e_1_2_1_72_1","volume-title":"Proc. Int. Conf. Engineering Reconfig. Syst. Algorithms (ERSA).","author":"Kastner Ryan","year":"2011"},{"key":"e_1_2_1_73_1","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665726"},{"key":"e_1_2_1_74_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629596"},{"key":"e_1_2_1_75_1","doi-asserted-by":"crossref","unstructured":"Paul Kocher Daniel Genkin Daniel Gruss Werner Haas Mike Hamburg Moritz Lipp Stefan Mangard Thomas Prescher Michael Schwarz and Yuval Yarom. 2018. Spectre attacks: Exploiting speculative execution. arxiv:1801.01203 Paul Kocher Daniel Genkin Daniel Gruss Werner Haas Mike Hamburg Moritz Lipp Stefan Mangard Thomas Prescher Michael Schwarz and Yuval Yarom. 2018. Spectre attacks: Exploiting speculative execution. arxiv:1801.01203","DOI":"10.1109\/SP.2019.00002"},{"key":"e_1_2_1_76_1","volume-title":"Advances in Cryptology\u2014CRYPTO\u201999","author":"Kocher Paul"},{"key":"e_1_2_1_77_1","volume-title":"RSA, DSS, and other systems. In Advances in Cryptology\u2014CRYPTO\u201996","author":"Kocher Paul C."},{"key":"e_1_2_1_78_1","doi-asserted-by":"publisher","DOI":"10.1145\/1323293.1294293"},{"key":"e_1_2_1_79_1","doi-asserted-by":"publisher","DOI":"10.1145\/362375.362389"},{"key":"e_1_2_1_80_1","doi-asserted-by":"publisher","DOI":"10.1145\/775265.775268"},{"key":"e_1_2_1_81_1","doi-asserted-by":"publisher","DOI":"10.1145\/2902961.2903040"},{"key":"e_1_2_1_82_1","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744830"},{"key":"e_1_2_1_83_1","doi-asserted-by":"publisher","DOI":"10.1145\/2907611"},{"key":"e_1_2_1_84_1","volume-title":"Proc. SIGPLAN Workshop Prog. Lang. Analysis Sec. (PLAS). ACM","author":"Li Xun"},{"key":"e_1_2_1_85_1","volume-title":"Proc. SIGPLAN Workshop Prog. Lang. Analysis Sec. ACM","author":"Li Xun"},{"key":"e_1_2_1_86_1","doi-asserted-by":"publisher","DOI":"10.1145\/1993498.1993512"},{"key":"e_1_2_1_87_1","volume-title":"Proc. IEEE Int. Conf. App.-Specific Syst. Archit. Processors (ASAP). 349--352","author":"Li Xun"},{"key":"e_1_2_1_88_1","unstructured":"Moritz Lipp Michael Schwarz Daniel Gruss Thomas Prescher Werner Haas Stefan Mangard Paul Kocher Daniel Genkin Yuval Yarom and Mike Hamburg. 2018. Meltdown. arxiv:1801.01207 Moritz Lipp Michael Schwarz Daniel Gruss Thomas Prescher Werner Haas Stefan Mangard Paul Kocher Daniel Genkin Yuval Yarom and Mike Hamburg. 2018. Meltdown. arxiv:1801.01207"},{"key":"e_1_2_1_89_1","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2009.5340171"},{"key":"e_1_2_1_90_1","doi-asserted-by":"publisher","DOI":"10.1145\/3264888.3264889"},{"key":"e_1_2_1_91_1","doi-asserted-by":"publisher","DOI":"10.1145\/2487726.2487732"},{"key":"e_1_2_1_92_1","doi-asserted-by":"publisher","DOI":"10.1145\/1631716.1631722"},{"key":"e_1_2_1_93_1","doi-asserted-by":"publisher","DOI":"10.1145\/2380403.2380415"},{"key":"e_1_2_1_94_1","volume-title":"Hardware and Software: Verification and Testing","author":"Mazzawi Jamil"},{"key":"e_1_2_1_95_1","volume-title":"From Simulation to Emulation\u2014A Fully Reusable UVM Framework. Retrieved","author":"Graphics Mentor","year":"2021"},{"key":"e_1_2_1_96_1","volume-title":"Common Weakness Enumeration (CWE). Retrieved","author":"MITRE.","year":"2021"},{"key":"e_1_2_1_97_1","volume-title":"Radix-M Hardware Security Platform for Firmware Security Validation. Retrieved","author":"Logic Tortuga","year":"2021"},{"key":"e_1_2_1_98_1","volume-title":"Radix-S Hardware Root of Trust Security Verification Framework. Retrieved","author":"Logic Tortuga","year":"2021"},{"key":"e_1_2_1_99_1","volume-title":"Measurable Hardware Security with MITRE CWEs. Retrieved","author":"Logic Tortuga","year":"2021"},{"key":"e_1_2_1_100_1","doi-asserted-by":"crossref","volume-title":"Department of Defense Trusted Computer System Evaluation Criteria","author":"US Department of Defense. 1985.","DOI":"10.1007\/978-1-349-12020-8_1"},{"key":"e_1_2_1_101_1","doi-asserted-by":"publisher","DOI":"10.5555\/2699855.2699858"},{"key":"e_1_2_1_102_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2007.17"},{"key":"e_1_2_1_103_1","first-page":"1","article-title":"A bottom-up approach to verifiable embedded system information flow security","volume":"8","author":"Mu Dejun","year":"2014","journal-title":"IET Inf. Sec."},{"key":"e_1_2_1_104_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2013.35"},{"key":"e_1_2_1_105_1","doi-asserted-by":"publisher","DOI":"10.1145\/269005.266669"},{"key":"e_1_2_1_106_1","volume-title":"Proc. Workshop Interac. Compil. Comp. Archit.","author":"Nagarajan Vijay","year":"2008"},{"key":"e_1_2_1_107_1","doi-asserted-by":"publisher","DOI":"10.1145\/3383445"},{"key":"e_1_2_1_108_1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2017.8242062"},{"key":"e_1_2_1_109_1","volume-title":"Proc. Netw. Distrib. Syst. Sec. Symp. (NDSS)","volume":"5","author":"Newsome James","year":"2005"},{"key":"e_1_2_1_110_1","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS48704.2020.9184573"},{"key":"e_1_2_1_111_1","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346321"},{"key":"e_1_2_1_112_1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837337"},{"key":"e_1_2_1_113_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024782"},{"key":"e_1_2_1_114_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2331332"},{"key":"e_1_2_1_115_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2013.2247457"},{"key":"e_1_2_1_116_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.189"},{"key":"e_1_2_1_117_1","volume-title":"Proc. IEEE High Perform. Extreme Comput. Conf. (HPEC). 1--7.","author":"Palmiero Christian"},{"key":"e_1_2_1_118_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2857321"},{"key":"e_1_2_1_119_1","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218494"},{"key":"e_1_2_1_120_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2834421"},{"key":"e_1_2_1_121_1","doi-asserted-by":"publisher","DOI":"10.1109\/CODES-ISSS.2013.6658991"},{"key":"e_1_2_1_122_1","volume-title":"Verilog + Information Flow V1.0. Retrieved","author":"Project SecVerilog","year":"2021"},{"key":"e_1_2_1_123_1","volume-title":"Proc. IEEE Int. Verification Security Workshop (IVSW). IEEE","author":"Qin Maoyuan","year":"2018"},{"key":"e_1_2_1_124_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.cose.2019.05.005"},{"key":"e_1_2_1_125_1","unstructured":"Sharon Rosenberg and Kathleen Meade. 2013. A Practical Guide to Adopting the Universal Verification Methodology (UVM). Cadence. Sharon Rosenberg and Kathleen Meade. 2013. A Practical Guide to Adopting the Universal Verification Methodology (UVM). Cadence."},{"key":"e_1_2_1_126_1","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378538"},{"key":"e_1_2_1_127_1","volume-title":"Proc. Int. Symp. Comp. Archit. (ISCA). ACM","author":"Harry"},{"key":"e_1_2_1_128_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2002.806121"},{"key":"e_1_2_1_129_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657085"},{"key":"e_1_2_1_130_1","first-page":"0661","article-title":"End-to-end arguments in system design","volume":"100","author":"Saltzer Jerome H.","year":"1984","journal-title":"Technology"},{"key":"e_1_2_1_131_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2857041"},{"key":"e_1_2_1_132_1","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2966991"},{"key":"e_1_2_1_133_1","doi-asserted-by":"publisher","DOI":"10.1109\/PRDC.2009.30"},{"key":"e_1_2_1_134_1","doi-asserted-by":"publisher","DOI":"10.1109\/HONET.2019.8908033"},{"key":"e_1_2_1_135_1","doi-asserted-by":"publisher","DOI":"10.1109\/IVSW.2019.8854418"},{"key":"e_1_2_1_136_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2016.9"},{"key":"e_1_2_1_137_1","volume-title":"Proc. Des. Autom. Test Europe Conf. Exhib. (DATE). IEEE","author":"Subramanyan Pramod","year":"2014"},{"key":"e_1_2_1_138_1","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0793"},{"key":"e_1_2_1_139_1","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024404"},{"key":"e_1_2_1_140_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICIVC.2017.7984724"},{"key":"e_1_2_1_141_1","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2017.2780254"},{"key":"e_1_2_1_142_1","first-page":"62","article-title":"A multi-flow information flow tracking approach for proving quantitative hardware security properties. Tsinghua Sci","volume":"26","author":"Tai Yu","year":"2021","journal-title":"Tech."},{"key":"e_1_2_1_143_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669174"},{"key":"e_1_2_1_144_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.17"},{"key":"e_1_2_1_145_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000087"},{"key":"e_1_2_1_146_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508258"},{"key":"e_1_2_1_147_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358327"},{"key":"e_1_2_1_148_1","volume-title":"Proc. Int. Symp. Microarchitecture (MICRO). 243--254","author":"Vachharajani Neil"},{"key":"e_1_2_1_149_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658637"},{"key":"e_1_2_1_150_1","doi-asserted-by":"publisher","DOI":"10.3233\/JCS-1996-42-304"},{"key":"e_1_2_1_151_1","doi-asserted-by":"publisher","DOI":"10.1109\/RECONFIG.2018.8641695"},{"key":"e_1_2_1_152_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2016.7577396"},{"key":"e_1_2_1_153_1","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056767"},{"key":"e_1_2_1_154_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297408"},{"key":"e_1_2_1_155_1","volume-title":"Marina Minkin, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Raoul Strackx, Thomas F. Wenisch, and Yuval Yarom.","author":"Weisse Ofir","year":"2018"},{"key":"e_1_2_1_156_1","doi-asserted-by":"publisher","DOI":"10.1145\/355616.364017"},{"key":"e_1_2_1_157_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2016.10"},{"key":"e_1_2_1_158_1","volume-title":"Proc. Int. Symp. Microarchitecture (MICRO). ACM","author":"Yu Jiyong"},{"key":"e_1_2_1_159_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISOCC.2011.6138671"},{"key":"e_1_2_1_160_1","volume-title":"Proc. IEEE Comp. Sec. Foundations Symp. (CSF). 272--27215","author":"Zagieboylo Drew"},{"key":"e_1_2_1_161_1","doi-asserted-by":"publisher","DOI":"10.1145\/2018396.2018419"},{"key":"e_1_2_1_162_1","first-page":"293","article-title":"Securing distributed systems with information flow control","volume":"8","author":"Zeldovich Nickolai","year":"2008","journal-title":"Proc. Netw. Syst. Des. Impl. (NSDI)"},{"key":"e_1_2_1_163_1","volume-title":"Proc. Int. Conf. Arch. Supp. Prog. Lang. Oper. Sys. (ASPLOS). ACM","author":"Zhang Danfeng"},{"key":"e_1_2_1_164_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00030"},{"key":"e_1_2_1_165_1","volume-title":"Proc. Int. SoC Des. Conf. (ISOCC). IEEE","author":"Hoon Yean Ling","year":"2012"}],"container-title":["ACM Computing Surveys"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3447867","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3447867","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3447867","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T17:49:28Z","timestamp":1750268968000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3447867"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5,3]]},"references-count":163,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2022,5,31]]}},"alternative-id":["10.1145\/3447867"],"URL":"https:\/\/doi.org\/10.1145\/3447867","relation":{},"ISSN":["0360-0300","1557-7341"],"issn-type":[{"value":"0360-0300","type":"print"},{"value":"1557-7341","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,5,3]]},"assertion":[{"value":"2020-04-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2021-01-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2021-05-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}