{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,12]],"date-time":"2026-03-12T01:05:30Z","timestamp":1773277530776,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":41,"publisher":"ACM","license":[{"start":{"date-parts":[[2021,6,18]],"date-time":"2021-06-18T00:00:00Z","timestamp":1623974400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2021,6,19]]},"DOI":"10.1145\/3453483.3454105","type":"proceedings-article","created":{"date-parts":[[2021,6,18]],"date-time":"2021-06-18T13:51:32Z","timestamp":1624024292000},"page":"1218-1232","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":30,"title":["Mirror: making lock-free data structures persistent"],"prefix":"10.1145","author":[{"given":"Michal","family":"Friedman","sequence":"first","affiliation":[{"name":"Technion, Israel"}]},{"given":"Erez","family":"Petrank","sequence":"additional","affiliation":[{"name":"Technion, Israel"}]},{"given":"Pedro","family":"Ramalhete","sequence":"additional","affiliation":[{"name":"Cisco Systems, Switzerland"}]}],"member":"320","published-online":{"date-parts":[[2021,6,18]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"AMD. [n.d.]. AMD64 Architecture Programmer\u2019s Manual.. https:\/\/www.amd.com\/system\/files\/TechDocs\/24594.pdf  AMD. [n.d.]. AMD64 Architecture Programmer\u2019s Manual.. https:\/\/www.amd.com\/system\/files\/TechDocs\/24594.pdf"},{"key":"e_1_3_2_1_2_1","unstructured":"ARM. 2018. ARM Architecture Reference Manual ARMv8. https:\/\/static.docs.arm.com\/ddi0487\/da\/DDI0487D_a_armv8_arm.pdf  ARM. 2018. ARM Architecture Reference Manual ARMv8. https:\/\/static.docs.arm.com\/ddi0487\/da\/DDI0487D_a_armv8_arm.pdf"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.14778\/3025111.3025122"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/3332466.3374506"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2983990.2984019"},{"key":"e_1_3_2_1_6_1","unstructured":"C++. [n.d.]. Std::atomic Library. https:\/\/en.cppreference.com\/w\/cpp\/atomic  C++. [n.d.]. Std::atomic Library. https:\/\/en.cppreference.com\/w\/cpp\/atomic"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3381898.3397212"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2660193.2660224"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950380"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3210377.3210400"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","unstructured":"Brian F. Cooper Adam Silberstein Erwin Tam Raghu Ramakrishnan and Russell Sears. 2010. Benchmarking Cloud Serving Systems with YCSB.  Brian F. Cooper Adam Silberstein Erwin Tam Raghu Ramakrishnan and Russell Sears. 2010. Benchmarking Cloud Serving Systems with YCSB.","DOI":"10.1145\/1807128.1807152"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/3342195.3387515"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.5555\/3277355.3277392"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/2694344.2694359"},{"key":"e_1_3_2_1_15_1","unstructured":"Facebook. [n.d.]. RocksDB. https:\/\/github.com\/facebook\/rocksdb  Facebook. [n.d.]. RocksDB. https:\/\/github.com\/facebook\/rocksdb"},{"key":"e_1_3_2_1_16_1","unstructured":"Keir Fraser. 2003. Practical lock-freedom.  Keir Fraser. 2003. Practical lock-freedom."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/3385412.3386031"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/3178487.3178490"},{"key":"e_1_3_2_1_19_1","unstructured":"Google. [n.d.]. LevelDB. https:\/\/github.com\/google\/leveldb  Google. [n.d.]. LevelDB. https:\/\/github.com\/google\/leveldb"},{"key":"e_1_3_2_1_20_1","volume-title":"Proceedings of the 2019 USENIX Conference on Usenix Annual Technical Conference (USENIX ATC \u201919)","author":"Gu Jinyu","year":"2019","unstructured":"Jinyu Gu , Qianqian Yu , Xiayang Wang , Zhaoguo Wang , Binyu Zang , Haibing Guan , and Haibo Chen . 2019 . Pisces: A Scalable and Efficient Persistent Transactional Memory . In Proceedings of the 2019 USENIX Conference on Usenix Annual Technical Conference (USENIX ATC \u201919) . USENIX Association, USA. 913\u2013928. isbn:978 1939133038 Jinyu Gu, Qianqian Yu, Xiayang Wang, Zhaoguo Wang, Binyu Zang, Haibing Guan, and Haibo Chen. 2019. Pisces: A Scalable and Efficient Persistent Transactional Memory. In Proceedings of the 2019 USENIX Conference on Usenix Annual Technical Conference (USENIX ATC \u201919). USENIX Association, USA. 913\u2013928. isbn:9781939133038"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"crossref","unstructured":"Timothy L Harris. 2001. A pragmatic implementation of non-blocking linked-lists. 300\u2013314.  Timothy L Harris. 2001. A pragmatic implementation of non-blocking linked-lists. 300\u2013314.","DOI":"10.1007\/3-540-45414-4_21"},{"key":"e_1_3_2_1_22_1","volume-title":"Linearizability: A correctness condition for concurrent objects. 12, 3","author":"Herlihy Maurice P","year":"1990","unstructured":"Maurice P Herlihy and Jeannette M Wing . 1990 . Linearizability: A correctness condition for concurrent objects. 12, 3 (1990), 463\u2013492. Maurice P Herlihy and Jeannette M Wing. 1990. Linearizability: A correctness condition for concurrent objects. 12, 3 (1990), 463\u2013492."},{"key":"e_1_3_2_1_23_1","unstructured":"Intel. [n.d.]. Developers Intel64 and IA-32 Architectures Software Manuals Combined. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/intel-sdm.html  Intel. [n.d.]. Developers Intel64 and IA-32 Architectures Software Manuals Combined. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/intel-sdm.html"},{"key":"e_1_3_2_1_24_1","unstructured":"Intel. [n.d.]. Intel Architecture Instruction Set Extensions Programming Reference. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/download\/intel-architecture-instruction-set-extensions-programming-reference.html  Intel. [n.d.]. Intel Architecture Instruction Set Extensions Programming Reference. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/download\/intel-architecture-instruction-set-extensions-programming-reference.html"},{"key":"e_1_3_2_1_25_1","unstructured":"Intel. [n.d.]. Persistent Memory Library. https:\/\/pmem.io.  Intel. [n.d.]. Persistent Memory Library. https:\/\/pmem.io."},{"key":"e_1_3_2_1_26_1","unstructured":"Intel. [n.d.]. pmemkv-bench.. https:\/\/github.com\/pmem\/pmemkv-bench  Intel. [n.d.]. pmemkv-bench.. https:\/\/github.com\/pmem\/pmemkv-bench"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-53426-7_23"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00045"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2872362.2872381"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037714"},{"key":"e_1_3_2_1_31_1","volume-title":"Persistent Memory Transactions. CoRR, abs\/1804.00701","author":"Marathe Virendra J.","year":"2018","unstructured":"Virendra J. Marathe , Achin Mishra , Amee Trivedi , Yihe Huang , Faisal Zaghloul , Sanidhya Kashyap , Margo Seltzer , Tim Harris , Steve Byan , Bill Bridge , and Dave Dice . 2018. Persistent Memory Transactions. CoRR, abs\/1804.00701 ( 2018 ), arxiv:1804.00701. arxiv:1804.00701 Virendra J. Marathe, Achin Mishra, Amee Trivedi, Yihe Huang, Faisal Zaghloul, Sanidhya Kashyap, Margo Seltzer, Tim Harris, Steve Byan, Bill Bridge, and Dave Dice. 2018. Persistent Memory Transactions. CoRR, abs\/1804.00701 (2018), arxiv:1804.00701. arxiv:1804.00701"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/3064176.3064215"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/3373376.3378456"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"crossref","unstructured":"Aravind Natarajan and Neeraj Mittal. 2014. Fast Concurrent Lock-free Binary Search Trees.  Aravind Natarajan and Neeraj Mittal. 2014. Fast Concurrent Lock-free Binary Search Trees.","DOI":"10.1145\/2555243.2555256"},{"key":"e_1_3_2_1_35_1","volume-title":"Proc. ACM Program. Lang., 4, POPL","author":"Raad Azalea","year":"2019","unstructured":"Azalea Raad , John Wickerson , Gil Neiger , and Viktor Vafeiadis . 2019 . Persistency Semantics of the Intel-X86 Architecture . Proc. ACM Program. Lang., 4, POPL (2019), Article 11, 31 pages. Azalea Raad, John Wickerson, Gil Neiger, and Viktor Vafeiadis. 2019. Persistency Semantics of the Intel-X86 Architecture. Proc. ACM Program. Lang., 4, POPL (2019), Article 11, 31 pages."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/3360561"},{"key":"e_1_3_2_1_37_1","volume-title":"OneFile: A Wait-Free Persistent Transactional Memory. In 2019 49th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks (DSN). 151\u2013163","author":"Ramalhete Pedro","year":"2019","unstructured":"Pedro Ramalhete , Andreia Correia , Pascal Felber , and Nachshon Cohen . 2019 . OneFile: A Wait-Free Persistent Transactional Memory. In 2019 49th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks (DSN). 151\u2013163 . Pedro Ramalhete, Andreia Correia, Pascal Felber, and Nachshon Cohen. 2019. OneFile: A Wait-Free Persistent Transactional Memory. In 2019 49th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks (DSN). 151\u2013163."},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4842-4932-1_9"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950379"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/1961296.1950379"},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"crossref","unstructured":"Yoav Zuriel Michal Friedman Gali Sheffi Nachshon Cohen and Erez Petrank. 2019. Efficient Lock-Free Durable Sets.  Yoav Zuriel Michal Friedman Gali Sheffi Nachshon Cohen and Erez Petrank. 2019. Efficient Lock-Free Durable Sets.","DOI":"10.1145\/3360554"}],"event":{"name":"PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation","location":"Virtual Canada","acronym":"PLDI '21","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages"]},"container-title":["Proceedings of the 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3453483.3454105","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3453483.3454105","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T20:47:48Z","timestamp":1750193268000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3453483.3454105"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,6,18]]},"references-count":41,"alternative-id":["10.1145\/3453483.3454105","10.1145\/3453483"],"URL":"https:\/\/doi.org\/10.1145\/3453483.3454105","relation":{},"subject":[],"published":{"date-parts":[[2021,6,18]]},"assertion":[{"value":"2021-06-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}