{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,3]],"date-time":"2025-12-03T17:57:57Z","timestamp":1764784677253,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":13,"publisher":"ACM","license":[{"start":{"date-parts":[[2021,6,22]],"date-time":"2021-06-22T00:00:00Z","timestamp":1624320000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2021,6,22]]},"DOI":"10.1145\/3453688.3461758","type":"proceedings-article","created":{"date-parts":[[2021,6,18]],"date-time":"2021-06-18T23:13:45Z","timestamp":1624058025000},"page":"207-212","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["The Curious Case of Trusted IC Provisioning in Untrusted Testing Facilities"],"prefix":"10.1145","author":[{"given":"Sandip","family":"Ray","sequence":"first","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Atul Prasad","family":"Deb Nath","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kshitij","family":"Raj","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesviile, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Swarup","family":"Bhunia","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2021,6,22]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Defense Microelectronics Activity. 2017. DMEA Trusted IC Program. https: \/\/www.dmea.osd.mil\/TrustedIC.aspx\/."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2028166"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2020.2977534"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297409"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513115"},{"key":"e_1_3_2_1_7_1","volume-title":"MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array. In Cryptographic Hardware and Embedded Systems -- CHES","author":"Krishna Aswin Raghav","year":"2011","unstructured":"Aswin Raghav Krishna, Seetharam Narasimhan, Xinmu Wang, and Swarup Bhunia. 2011. MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array. In Cryptographic Hardware and Embedded Systems -- CHES 2011, Bart Preneel and Tsuyoshi Takagi (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg, 407--420."},{"key":"e_1_3_2_1_8_1","unstructured":"Bill McClean. 2020. McClean Report: A Complete Analysis and Forecast of the Integrated Circuit Industry. https:\/\/www.icinsights.com\/news\/bulletins\/Fabless-Company-Share-Of-IC-Sales-To-Set-New-Record-In-2020-At-329-\/."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001361"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228377"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484823"},{"key":"e_1_3_2_1_12_1","unstructured":"Reuters Staff. 2017. TSMC says latest chip plant will cost around $20 bln. https:\/\/www.reuters.com\/article\/tsmc-investment\/tsmc-says-latest-chip-plant-will-cost-around-20-bln-idUSL3N1O737Z."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2015.714025"}],"event":{"name":"GLSVLSI '21: Great Lakes Symposium on VLSI 2021","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Virtual Event USA","acronym":"GLSVLSI '21"},"container-title":["Proceedings of the 2021 Great Lakes Symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3453688.3461758","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3453688.3461758","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T21:28:47Z","timestamp":1750195727000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3453688.3461758"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,6,22]]},"references-count":13,"alternative-id":["10.1145\/3453688.3461758","10.1145\/3453688"],"URL":"https:\/\/doi.org\/10.1145\/3453688.3461758","relation":{},"subject":[],"published":{"date-parts":[[2021,6,22]]},"assertion":[{"value":"2021-06-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}