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Archit. Code Optim."],"published-print":{"date-parts":[[2021,12,31]]},"abstract":"<jats:p>The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this article, we present gem5-X, a system-level simulation framework, based on gem-5, for architectural exploration of heterogeneous many-core systems. To demonstrate the capabilities of gem5-X, real-time video analytics is used as a case-study. It is composed of two kernels, namely, video encoding and image classification using convolutional neural networks (CNNs). First, we explore through gem5-X the benefits of latest 3D high bandwidth memory (HBM2) in different architectural configurations. Then, using a two-step exploration methodology, we develop a new optimized clustered-heterogeneous architecture with HBM2 in gem5-X for video analytics application. In this proposed clustered-heterogeneous architecture, ARMv8 in-order cluster with in-cache computing engine executes the video encoding kernel, giving 20% performance and 54% energy benefits compared to baseline ARM in-order and Out-of-Order systems, respectively. Furthermore, thanks to gem5-X, we conclude that ARM Out-of-Order clusters with HBM2 are the best choice to run visual recognition using CNNs, as they outperform DDR4-based system by up to 30% both in terms of performance and energy savings.<\/jats:p>","DOI":"10.1145\/3461662","type":"journal-article","created":{"date-parts":[[2021,7,17]],"date-time":"2021-07-17T10:05:22Z","timestamp":1626516322000},"page":"1-27","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":25,"title":["Gem5-X"],"prefix":"10.1145","volume":"18","author":[{"given":"Yasir Mahmood","family":"Qureshi","sequence":"first","affiliation":[{"name":"Embedded Systems Laboratory (ESL), Swiss Federal Institute of Technology Lausanne (EPFL), Switzerland"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2516-3899","authenticated-orcid":false,"given":"William Andrew","family":"Simon","sequence":"additional","affiliation":[{"name":"Embedded Systems Laboratory (ESL), Swiss Federal Institute of Technology Lausanne (EPFL), Switzerland"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6971-1965","authenticated-orcid":false,"given":"Marina","family":"Zapater","sequence":"additional","affiliation":[{"name":"Embedded Systems Laboratory (ESL), Swiss Federal Institute of Technology Lausanne (EPFL), Switzerland"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1821-124X","authenticated-orcid":false,"given":"Katzalin","family":"Olcoz","sequence":"additional","affiliation":[{"name":"Complutense University of Madrid (UCM), Spain"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9536-4947","authenticated-orcid":false,"given":"David","family":"Atienza","sequence":"additional","affiliation":[{"name":"Embedded Systems Laboratory (ESL), Swiss Federal Institute of Technology Lausanne (EPFL), Switzerland"}]}],"member":"320","published-online":{"date-parts":[[2021,7,17]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"96Boards. 2018. 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