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Hence, they need protection against malicious forms of reverse engineering (e.g., in IP piracy). With a growing shift of ML to the edge devices, in part for performance and in part for privacy benefits, the models have become susceptible to the so-called physical side-channel attacks.<\/jats:p>\n          <jats:p>\n            ML being a relatively new target compared to cryptography poses the problem of side-channel analysis in a context that lacks published literature. The gap between the burgeoning edge-based ML devices and the research on adequate defenses to provide side-channel security for them thus motivates our study. Our work develops and combines different flavors of side-channel defenses for ML models in the hardware blocks. We propose and optimize the\n            <jats:italic>first defense based on Boolean masking<\/jats:italic>\n            . We first implement all the masked hardware blocks. We then present an adder optimization to reduce the area and latency overheads. Finally, we couple it with a shuffle-based defense.\n          <\/jats:p>\n          <jats:p>We quantify that the area-delay overhead of masking ranges from 5.4\u00d7 to 4.7\u00d7 depending on the adder topology used and demonstrate a first-order side-channel security of millions of power traces. Additionally, the shuffle countermeasure impedes a straightforward second-order attack on our first-order masked implementation.<\/jats:p>","DOI":"10.1145\/3465377","type":"journal-article","created":{"date-parts":[[2022,2,2]],"date-time":"2022-02-02T22:15:29Z","timestamp":1643840129000},"page":"1-31","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":31,"title":["Guarding Machine Learning Hardware Against Physical Side-channel Attacks"],"prefix":"10.1145","volume":"18","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5111-3609","authenticated-orcid":false,"given":"Anuj","family":"Dubey","sequence":"first","affiliation":[{"name":"North Carolina State University, Raleigh, North Carolina, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rosario","family":"Cammarota","sequence":"additional","affiliation":[{"name":"Emerging Security Lab, Intel Corporation, San Diego, California, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Vikram","family":"Suresh","sequence":"additional","affiliation":[{"name":"Circuit Research Lab, Intel Corporation, Hillsboro, Oregon, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Aydin","family":"Aysu","sequence":"additional","affiliation":[{"name":"North Carolina State University, Raleigh, North Carolina, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2022,4,28]]},"reference":[{"key":"e_1_3_2_2_2","first-page":"1615","volume-title":"Proceedings of the 27th USENIX Security Symposium (USENIX Security\u201918)","author":"Adi Yossi","year":"2018","unstructured":"Yossi Adi, Carsten Baum, Moustapha Ciss\u00e9, Benny Pinkas, and Joseph Keshet. 2018. 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