{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T16:02:45Z","timestamp":1780675365451,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":67,"publisher":"ACM","license":[{"start":{"date-parts":[[2021,10,17]],"date-time":"2021-10-17T00:00:00Z","timestamp":1634428800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"DARPA","award":["HR0011-18-C-0122"],"award-info":[{"award-number":["HR0011-18-C-0122"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2021,10,18]]},"DOI":"10.1145\/3466752.3480094","type":"proceedings-article","created":{"date-parts":[[2021,10,17]],"date-time":"2021-10-17T19:12:05Z","timestamp":1634497925000},"page":"507-521","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["NOVIA: A Framework for Discovering Non-Conventional Inline Accelerators"],"prefix":"10.1145","author":[{"given":"David","family":"Trilla","sequence":"first","affiliation":[{"name":"IBM Research"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"John-David","family":"Wellman","sequence":"additional","affiliation":[{"name":"IBM Research"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alper","family":"Buyuktosunoglu","sequence":"additional","affiliation":[{"name":"IBM Research, United States of America"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pradip","family":"Bose","sequence":"additional","affiliation":[{"name":"IBM Research, United States of America"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2021,10,17]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/567067.567085"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.915536"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775897"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1998.694777"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1997.645801"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2872362.2872414"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1996.566449"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168949"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.27"},{"key":"e_1_3_2_1_10_1","volume-title":"ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks. In 2018 IEEE International Symposium on Workload Characterization, IISWC 2018","author":"Bulla Calvin","year":"2018","unstructured":"Calvin Bulla , Lluc Alvarez , Miquel Moret\u00f3 , Ramon Bertran , Alper Buyuktosunoglu , and Pradip Bose . 2018 . ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks. In 2018 IEEE International Symposium on Workload Characterization, IISWC 2018 , Raleigh, NC, USA, September 30 - October 2, 2018. IEEE Computer Society, 80\u201381. https:\/\/doi.org\/10.1109\/IISWC.2018.8573473 10.1109\/IISWC.2018.8573473 Calvin Bulla, Lluc Alvarez, Miquel Moret\u00f3, Ramon Bertran, Alper Buyuktosunoglu, and Pradip Bose. 2018. ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks. In 2018 IEEE International Symposium on Workload Characterization, IISWC 2018, Raleigh, NC, USA, September 30 - October 2, 2018. IEEE Computer Society, 80\u201381. https:\/\/doi.org\/10.1109\/IISWC.2018.8573473"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950423"},{"key":"e_1_3_2_1_12_1","volume-title":"An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors. In 32st International Symposium on Computer Architecture (ISCA 2005)","author":"Clark Nathan","year":"2005","unstructured":"Nathan Clark , Jason\u00a0 A. Blome , Michael\u00a0 L. Chu , Scott\u00a0 A. Mahlke , Stuart Biles , and Kriszti\u00e1n Flautner . 2005 . An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors. In 32st International Symposium on Computer Architecture (ISCA 2005) , 4-8 June 2005, Madison, Wisconsin, USA. IEEE Computer Society, 272\u2013283. https:\/\/doi.org\/10.1109\/ISCA. 2005.9 10.1109\/ISCA.2005.9 Nathan Clark, Jason\u00a0A. Blome, Michael\u00a0L. Chu, Scott\u00a0A. Mahlke, Stuart Biles, and Kriszti\u00e1n Flautner. 2005. An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors. In 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA. IEEE Computer Society, 272\u2013283. https:\/\/doi.org\/10.1109\/ISCA.2005.9"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.5"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253189"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.156"},{"key":"e_1_3_2_1_16_1","volume-title":"Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies. In 31st International Symposium on Computer Architecture (ISCA 2004)","author":"Eeckhout Lieven","year":"2004","unstructured":"Lieven Eeckhout , Robert H.\u00a0 Bell Jr ., Bastiaan Stougie , Koen\u00a0De Bosschere , and Lizy\u00a0Kurian John . 2004 . Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies. In 31st International Symposium on Computer Architecture (ISCA 2004) , 19-23 June 2004, Munich, Germany. IEEE Computer Society, 350\u2013363. https:\/\/doi.org\/10.1109\/ISCA. 2004.1310787 10.1109\/ISCA.2004.1310787 Lieven Eeckhout, Robert H.\u00a0Bell Jr., Bastiaan Stougie, Koen\u00a0De Bosschere, and Lizy\u00a0Kurian John. 2004. Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies. In 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany. IEEE Computer Society, 350\u2013363. https:\/\/doi.org\/10.1109\/ISCA.2004.1310787"},{"key":"e_1_3_2_1_17_1","unstructured":"EEMBC Consortium. [n. d.]. EEMBC Autobench 2.0 Website. https:\/\/www.eembc.org\/autobench\/.  EEMBC Consortium. [n. d.]. EEMBC Autobench 2.0 Website. https:\/\/www.eembc.org\/autobench\/."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1996.566472"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2010.5452076"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.848473"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/2541228.2555303"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2015.7245697"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/2898356"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.18"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.51"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749755"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155623"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2015.7095806"},{"key":"e_1_3_2_1_29_1","volume-title":"ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI \u201912","author":"Holewinski Justin","year":"2012","unstructured":"Justin Holewinski , Ragavendar Ramamurthi , Mahesh Ravishankar , Naznin Fauzia , Louis-No\u00ebl Pouchet , Atanas Rountev , and P. Sadayappan . 2012. Dynamic trace-based analysis of vectorization potential of applications . In ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI \u201912 , Beijing, China - June 11 - 16 , 2012 , Jan Vitek, Haibo Lin, and Frank Tip(Eds.). ACM, 371\u2013382. https:\/\/doi.org\/10.1145\/2254064.2254108 10.1145\/2254064.2254108 Justin Holewinski, Ragavendar Ramamurthi, Mahesh Ravishankar, Naznin Fauzia, Louis-No\u00ebl Pouchet, Atanas Rountev, and P. Sadayappan. 2012. Dynamic trace-based analysis of vectorization potential of applications. In ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI \u201912, Beijing, China - June 11 - 16, 2012, Jan Vitek, Haibo Lin, and Frank Tip(Eds.). ACM, 371\u2013382. https:\/\/doi.org\/10.1145\/2254064.2254108"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF01205185"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/1958746.1958748"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2006.302734"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/1400112.1400115"},{"key":"e_1_3_2_1_34_1","volume-title":"Exploring the Application Behavior Space Using Parameterized Synthetic Benchmarks. In 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007","author":"Joshi M.","year":"2007","unstructured":"Ajay\u00a0 M. Joshi , Lieven Eeckhout , and Lizy\u00a0Kurian John . 2007 . Exploring the Application Behavior Space Using Parameterized Synthetic Benchmarks. In 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007 ), Brasov, Romania , September 15-19, 2007. IEEE Computer Society, 412. https:\/\/doi.org\/10.1109\/PACT.2007.31 10.1109\/PACT.2007.31 Ajay\u00a0M. Joshi, Lieven Eeckhout, and Lizy\u00a0Kurian John. 2007. Exploring the Application Behavior Space Using Parameterized Synthetic Benchmarks. In 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007. IEEE Computer Society, 412. https:\/\/doi.org\/10.1109\/PACT.2007.31"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658642"},{"key":"e_1_3_2_1_36_1","volume-title":"2006 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2006, March 19-21, 2006, Austin, Texas, USA, Proceedings. IEEE Computer Society, 154\u2013165","author":"Bell Robert","year":"2006","unstructured":"Robert H.\u00a0 Bell Jr ., Rajiv\u00a0 R. Bhatia , Lizy\u00a0 K. John , Jeff Stuecheli , John Griswell , Paul Tu , Louis Capps , Anton Blanchard , and Ravel Thai . 2006 . Automatic testcase synthesis and performance model validation for high performance PowerPC processors . In 2006 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2006, March 19-21, 2006, Austin, Texas, USA, Proceedings. IEEE Computer Society, 154\u2013165 . https:\/\/doi.org\/10.1109\/ISPASS.2006.1620800 10.1109\/ISPASS.2006.1620800 Robert H.\u00a0Bell Jr., Rajiv\u00a0R. Bhatia, Lizy\u00a0K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, and Ravel Thai. 2006. Automatic testcase synthesis and performance model validation for high performance PowerPC processors. In 2006 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2006, March 19-21, 2006, Austin, Texas, USA, Proceedings. IEEE Computer Society, 154\u2013165. https:\/\/doi.org\/10.1109\/ISPASS.2006.1620800"},{"key":"e_1_3_2_1_37_1","volume-title":"Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005","author":"Bell Robert","year":"2005","unstructured":"Robert H.\u00a0 Bell Jr . and Lizy\u00a0Kurian John. 2005. Improved automatic testcase synthesis for performance model validation . In Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005 , Cambridge, Massachusetts, USA , June 20-22, 2005 , Arvind and Larry Rudolph (Eds.). ACM, 111\u2013120. https:\/\/doi.org\/10.1145\/1088149.1088164 10.1145\/1088149.1088164 Robert H.\u00a0Bell Jr. and Lizy\u00a0Kurian John. 2005. Improved automatic testcase synthesis for performance model validation. In Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005, Cambridge, Massachusetts, USA, June 20-22, 2005, Arvind and Larry Rudolph (Eds.). ACM, 111\u2013120. https:\/\/doi.org\/10.1145\/1088149.1088164"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/2925426.2926269"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.59"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2016.7581272"},{"key":"e_1_3_2_1_41_1","volume-title":"LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation. In 2nd IEEE \/ ACM International Symposium on Code Generation and Optimization (CGO 2004)","author":"Lattner Chris","year":"2004","unstructured":"Chris Lattner and Vikram\u00a0 S. Adve . 2004 . LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation. In 2nd IEEE \/ ACM International Symposium on Code Generation and Optimization (CGO 2004) , 20-24 March 2004, San Jose, CA, USA. IEEE Computer Society, 75\u201388. https:\/\/doi.org\/10.1109\/CGO. 2004.1281665 10.1109\/CGO.2004.1281665 Chris Lattner and Vikram\u00a0S. Adve. 2004. LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation. In 2nd IEEE \/ ACM International Symposium on Code Generation and Optimization (CGO 2004), 20-24 March 2004, San Jose, CA, USA. IEEE Computer Society, 75\u201388. https:\/\/doi.org\/10.1109\/CGO.2004.1281665"},{"key":"e_1_3_2_1_42_1","volume-title":"Proceedings of the Thirtieth Annual IEEE\/ACM International Symposium on Microarchitecture, MICRO 30","author":"Lee Chunho","year":"1997","unstructured":"Chunho Lee , Miodrag Potkonjak , and William\u00a0 H. Mangione-Smith . 1997 . MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems . In Proceedings of the Thirtieth Annual IEEE\/ACM International Symposium on Microarchitecture, MICRO 30 , Research Triangle Park, North Carolina, USA , December 1-3, 1997, Mark Smotherman and Tom Conte (Eds.). ACM\/IEEE Computer Society, 330\u2013335. https:\/\/doi.org\/10.1109\/MICRO.1997.645830 10.1109\/MICRO.1997.645830 Chunho Lee, Miodrag Potkonjak, and William\u00a0H. Mangione-Smith. 1997. MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems. In Proceedings of the Thirtieth Annual IEEE\/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, Mark Smotherman and Tom Conte (Eds.). ACM\/IEEE Computer Society, 330\u2013335. https:\/\/doi.org\/10.1109\/MICRO.1997.645830"},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750414"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.225965"},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.5555\/144953.144998"},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168878"},{"key":"e_1_3_2_1_47_1","volume-title":"Early-stage Automated Identification Tool for Shared Accelerators. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). 217\u2013217","author":"Mokri P.","year":"2020","unstructured":"P. Mokri and M. Hempstead . 2020 . Early-stage Automated Identification Tool for Shared Accelerators. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). 217\u2013217 . https:\/\/doi.org\/10.1109\/FCCM48280. 2020 .00048 10.1109\/FCCM48280.2020.00048 P. Mokri and M. Hempstead. 2020. Early-stage Automated Identification Tool for Shared Accelerators. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). 217\u2013217. https:\/\/doi.org\/10.1109\/FCCM48280.2020.00048"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2476801"},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485935"},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.855950"},{"key":"e_1_3_2_1_51_1","volume-title":"WLLVM : Whole-Program LLVM. https:\/\/github.com\/travitch\/whole-program-llvm.","author":"Ravitch Tristan","year":"2014","unstructured":"Tristan Ravitch . 2014 . WLLVM : Whole-Program LLVM. https:\/\/github.com\/travitch\/whole-program-llvm. Tristan Ravitch. 2014. WLLVM : Whole-Program LLVM. https:\/\/github.com\/travitch\/whole-program-llvm."},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629329"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2019.8661174"},{"key":"e_1_3_2_1_54_1","volume-title":"2012 IEEE International Symposium on Performance Analysis of Systems & Software","author":"Shao Yakun\u00a0Sophia","year":"2013","unstructured":"Yakun\u00a0Sophia Shao and David\u00a0 M. Brooks . 2013 . ISA-independent workload characterization and its implications for specialized architectures . In 2012 IEEE International Symposium on Performance Analysis of Systems & Software , Austin, TX, USA , 21-23 April, 2013. IEEE Computer Society, 245\u2013255. https:\/\/doi.org\/10.1109\/ISPASS.2013.6557175 10.1109\/ISPASS.2013.6557175 Yakun\u00a0Sophia Shao and David\u00a0M. Brooks. 2013. ISA-independent workload characterization and its implications for specialized architectures. In 2012 IEEE International Symposium on Performance Analysis of Systems & Software, Austin, TX, USA, 21-23 April, 2013. IEEE Computer Society, 245\u2013255. https:\/\/doi.org\/10.1109\/ISPASS.2013.6557175"},{"key":"e_1_3_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2014.6853196"},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2015.50"},{"key":"e_1_3_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783751"},{"key":"e_1_3_2_1_58_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783752"},{"key":"#cr-split#-e_1_3_2_1_59_1.1","doi-asserted-by":"crossref","unstructured":"Ganesh Venkatesh Jack Sampson Nathan Goulding Saturnino Garcia Vladyslav Bryksin Jose Lugo-Martinez Steven Swanson and Michael\u00a0Bedford Taylor. 2010. Conservation cores: reducing the energy of mature computations. (2010) 205-218. https:\/\/doi.org\/10.1145\/1736020.1736044 10.1145\/1736020.1736044","DOI":"10.1145\/1735971.1736044"},{"key":"#cr-split#-e_1_3_2_1_59_1.2","doi-asserted-by":"crossref","unstructured":"Ganesh Venkatesh Jack Sampson Nathan Goulding Saturnino Garcia Vladyslav Bryksin Jose Lugo-Martinez Steven Swanson and Michael\u00a0Bedford Taylor. 2010. Conservation cores: reducing the energy of mature computations. (2010) 205-218. https:\/\/doi.org\/10.1145\/1736020.1736044","DOI":"10.1145\/1735971.1736044"},{"key":"e_1_3_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155640"},{"key":"#cr-split#-e_1_3_2_1_61_1.1","doi-asserted-by":"crossref","unstructured":"Andrew Waterman Yunsup Lee Rimas Avizienis Henry Cook David Patterson and Krste Asanovic. 2013. The RISC-V instruction set. 1-1. https:\/\/doi.org\/10.1109\/HOTCHIPS.2013.7478332 10.1109\/HOTCHIPS.2013.7478332","DOI":"10.1109\/HOTCHIPS.2013.7478332"},{"key":"#cr-split#-e_1_3_2_1_61_1.2","doi-asserted-by":"crossref","unstructured":"Andrew Waterman Yunsup Lee Rimas Avizienis Henry Cook David Patterson and Krste Asanovic. 2013. The RISC-V instruction set. 1-1. https:\/\/doi.org\/10.1109\/HOTCHIPS.2013.7478332","DOI":"10.1109\/HOTCHIPS.2013.7478332"},{"key":"e_1_3_2_1_62_1","volume-title":"DSAGEN: Synthesizing Programmable Spatial Accelerators. In 2020 ACM\/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). 268\u2013281","author":"Weng Jian","year":"2020","unstructured":"Jian Weng , Sihao Liu , Vidushi Dadu , Zhengrong Wang , Preyas Shah , and Tony Nowatzki . 2020 . DSAGEN: Synthesizing Programmable Spatial Accelerators. In 2020 ACM\/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). 268\u2013281 . https:\/\/doi.org\/10.1109\/ISCA45697.2020.00032 10.1109\/ISCA45697.2020.00032 Jian Weng, Sihao Liu, Vidushi Dadu, Zhengrong Wang, Preyas Shah, and Tony Nowatzki. 2020. DSAGEN: Synthesizing Programmable Spatial Accelerators. In 2020 ACM\/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). 268\u2013281. https:\/\/doi.org\/10.1109\/ISCA45697.2020.00032"},{"key":"e_1_3_2_1_63_1","unstructured":"Xilinx. [n. d.]. Vitis High-Level Synthesis. https:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design.html.  Xilinx. [n. d.]. Vitis High-Level Synthesis. https:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design.html."},{"key":"e_1_3_2_1_64_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD46524.2019.00024"},{"key":"e_1_3_2_1_65_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2818689"}],"event":{"name":"MICRO '21: 54th Annual IEEE\/ACM International Symposium on Microarchitecture","location":"Virtual Event Greece","acronym":"MICRO '21","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"]},"container-title":["MICRO-54: 54th Annual IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3466752.3480094","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3466752.3480094","content-type":"text\/html","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3466752.3480094","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3466752.3480094","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T20:18:56Z","timestamp":1750191536000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3466752.3480094"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,17]]},"references-count":67,"alternative-id":["10.1145\/3466752.3480094","10.1145\/3466752"],"URL":"https:\/\/doi.org\/10.1145\/3466752.3480094","relation":{},"subject":[],"published":{"date-parts":[[2021,10,17]]},"assertion":[{"value":"2021-10-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}