{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T01:44:59Z","timestamp":1773193499483,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":79,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,6,11]],"date-time":"2022-06-11T00:00:00Z","timestamp":1654905600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,6,18]]},"DOI":"10.1145\/3470496.3527420","type":"proceedings-article","created":{"date-parts":[[2022,5,31]],"date-time":"2022-05-31T19:06:01Z","timestamp":1654023961000},"page":"27-41","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Securing GPU via region-based bounds checking"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0768-384X","authenticated-orcid":false,"given":"Jaewon","family":"Lee","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3088-5984","authenticated-orcid":false,"given":"Yonghae","family":"Kim","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0079-2146","authenticated-orcid":false,"given":"Jiashen","family":"Cao","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0090-3109","authenticated-orcid":false,"given":"Euna","family":"Kim","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0574-5381","authenticated-orcid":false,"given":"Jaekyu","family":"Lee","sequence":"additional","affiliation":[{"name":"Arm Research"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6061-7825","authenticated-orcid":false,"given":"Hyesoon","family":"Kim","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]}],"member":"320","published-online":{"date-parts":[[2022,6,11]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"AMD. 2012. AMD Graphics Cores Next (GCN) Architecture. https:\/\/www.amd.com\/Documents\/GCN_Architecture_whitepaper.pdf.  AMD. 2012. AMD Graphics Cores Next (GCN) Architecture. https:\/\/www.amd.com\/Documents\/GCN_Architecture_whitepaper.pdf."},{"key":"e_1_3_2_1_2_1","unstructured":"AMD. 2018. AMD Vulkan\u00ae Open Source Driver. https:\/\/github.com\/GPUOpen-Drivers\/AMDVLK.  AMD. 2018. AMD Vulkan\u00ae Open Source Driver. https:\/\/github.com\/GPUOpen-Drivers\/AMDVLK."},{"key":"e_1_3_2_1_3_1","unstructured":"AMD. 2020. RDNA 1.0 Instruction Set Architecture Reference Guide. https:\/\/developer.amd.com\/wp-content\/resources\/RDNA_Shader_ISA.pdf.  AMD. 2020. RDNA 1.0 Instruction Set Architecture Reference Guide. https:\/\/developer.amd.com\/wp-content\/resources\/RDNA_Shader_ISA.pdf."},{"key":"e_1_3_2_1_4_1","unstructured":"Arm. 2020. Arm\u00ae Architecture Reference Manual Armv8 for Armv8-A architecture profile. https:\/\/developer.arm.com\/docs\/ddi0487\/fb\/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile.  Arm. 2020. Arm\u00ae Architecture Reference Manual Armv8 for Armv8-A architecture profile. https:\/\/developer.arm.com\/docs\/ddi0487\/fb\/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173169"},{"key":"e_1_3_2_1_6_1","volume-title":"Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Association for Computing Machinery","author":"Carter Nicholas P.","unstructured":"Nicholas P. Carter , Stephen W. Keckler , and William J. Dally . 1994. Hardware Support for Fast Capability-Based Addressing . In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Association for Computing Machinery , New York, NY, USA, 319--327. Nicholas P. Carter, Stephen W. Keckler, and William J. Dally. 1994. Hardware Support for Fast Capability-Based Addressing. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Association for Computing Machinery, New York, NY, USA, 319--327."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1866307.1866370"},{"key":"e_1_3_2_1_9_1","volume-title":"Proceedings of the 7th USENIX Security Symposium (Security). USENIX Association, USA, 1--15","author":"Cowan Crispin","year":"1998","unstructured":"Crispin Cowan , Calton Pu , Dave Maier , Jonathan Walpole , Peat Bakke , Steve Beattie , Aaron Grier , Perry Wagle , Qian Zhang , and Heather Hinton . 1998 . Stack-Guard: Automatic Adaptive Detection and Prevention of Buffer-Overflow Attacks . In Proceedings of the 7th USENIX Security Symposium (Security). USENIX Association, USA, 1--15 . https:\/\/www.usenix.org\/conference\/7th-usenix-security-symposium\/stackguard-automatic-adaptive-detection-and-prevention Crispin Cowan, Calton Pu, Dave Maier, Jonathan Walpole, Peat Bakke, Steve Beattie, Aaron Grier, Perry Wagle, Qian Zhang, and Heather Hinton. 1998. Stack-Guard: Automatic Adaptive Detection and Prevention of Buffer-Overflow Attacks. In Proceedings of the 7th USENIX Security Symposium (Security). USENIX Association, USA, 1--15. https:\/\/www.usenix.org\/conference\/7th-usenix-security-symposium\/stackguard-automatic-adaptive-detection-and-prevention"},{"key":"e_1_3_2_1_10_1","unstructured":"Datalogisk Institut. 2020. The Futhark Programming Language. https:\/\/futhark-lang.org.  Datalogisk Institut. 2020. The Futhark Programming Language. https:\/\/futhark-lang.org."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346295"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-47099-3_9"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3243176.3243194"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2017.7863729"},{"key":"e_1_3_2_1_15_1","volume-title":"Proceedings of the International Workshop on OpenCL (IWOCL). Association for Computing Machinery","author":"Erb Christopher","unstructured":"Christopher Erb and Joseph L. Greathouse . 2018. ClARMOR: A Dynamic Buffer Overflow Detector for OpenCL Kernels . In Proceedings of the International Workshop on OpenCL (IWOCL). Association for Computing Machinery , New York, NY, USA, Article 15, 2 pages. https:\/\/github.com\/ROCm-Developer-Tools\/clARMOR. Christopher Erb and Joseph L. Greathouse. 2018. ClARMOR: A Dynamic Buffer Overflow Detector for OpenCL Kernels. In Proceedings of the International Workshop on OpenCL (IWOCL). Association for Computing Machinery, New York, NY, USA, Article 15, 2 pages. https:\/\/github.com\/ROCm-Developer-Tools\/clARMOR."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/361011.361070"},{"key":"e_1_3_2_1_17_1","unstructured":"Google. 2017. Google Queue Hardening. https:\/\/security.googleblog.com\/2019\/05\/queue-hardening-enhancements.html.  Google. 2017. Google Queue Hardening. https:\/\/security.googleblog.com\/2019\/05\/queue-hardening-enhancements.html."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2980098"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.19"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-021-00703-4"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00076"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00082"},{"key":"e_1_3_2_1_23_1","unstructured":"Intel. 2014. OpenCL 2.0 Shared Virtual Memory Overview. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/opencl-20-shared-virtual-memory-overview.html.  Intel. 2014. OpenCL 2.0 Shared Virtual Memory Overview. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/opencl-20-shared-virtual-memory-overview.html."},{"key":"e_1_3_2_1_24_1","unstructured":"Intel. 2015. Introduction to Resource Binding in Microsoft DirectX* 12. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/introduction-to-resource-binding-in-microsoft-directx-12.html.  Intel. 2015. Introduction to Resource Binding in Microsoft DirectX * 12. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/articles\/introduction-to-resource-binding-in-microsoft-directx-12.html."},{"key":"e_1_3_2_1_25_1","unstructured":"Intel. 2016. In-Depth Discussion of Intel\u00ae Processor Graphics. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/blogs\/micro49-tutorial-on-intel-processor-graphics-microarchitecture-and-isa.html.  Intel. 2016. In-Depth Discussion of Intel\u00ae Processor Graphics. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/blogs\/micro49-tutorial-on-intel-processor-graphics-microarchitecture-and-isa.html."},{"key":"e_1_3_2_1_26_1","volume-title":"Intel\u00ae Iris\u00ae Plus Graphics and UHD Graphics Open Source Programmer's Reference Manual","unstructured":"Intel. 2017. Intel\u00ae Iris\u00ae Plus Graphics and UHD Graphics Open Source Programmer's Reference Manual . Volume 7: 3D-Media-GPGPU. https:\/\/ 01 .org\/sites\/default\/files\/documentation\/intel-gfx-prm-osrc-kbl-vol07-3d_media_gpgpu.pdf. Intel. 2017. Intel\u00ae Iris\u00ae Plus Graphics and UHD Graphics Open Source Programmer's Reference Manual. Volume 7: 3D-Media-GPGPU. https:\/\/01.org\/sites\/default\/files\/documentation\/intel-gfx-prm-osrc-kbl-vol07-3d_media_gpgpu.pdf."},{"key":"e_1_3_2_1_27_1","volume-title":"Intel\u00ae Iris\u00ae Plus Graphics and UHD Graphics Open Source Programmer's Reference Manual","unstructured":"Intel. 2020. Intel\u00ae Iris\u00ae Plus Graphics and UHD Graphics Open Source Programmer's Reference Manual . Volume 2a - Command Reference: Instructions (Command Opcodes). https:\/\/ 01 .org\/sites\/default\/files\/documentation\/intel-gfx-prm-osrc-icllp-vol02a-commandreference-instructions_2.pdf. Intel. 2020. Intel\u00ae Iris\u00ae Plus Graphics and UHD Graphics Open Source Programmer's Reference Manual. Volume 2a - Command Reference: Instructions (Command Opcodes). https:\/\/01.org\/sites\/default\/files\/documentation\/intel-gfx-prm-osrc-icllp-vol02a-commandreference-instructions_2.pdf."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00023"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00053"},{"key":"e_1_3_2_1_30_1","volume-title":"Proceedings of the 2015 IEEE International Symposium on Workload Characterization (IISWC). IEEE Computer Society, USA, 76--86","author":"Kambadur Melanie","unstructured":"Melanie Kambadur , Sunpyo Hong , Juan Cabral , Harish Patil , Chi-Keung Luk , Sohaib Sajid , and Martha A. Kim . 2015. Fast Computational GPU Design with GT-Pin . In Proceedings of the 2015 IEEE International Symposium on Workload Characterization (IISWC). IEEE Computer Society, USA, 76--86 . Melanie Kambadur, Sunpyo Hong, Juan Cabral, Harish Patil, Chi-Keung Luk, Sohaib Sajid, and Martha A. Kim. 2015. Fast Computational GPU Design with GT-Pin. In Proceedings of the 2015 IEEE International Symposium on Workload Characterization (IISWC). IEEE Computer Society, USA, 76--86."},{"key":"e_1_3_2_1_31_1","unstructured":"Khronos Group. 2014. WebCL Validator. https:\/\/github.com\/KhronosGroup\/webcl-validator.  Khronos Group. 2014. WebCL Validator. https:\/\/github.com\/KhronosGroup\/webcl-validator."},{"key":"e_1_3_2_1_32_1","unstructured":"Khronos Group. 2015. The OpenCL Specification. https:\/\/www.khronos.org\/registry\/OpenCL\/specs\/opencl-2.0.pdf.  Khronos Group. 2015. The OpenCL Specification. https:\/\/www.khronos.org\/registry\/OpenCL\/specs\/opencl-2.0.pdf."},{"key":"e_1_3_2_1_33_1","unstructured":"Hyesoon Kim Jaekyu Lee Nagesh B. Lakshminarayana Jaewoong Sim Jieun Lim Tri Pho Hyojong Kim and Ramyad Hadidi. 2012. MacSim: A CPU-GPU Heterogeneous Simulation Framework User Guide. https:\/\/github.com\/gthparch\/macsim.  Hyesoon Kim Jaekyu Lee Nagesh B. Lakshminarayana Jaewoong Sim Jieun Lim Tri Pho Hyojong Kim and Ramyad Hadidi. 2012. MacSim: A CPU-GPU Heterogeneous Simulation Framework User Guide. https:\/\/github.com\/gthparch\/macsim."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/3373376.3378529"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO50266.2020.00095"},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2395435"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480076"},{"key":"e_1_3_2_1_39_1","volume-title":"Proceedings of the 28th USENIX Security Symposium (Security). USENIX Association, USA, 1257--1272","author":"Li Mengyuan","year":"2019","unstructured":"Mengyuan Li , Yinqian Zhang , Zhiqiang Lin , and Yan Solihin . 2019 . Exploiting Unprotected I\/O Operations in AMD's Secure Encrypted Virtualization . In Proceedings of the 28th USENIX Security Symposium (Security). USENIX Association, USA, 1257--1272 . Mengyuan Li, Yinqian Zhang, Zhiqiang Lin, and Yan Solihin. 2019. Exploiting Unprotected I\/O Operations in AMD's Secure Encrypted Virtualization. In Proceedings of the 28th USENIX Security Symposium (Security). USENIX Association, USA, 1257--1272."},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.2478\/mlbmb-2013-0009"},{"key":"e_1_3_2_1_41_1","unstructured":"Linux kernel development community. 2020. Kernel module signing facility. https:\/\/www.kernel.org\/doc\/html\/v4.15\/admin-guide\/module-signing.html#:~:text=module%20signing%20facility- Overview signed%20with%20an%20invalid%20key.  Linux kernel development community. 2020. Kernel module signing facility. https:\/\/www.kernel.org\/doc\/html\/v4.15\/admin-guide\/module-signing.html#:~:text=module%20signing%20facility- Overview signed%20with%20an%20invalid%20key."},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357115"},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.14722\/ndss.2019.23194"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1142\/S0129626408003557"},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11416-015-0251-1"},{"key":"e_1_3_2_1_46_1","unstructured":"Matt Miller. 2019. Trends challenges and strategic shifts in the software vulnerability mitigation landscape. https:\/\/github.com\/microsoft\/MSRC-Security-Research\/blob\/master\/presentations\/2019_02_BlueHatIL\/2019_01%20-%20BlueHatIL%20-%20Trends%2C%20challenge%2C%20and%20shifts%20in%20software%20vulnerability%20mitigation.pdf.  Matt Miller. 2019. Trends challenges and strategic shifts in the software vulnerability mitigation landscape. https:\/\/github.com\/microsoft\/MSRC-Security-Research\/blob\/master\/presentations\/2019_02_BlueHatIL\/2019_01%20-%20BlueHatIL%20-%20Trends%2C%20challenge%2C%20and%20shifts%20in%20software%20vulnerability%20mitigation.pdf."},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-018-0039-0"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337181"},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1145\/2807591.2807626"},{"key":"e_1_3_2_1_50_1","unstructured":"Nvidia. 2013. Unified Memory in CUDA 6. https:\/\/developer.nvidia.com\/blog\/unified-memory-in-cuda-6\/.  Nvidia. 2013. Unified Memory in CUDA 6. https:\/\/developer.nvidia.com\/blog\/unified-memory-in-cuda-6\/."},{"key":"e_1_3_2_1_51_1","unstructured":"Nvidia. 2014--2021. NVLink and NVSwitch. https:\/\/www.nvidia.com\/en-us\/data-center\/nvlink.  Nvidia. 2014--2021. NVLink and NVSwitch. https:\/\/www.nvidia.com\/en-us\/data-center\/nvlink."},{"key":"e_1_3_2_1_52_1","unstructured":"Nvidia. 2016. Nvidia Tesla P100. https:\/\/images.nvidia.com\/content\/pdf\/tesla\/whitepaper\/pascal-architecture-whitepaper.pdf.  Nvidia. 2016. Nvidia Tesla P100. https:\/\/images.nvidia.com\/content\/pdf\/tesla\/whitepaper\/pascal-architecture-whitepaper.pdf."},{"key":"e_1_3_2_1_53_1","unstructured":"Nvidia. 2016. Nvidia Tesla V100. http:\/\/images.nvidia.com\/content\/volta-architecture\/pdf\/volta-architecture-whitepaper.pdf.  Nvidia. 2016. Nvidia Tesla V100. http:\/\/images.nvidia.com\/content\/volta-architecture\/pdf\/volta-architecture-whitepaper.pdf."},{"key":"e_1_3_2_1_54_1","unstructured":"Nvidia. 2020. CUDA-MEMCHECK User Manual. https:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_Memcheck.pdf.  Nvidia. 2020. CUDA-MEMCHECK User Manual. https:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_Memcheck.pdf."},{"key":"e_1_3_2_1_55_1","unstructured":"Nvidia. 2020. Nvidia A100 Tensor Core GPU Architecture. https:\/\/www.nvidia.com\/content\/dam\/en-zz\/Solutions\/Data-Center\/nvidia-ampere-architecture-whitepaper.pdf.  Nvidia. 2020. Nvidia A100 Tensor Core GPU Architecture. https:\/\/www.nvidia.com\/content\/dam\/en-zz\/Solutions\/Data-Center\/nvidia-ampere-architecture-whitepaper.pdf."},{"key":"e_1_3_2_1_56_1","unstructured":"Nvidia. 2020. Parallel Thread Execution ISA. https:\/\/docs.nvidia.com\/cuda\/pdf\/ptx_isa_7.1.pdf.  Nvidia. 2020. Parallel Thread Execution ISA. https:\/\/docs.nvidia.com\/cuda\/pdf\/ptx_isa_7.1.pdf."},{"key":"e_1_3_2_1_57_1","unstructured":"Nvidia. 2021. CUDA C++ Programming Guide. https:\/\/docs.nvidia.com\/cuda\/cuda-c-programming-guide\/index.html#dynamic-global-memory-allocation-and-operations.  Nvidia. 2021. CUDA C++ Programming Guide. https:\/\/docs.nvidia.com\/cuda\/cuda-c-programming-guide\/index.html#dynamic-global-memory-allocation-and-operations."},{"key":"e_1_3_2_1_58_1","unstructured":"Nvidia. 2021. NVIDIA GRACE CPU. https:\/\/www.nvidia.com\/en-us\/data-center\/grace-cpu.  Nvidia. 2021. NVIDIA GRACE CPU. https:\/\/www.nvidia.com\/en-us\/data-center\/grace-cpu."},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1145\/3219617.3219662"},{"key":"e_1_3_2_1_60_1","unstructured":"Oracle. 2015. Hardware-assisted checking using Silicon Secured Memory (SSM). https:\/\/docs.oracle.com\/cd\/E37069_01\/html\/E37085\/gphwb.html  Oracle. 2015. Hardware-assisted checking using Silicon Secured Memory (SSM). https:\/\/docs.oracle.com\/cd\/E37069_01\/html\/E37085\/gphwb.html"},{"key":"e_1_3_2_1_61_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.cose.2020.102115"},{"key":"e_1_3_2_1_62_1","volume-title":"Address Randomization for Dynamic Memory Allocators on the GPU. In 2019 IEEE 21st International Conference on High Performance Computing and Communications","author":"Peng Can","unstructured":"Can Peng , Chenlin Huang , Daokun Hu , Di Bang , Jianhua Sun , Hao Chen , and Xionghu Zhong . 2019. Address Randomization for Dynamic Memory Allocators on the GPU. In 2019 IEEE 21st International Conference on High Performance Computing and Communications ; IEEE 17th International Conference on Smart City; IEEE 5th International Conference on Data Science and Systems (HPCC\/SmartCity\/DSS). IEEE, Piscataway, NJ, USA , 570--577. Can Peng, Chenlin Huang, Daokun Hu, Di Bang, Jianhua Sun, Hao Chen, and Xionghu Zhong. 2019. Address Randomization for Dynamic Memory Allocators on the GPU. In 2019 IEEE 21st International Conference on High Performance Computing and Communications; IEEE 17th International Conference on Smart City; IEEE 5th International Conference on Data Science and Systems (HPCC\/SmartCity\/DSS). IEEE, Piscataway, NJ, USA, 570--577."},{"key":"e_1_3_2_1_63_1","doi-asserted-by":"publisher","DOI":"10.1145\/2791321.2791333"},{"key":"e_1_3_2_1_64_1","volume-title":"Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery","author":"Sasaki Hiroshi","unstructured":"Hiroshi Sasaki , Miguel A. Arroyo , M. Tarek Ibn Ziad, Koustubha Bhat, Kanad Sinha, and Simha Sethumadhavan. 2019. Practical Byte-Granular Memory Blacklisting Using Califorms . In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery , New York, NY, USA, 558--571. Hiroshi Sasaki, Miguel A. Arroyo, M. Tarek Ibn Ziad, Koustubha Bhat, Kanad Sinha, and Simha Sethumadhavan. 2019. Practical Byte-Granular Memory Blacklisting Using Califorms. In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery, New York, NY, USA, 558--571."},{"key":"e_1_3_2_1_65_1","doi-asserted-by":"publisher","DOI":"10.1145\/1315245.1315313"},{"key":"e_1_3_2_1_66_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00025"},{"key":"e_1_3_2_1_67_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00056"},{"key":"e_1_3_2_1_68_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSE.2007.44"},{"key":"e_1_3_2_1_69_1","volume-title":"Geng Daniel Liu, and Wen mei W. Hwu","author":"Stratton John A.","year":"2012","unstructured":"John A. Stratton , Christopher Rodrigues , I- Jui Sung , Nady Obeid , Li-Wen Chang , Nasser Anssari , Geng Daniel Liu, and Wen mei W. Hwu . 2012 . Parboil : A Revised Benchmark Suite for Scientific and Commercial Throughput Computing. Technical Report. IMPACT, UIUC. http:\/\/impact.crhc.illinois.edu\/parboil\/parboil.aspx John A. Stratton, Christopher Rodrigues, I-Jui Sung, Nady Obeid, Li-Wen Chang, Nasser Anssari, Geng Daniel Liu, and Wen mei W. Hwu. 2012. Parboil: A Revised Benchmark Suite for Scientific and Commercial Throughput Computing. Technical Report. IMPACT, UIUC. http:\/\/impact.crhc.illinois.edu\/parboil\/parboil.aspx"},{"key":"e_1_3_2_1_70_1","unstructured":"Synopsys. 2020. DC Ultra. https:\/\/www.synopsys.com\/implementation-and-signoff\/rtl-synthesis-test\/dc-ultra.html.  Synopsys. 2020. DC Ultra. https:\/\/www.synopsys.com\/implementation-and-signoff\/rtl-synthesis-test\/dc-ultra.html."},{"key":"e_1_3_2_1_71_1","unstructured":"The Khronos\u00ae Vulkan Working Group. 2020. Vulkan\u00ae 1.2.160 - A Specification (with all registered Vulkan extensions). https:\/\/www.khronos.org\/registry\/vulkan\/specs\/1.2-extensions\/html\/vkspec.html#shader-binding-table.  The Khronos\u00ae Vulkan Working Group. 2020. Vulkan\u00ae 1.2.160 - A Specification (with all registered Vulkan extensions). https:\/\/www.khronos.org\/registry\/vulkan\/specs\/1.2-extensions\/html\/vkspec.html#shader-binding-table."},{"key":"e_1_3_2_1_72_1","volume-title":"Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery","author":"Villa Oreste","unstructured":"Oreste Villa , Mark Stephenson , David Nellans , and Stephen W. Keckler . 2019. NVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs . In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery , New York, NY, USA, 372--383. Oreste Villa, Mark Stephenson, David Nellans, and Stephen W. Keckler. 2019. NVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs. In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery, New York, NY, USA, 372--383."},{"key":"e_1_3_2_1_73_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446078"},{"key":"e_1_3_2_1_74_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2914037"},{"key":"e_1_3_2_1_75_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2014.6853201"},{"key":"e_1_3_2_1_76_1","volume-title":"Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery","author":"Xia Hongyan","unstructured":"Hongyan Xia , Jonathan Woodruff , Sam Ainsworth , Nathaniel W. Filardo , Michael Roe , Alexander Richardson , Peter Rugg , Peter G. Neumann , Simon W. Moore , Robert N. M. Watson , and Timothy M. Jones . 2019. CHERIvoke: Characterising Pointer Revocation Using CHERI Capabilities for Temporal Memory Safety . In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery , New York, NY, USA, 545--557. Hongyan Xia, Jonathan Woodruff, Sam Ainsworth, Nathaniel W. Filardo, Michael Roe, Alexander Richardson, Peter Rugg, Peter G. Neumann, Simon W. Moore, Robert N. M. Watson, and Timothy M. Jones. 2019. CHERIvoke: Characterising Pointer Revocation Using CHERI Capabilities for Temporal Memory Safety. In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO). Association for Computing Machinery, New York, NY, USA, 545--557."},{"key":"e_1_3_2_1_77_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001161"},{"key":"e_1_3_2_1_78_1","volume-title":"Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Association for Computing Machinery","author":"Xu Shengjie","unstructured":"Shengjie Xu , Wei Huang , and D. Lie . 2021. In-fat pointer: hardware-assisted tagged-pointer spatial memory safety defense with subobject granularity protection . In Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Association for Computing Machinery , New York, NY, USA, 224--240. Shengjie Xu, Wei Huang, and D. Lie. 2021. In-fat pointer: hardware-assisted tagged-pointer spatial memory safety defense with subobject granularity protection. In Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Association for Computing Machinery, New York, NY, USA, 224--240."},{"key":"e_1_3_2_1_79_1","doi-asserted-by":"publisher","DOI":"10.1145\/3038228.3038233"}],"event":{"name":"ISCA '22: The 49th Annual International Symposium on Computer Architecture","location":"New York New York","acronym":"ISCA '22","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture","IEEE CS TCAA IEEE CS technical committee on architectural acoustics"]},"container-title":["Proceedings of the 49th Annual International Symposium on Computer Architecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3470496.3527420","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3470496.3527420","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T20:18:53Z","timestamp":1750191533000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3470496.3527420"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,11]]},"references-count":79,"alternative-id":["10.1145\/3470496.3527420","10.1145\/3470496"],"URL":"https:\/\/doi.org\/10.1145\/3470496.3527420","relation":{},"subject":[],"published":{"date-parts":[[2022,6,11]]},"assertion":[{"value":"2022-06-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}