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Embed. Comput. Syst."],"published-print":{"date-parts":[[2021,10,31]]},"abstract":"<jats:p>\n            Neural architecture search (NAS) is a promising technique to design efficient and high-performance deep neural networks (DNNs). As the performance requirements of ML applications grow continuously, the hardware accelerators start playing a central role in DNN design. This trend makes NAS even more complicated and time-consuming for most real applications. This paper proposes FLASH, a very fast NAS methodology that co-optimizes the DNN accuracy and performance on a real hardware platform. As the main theoretical contribution, we first propose the NN-Degree, an analytical metric to quantify the topological characteristics of DNNs with skip connections (e.g., DenseNets, ResNets, Wide-ResNets, and MobileNets). The newly proposed NN-Degree allows us to do\n            <jats:italic>training-free<\/jats:italic>\n            NAS within one second and build an accuracy predictor by training as few as 25 samples out of a vast search space with more than 63 billion configurations. Second, by performing inference on the target hardware, we fine-tune and validate our analytical models to estimate the latency, area, and energy consumption of various DNN architectures while executing standard ML datasets. Third, we construct a hierarchical algorithm based on simplicial homology global optimization (SHGO) to optimize the model-architecture co-design process, while considering the area, latency, and energy consumption of the target hardware. We demonstrate that, compared to the state-of-the-art NAS approaches, our proposed hierarchical SHGO-based algorithm enables more than four orders of magnitude speedup (specifically, the execution time of the proposed algorithm is about 0.1 seconds). Finally, our experimental evaluations show that FLASH is easily transferable to different hardware architectures, thus enabling us to do NAS on a Raspberry Pi-3B processor in less than 3 seconds.\n          <\/jats:p>","DOI":"10.1145\/3476994","type":"journal-article","created":{"date-parts":[[2021,9,17]],"date-time":"2021-09-17T18:36:51Z","timestamp":1631903811000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["FLASH:\n            <u>F<\/u>\n            ast Neura\n            <u>l<\/u>\n            <u>A<\/u>\n            rchitecture\n            <u>S<\/u>\n            earch with\n            <u>H<\/u>\n            ardware Optimization"],"prefix":"10.1145","volume":"20","author":[{"given":"Guihong","family":"Li","sequence":"first","affiliation":[{"name":"The University of Texas at Austin, Austin, Texas, USA"}]},{"given":"Sumit K.","family":"Mandal","sequence":"additional","affiliation":[{"name":"University of Wisconsin\u2013Madison, Madison, Wisconsin, USA"}]},{"given":"Umit Y.","family":"Ogras","sequence":"additional","affiliation":[{"name":"University of Wisconsin\u2013Madison, Madison, Wisconsin, USA"}]},{"given":"Radu","family":"Marculescu","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, Texas, USA"}]}],"member":"320","published-online":{"date-parts":[[2021,9,17]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"International Conference on Learning Representations.","author":"Abdelfattah Mohamed S.","year":"2021","unstructured":"Mohamed S. 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Designing neural network architectures using reinforcement learning. arXiv preprint arXiv:1611.02167 (2016)."},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1038\/scientificamerican0503-60"},{"key":"e_1_2_1_4_1","volume-title":"A comprehensive survey on hardware-aware neural architecture search. arXiv preprint arXiv:2101.09336","author":"\u00a0al Hadjer Benmeziane","year":"2021","unstructured":"Hadjer Benmeziane et \u00a0al . 2021. A comprehensive survey on hardware-aware neural architecture search. arXiv preprint arXiv:2101.09336 ( 2021 ). Hadjer Benmeziane et\u00a0al. 2021. A comprehensive survey on hardware-aware neural architecture search. arXiv preprint arXiv:2101.09336 (2021)."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR46437.2021.01329"},{"key":"e_1_2_1_6_1","volume-title":"Brown et\u00a0al","author":"Tom","year":"2020","unstructured":"Tom B. Brown et\u00a0al . 2020 . Language models are few-shot learners. arXiv preprint arXiv:2005.14165 (2020). Tom B. Brown et\u00a0al. 2020. Language models are few-shot learners. arXiv preprint arXiv:2005.14165 (2020)."},{"key":"e_1_2_1_7_1","volume-title":"International Conference on Learning Representations.","author":"Cai Han","year":"2020","unstructured":"Han Cai , Chuang Gan , Tianzhe Wang , Zhekai Zhang , and Song Han . 2020 . Once-for-all: Train one network and specialize it for efficient deployment . In International Conference on Learning Representations. Han Cai, Chuang Gan, Tianzhe Wang, Zhekai Zhang, and Song Han. 2020. Once-for-all: Train one network and specialize it for efficient deployment. In International Conference on Learning Representations."},{"key":"e_1_2_1_8_1","volume-title":"International Conference on Learning Representations.","author":"Cai Han","year":"2019","unstructured":"Han Cai , Ligeng Zhu , and Song Han . 2019 . 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BRP-NAS: Prediction-based NAS using GCNs. arXiv preprint arXiv:2007.08668 (2020)."},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2789723"},{"key":"e_1_2_1_11_1","volume-title":"International Conference on Learning Representations.","author":"Chen Wuyang","year":"2021","unstructured":"Wuyang Chen , Xinyu Gong , and Zhangyang Wang . 2021 . Neural architecture search on ImageNet in four GPU hours: A theoretically inspired perspective . In International Conference on Learning Representations. Wuyang Chen, Xinyu Gong, and Zhangyang Wang. 2021. Neural architecture search on ImageNet in four GPU hours: A theoretically inspired perspective. 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