{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,7]],"date-time":"2026-04-07T16:22:50Z","timestamp":1775578970320,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":36,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,7,10]],"date-time":"2022-07-10T00:00:00Z","timestamp":1657411200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Laboratory of Physical Sciences"},{"DOI":"10.13039\/100000001","name":"NSF (National Science Foundation)","doi-asserted-by":"publisher","award":["2133267,1822085"],"award-info":[{"award-number":["2133267,1822085"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,7,10]]},"DOI":"10.1145\/3489517.3530509","type":"proceedings-article","created":{"date-parts":[[2022,8,23]],"date-time":"2022-08-23T23:19:29Z","timestamp":1661296769000},"page":"601-606","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":22,"title":["H2H"],"prefix":"10.1145","author":[{"given":"Xinyi","family":"Zhang","sequence":"first","affiliation":[{"name":"University of Pittsburgh"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cong","family":"Hao","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peipei","family":"Zhou","sequence":"additional","affiliation":[{"name":"University of Pittsburgh"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alex","family":"Jones","sequence":"additional","affiliation":[{"name":"University of Pittsburgh"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jingtong","family":"Hu","sequence":"additional","affiliation":[{"name":"University of Pittsburgh"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2022,8,23]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"1","volume-title":"Proceeding of AICAS","author":"Cong","year":"2021","unstructured":"Cong Hao et al. Software\/hardware co-design for multi-modal multi-task learning in autonomous systems. In Proceeding of AICAS, pages 1--5. IEEE, 2021."},{"key":"e_1_3_2_1_2_1","first-page":"1","volume-title":"Proceeding of ISCA","author":"Jeremy","year":"2018","unstructured":"Jeremy Fowers et al. A configurable cloud-scale dnn processor for real-time ai. In Proceeding of ISCA, pages 1--14. IEEE, 2018."},{"key":"e_1_3_2_1_3_1","volume-title":"A multimodal recommender system for large-scale assortment generation in e-commerce. arXiv preprint arXiv:1806.11226","author":"Murium Iqbal","year":"2018","unstructured":"Murium Iqbal et al. A multimodal recommender system for large-scale assortment generation in e-commerce. arXiv preprint arXiv:1806.11226, 2018."},{"key":"e_1_3_2_1_4_1","first-page":"150","volume-title":"Proceedings of the Hypertext and Soc. Media","author":"Alexander","year":"2018","unstructured":"Alexander Mehler et al. Vannotator: A framework for generating multimodal hypertexts. In Proceedings of the Hypertext and Soc. Media, pages 150--154. 2018."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICRA.2018.8462979"},{"key":"e_1_3_2_1_6_1","first-page":"84","volume-title":"Proceedings of the 2019 FPGA","author":"Brian","year":"2019","unstructured":"Brian Gaide et al. Xilinx adaptive compute acceleration platform: Versaltm architecture. In Proceedings of the 2019 FPGA, pages 84--93, 2019."},{"key":"e_1_3_2_1_7_1","volume-title":"Hot chips: a symposium on high performance chips","author":"Michael Ditty","year":"2018","unstructured":"Michael Ditty et al. Nvidia's xavier soc. In Hot chips: a symposium on high performance chips, 2018."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2975764"},{"key":"e_1_3_2_1_9_1","unstructured":"Aws network. https:\/\/aws.amazon.com\/blogs\/aws\/new-gigabit-connectivity-options-for-amazon-direct-connect\/."},{"key":"e_1_3_2_1_10_1","volume-title":"Proceedings of HPCA. IEEE","author":"Hyoukjun","year":"2021","unstructured":"Hyoukjun Kwon et al. Heterogeneous dataflow accelerators for multi-dnn workloads. In Proceedings of HPCA. IEEE, 2021."},{"key":"e_1_3_2_1_11_1","first-page":"73","volume-title":"Proceedings of the 2019 FPGA","author":"Yao","year":"2019","unstructured":"Yao Chen et al. Cloud-dnn: An open framework for mapping dnn models to cloud fpgas. In Proceedings of the 2019 FPGA, pages 73--82, 2019."},{"key":"e_1_3_2_1_12_1","unstructured":"Yu-Hsin Chen et al. Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks. ACM SIGARCH Computer Architecture News."},{"key":"e_1_3_2_1_13_1","unstructured":"Nvidia. Website. http:\/\/nvdla.org\/."},{"key":"e_1_3_2_1_14_1","first-page":"92","volume-title":"Proceedings of ISCA","author":"Zidong","year":"2015","unstructured":"Zidong Du et al. Shidiannao: Shifting vision processing closer to the sensor. In Proceedings of ISCA, pages 92--104, 2015."},{"key":"e_1_3_2_1_15_1","volume-title":"MAESTRO: A data-centric approach to understand reuse, performance, and hardware cost of DNN mappings","author":"Hyoukjun Kwon","year":"2020","unstructured":"Hyoukjun Kwon et al. MAESTRO: A data-centric approach to understand reuse, performance, and hardware cost of DNN mappings. IEEE Micro, 40(3), 2020."},{"issue":"1","key":"e_1_3_2_1_16_1","first-page":"1","article-title":"A survey of fpga-based neural network inference accelerators","volume":"12","author":"Kaiyuan Guo","year":"2019","unstructured":"Kaiyuan Guo et al. A survey of fpga-based neural network inference accelerators. ACM Transactions on TRETS, 12(1):1--26, 2019.","journal-title":"ACM Transactions on TRETS"},{"key":"e_1_3_2_1_17_1","first-page":"102","volume-title":"Proceedings of HCW","author":"Kenjiro","year":"2000","unstructured":"Kenjiro Taura et al. A heuristic algorithm for mapping communicating tasks on heterogeneous resources. In Proceedings of HCW, pages 102--115. IEEE, 2000."},{"key":"e_1_3_2_1_18_1","volume-title":"Basic tutorial for maximizing memory bandwidth with vitis and xilinx ultrascale+ hbm devices","author":"Riley Chris","year":"2019","unstructured":"Chris Riley. Basic tutorial for maximizing memory bandwidth with vitis and xilinx ultrascale+ hbm devices, 2019."},{"key":"e_1_3_2_1_19_1","first-page":"161","volume-title":"Proceedings of the FPGA","author":"Chen","year":"2015","unstructured":"Chen Zhang et al. Optimizing fpga-based accelerator design for deep convolutional neural networks. In Proceedings of the FPGA, pages 161--170, 2015."},{"key":"e_1_3_2_1_20_1","unstructured":"Da-Ren Chen et al. A power-aware 2-covered path routing for wireless body area networks with variable transmission ranges. Journal of JPDC."},{"key":"e_1_3_2_1_21_1","first-page":"919","volume-title":"Proceedings of the CVF","author":"Shifeng","year":"2019","unstructured":"Shifeng Zhang et al. A dataset and benchmark for large-scale multi-modal face anti-spoofing. In Proceedings of the CVF, pages 919--928, 2019."},{"key":"e_1_3_2_1_22_1","volume-title":"Multimodal deep learning framework for sentiment analysis from text-image web data. In 2020 WI-IAT","author":"Selvarajah Thuseethan","year":"2020","unstructured":"Selvarajah Thuseethan et al. Multimodal deep learning framework for sentiment analysis from text-image web data. In 2020 WI-IAT. IEEE, 2020."},{"key":"e_1_3_2_1_23_1","volume-title":"Proceedings of the CVF","author":"Tao","year":"2019","unstructured":"Tao Shen et al. Facebagnet: Bag-of-local-features model for multi-modal face anti-spoofing. In Proceedings of the CVF, 2019."},{"key":"e_1_3_2_1_24_1","volume-title":"Concurrent activity recognition with multimodal cnn-lstm structure. arXiv preprint arXiv:1702.01638","author":"Xinyu Li","year":"2017","unstructured":"Xinyu Li et al. Concurrent activity recognition with multimodal cnn-lstm structure. arXiv preprint arXiv:1702.01638, 2017."},{"key":"e_1_3_2_1_25_1","volume-title":"Multi-modal emotion recognition on iemocap with neural networks. arXiv preprint arXiv:1804.05788","author":"Samarth Tripathi","year":"2018","unstructured":"Samarth Tripathi et al. Multi-modal emotion recognition on iemocap with neural networks. arXiv preprint arXiv:1804.05788, 2018."},{"key":"e_1_3_2_1_26_1","volume-title":"Proceedings of the 2017 FPGA","author":"Jialiang","year":"2017","unstructured":"Jialiang Zhang et al. Improving the performance of opencl-based fpga accelerator for convolutional neural network. In Proceedings of the 2017 FPGA, 2017."},{"key":"e_1_3_2_1_27_1","first-page":"1","article-title":"Achieving super-linear speedup across multi-fpga for realtime dnn inference","volume":"18","author":"Weiwen Jiang","year":"2019","unstructured":"Weiwen Jiang et al. Achieving super-linear speedup across multi-fpga for realtime dnn inference. ACM Transactions on TECS, 18(5s):1--23, 2019.","journal-title":"ACM Transactions on TECS"},{"key":"e_1_3_2_1_28_1","first-page":"26","volume-title":"Proceedings of the 2016 FPGA","author":"Jiantao","year":"2016","unstructured":"Jiantao Qiu et al. Going deeper with embedded fpga platform for convolutional neural network. In Proceedings of the 2016 FPGA, pages 26--35, 2016."},{"key":"e_1_3_2_1_29_1","volume-title":"Compiling deep learning models for custom hardware accelerators. arXiv preprint arXiv:1708.00117","author":"Ming Chang Andre Xian","year":"2017","unstructured":"Andre Xian Ming Chang et al. Compiling deep learning models for custom hardware accelerators. arXiv preprint arXiv:1708.00117, 2017."},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"crossref","unstructured":"Yijin Guan et al. Fp-dnn: An automated framework for mapping deep neural networks onto fpgas with rtl-hls hybrid templates. In 2017 IEEE FCCM.","DOI":"10.1109\/FCCM.2017.25"},{"key":"e_1_3_2_1_31_1","volume-title":"Proceedings of the 2017 FPGA","author":"Yufei","year":"2017","unstructured":"Yufei Ma et al. Optimizing loop operation and dataflow in fpga acceleration of deep convolutional neural networks. In Proceedings of the 2017 FPGA, 2017."},{"key":"e_1_3_2_1_32_1","first-page":"11","volume-title":"2017 IEEE ASAP","author":"Abhinav","year":"2017","unstructured":"Abhinav Podili et al. Fast and efficient implementation of convolutional neural networks on fpga. In 2017 IEEE ASAP, pages 11--18. IEEE, 2017."},{"key":"e_1_3_2_1_33_1","volume-title":"Proceedings of the 54th DAC","author":"Xuechao","year":"2017","unstructured":"Xuechao Wei et al. Automated systolic array architecture synthesis for high throughput cnn inference on fpgas. In Proceedings of the 54th DAC, 2017."},{"key":"e_1_3_2_1_34_1","first-page":"75","volume-title":"Proceedings of the 2017 FPGA","author":"Song","year":"2017","unstructured":"Song Han et al. Ese: Efficient speech recognition engine with sparse lstm on fpga. In Proceedings of the 2017 FPGA, pages 75--84, 2017."},{"key":"e_1_3_2_1_35_1","first-page":"469","volume-title":"2020 IEEE ICCD","author":"Xinyi","year":"2020","unstructured":"Xinyi Zhang et al. Achieving full parallelism in lstm via a unified accelerator design. In 2020 IEEE ICCD, pages 469--477. IEEE, 2020."},{"key":"e_1_3_2_1_36_1","first-page":"175","volume-title":"Proceedings of the ISLPED","author":"Bingbing","year":"2020","unstructured":"Bingbing Li et al. Ftrans: energy-efficient acceleration of transformers using fpga. In Proceedings of the ISLPED, pages 175--180, 2020."}],"event":{"name":"DAC '22: 59th ACM\/IEEE Design Automation Conference","location":"San Francisco California","acronym":"DAC '22","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA"]},"container-title":["Proceedings of the 59th ACM\/IEEE Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3489517.3530509","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3489517.3530509","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3489517.3530509","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:02:17Z","timestamp":1750186937000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3489517.3530509"}},"subtitle":["heterogeneous model to heterogeneous system mapping with computation and communication awareness"],"short-title":[],"issued":{"date-parts":[[2022,7,10]]},"references-count":36,"alternative-id":["10.1145\/3489517.3530509","10.1145\/3489517"],"URL":"https:\/\/doi.org\/10.1145\/3489517.3530509","relation":{},"subject":[],"published":{"date-parts":[[2022,7,10]]},"assertion":[{"value":"2022-08-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}