{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,4]],"date-time":"2025-12-04T02:36:31Z","timestamp":1764815791645,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":10,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,7,10]],"date-time":"2022-07-10T00:00:00Z","timestamp":1657411200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,7,10]]},"DOI":"10.1145\/3489517.3530614","type":"proceedings-article","created":{"date-parts":[[2022,8,23]],"date-time":"2022-08-23T23:19:29Z","timestamp":1661296769000},"page":"1273-1278","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Predictable sharing of last-level cache partitions for multi-core safety-critical systems"],"prefix":"10.1145","author":[{"given":"Zhuanhao","family":"Wu","sequence":"first","affiliation":[{"name":"University of Waterloo, Waterloo, Ontario, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiren","family":"Patel","sequence":"additional","affiliation":[{"name":"University of Waterloo, Waterloo, Ontario, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2022,8,23]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"A. Kaushik et al. 2020. Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems. In IEEE TC (2020) 1--14."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"crossref","unstructured":"B. Dupont de Dinechin. 2019. Consolidating High-Integrity High-Performance and Cyber-Security Functions on a Manycore. In ACM\/IEEE DAC. 1--4.","DOI":"10.1145\/3316781.3323473"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"crossref","unstructured":"G. Gracioli et al. 2015. A Survey on Cache Management Mechanisms for RealTime Embedded Systems. ACM Comput. Surv. 48 2 Article 32 (2015) 36 pages.","DOI":"10.1145\/2830555"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"crossref","unstructured":"H. Rihani et al. 2015. WCET Analysis in Shared Resources Real-Time Systems with TDMA Buses. In RTNS. 183--192.","DOI":"10.1145\/2834848.2834871"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"crossref","unstructured":"J. Cerrolaza et al. 2020. Multi-Core Devices for Safety-Critical Systems: A Survey. ACM Comput. Surv. 53 4 Article 79 (2020) 38 pages.","DOI":"10.1145\/3398665"},{"key":"e_1_3_2_1_6_1","first-page":"1","article-title":"A Survey on Static Cache Analysis for Real-Time Systems","volume":"3","author":"Lv M.","year":"2016","unstructured":"M. Lv et al. 2016. A Survey on Static Cache Analysis for Real-Time Systems. Leibniz Transactions on Embedded Systems 3, 1 (Jun. 2016), 05:1--05:48.","journal-title":"Leibniz Transactions on Embedded Systems"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","unstructured":"S. Altmeyer et al. 2014. Evaluation of Cache Partitioning for Hard Real-Time Systems. In ECRTS. 15--26.","DOI":"10.1109\/ECRTS.2014.11"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"crossref","unstructured":"V. Suhendra et al. 2008. Exploring locking amp; partitioning for predictable shared caches on multi-cores. In DAC. 300--303.","DOI":"10.1145\/1391469.1391545"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5626\/JCSE.2012.6.4.267"},{"key":"e_1_3_2_1_10_1","volume-title":"SWAP: Effective Fine-Grain Management of Shared Last-Level Caches with Minimum Hardware Support. In HPCA. 121--132.","author":"Wang X.","year":"2017","unstructured":"X. Wang et al. 2017. SWAP: Effective Fine-Grain Management of Shared Last-Level Caches with Minimum Hardware Support. In HPCA. 121--132."}],"event":{"name":"DAC '22: 59th ACM\/IEEE Design Automation Conference","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA"],"location":"San Francisco California","acronym":"DAC '22"},"container-title":["Proceedings of the 59th ACM\/IEEE Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3489517.3530614","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3489517.3530614","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:02:23Z","timestamp":1750186943000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3489517.3530614"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,7,10]]},"references-count":10,"alternative-id":["10.1145\/3489517.3530614","10.1145\/3489517"],"URL":"https:\/\/doi.org\/10.1145\/3489517.3530614","relation":{},"subject":[],"published":{"date-parts":[[2022,7,10]]},"assertion":[{"value":"2022-08-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}