{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T02:35:37Z","timestamp":1781836537973,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":87,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,2,22]],"date-time":"2022-02-22T00:00:00Z","timestamp":1645488000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF 1908633, CCF 1763674"],"award-info":[{"award-number":["CCF 1908633, CCF 1763674"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,2,28]]},"DOI":"10.1145\/3503222.3507763","type":"proceedings-article","created":{"date-parts":[[2022,2,22]],"date-time":"2022-02-22T20:49:01Z","timestamp":1645562941000},"page":"990-1003","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":22,"title":["CirFix: automatically repairing defects in hardware design code"],"prefix":"10.1145","author":[{"given":"Hammad","family":"Ahmad","sequence":"first","affiliation":[{"name":"University of Michigan, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yu","family":"Huang","sequence":"additional","affiliation":[{"name":"University of Michigan, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Westley","family":"Weimer","sequence":"additional","affiliation":[{"name":"University of Michigan, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2022,2,22]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.jss.2009.06.035"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2001576.2001768"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICST.2013.11"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/986710.986725"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSRE.1995.497652"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.14569\/IJACSA.2019.0101113"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-23716-4_6"},{"key":"e_1_3_2_1_8_1","unstructured":"Desire Athow. 2014. Pentium fdiv: The processor bug that shook the world. https:\/\/www.techradar.com\/news\/computing-components\/processors\/pentium-fdiv-the-processor-bug-that-shook-the-world-1270773"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.2014.2372785"},{"key":"e_1_3_2_1_10_1","unstructured":"Lionel Bening and Harry Foster. 2001. RTL Formal Verification. Principles of Verifiable RTL Design: A functional coding style supporting verification processes in Verilog 103\u2013129."},{"key":"e_1_3_2_1_11_1","volume-title":"Testing object-oriented systems: models, patterns, and tools","author":"Binder Robert","unstructured":"Robert Binder. 2000. Testing object-oriented systems: models, patterns, and tools. Addison-Wesley Professional."},{"key":"e_1_3_2_1_12_1","first-page":"30","article-title":"Verification and fault localization for VHDL programs","volume":"2","author":"Bloem Roderick","year":"2002","unstructured":"Roderick Bloem and Franz Wotawa. 2002. Verification and fault localization for VHDL programs. Journal of the Telematics Engineering Society (TIV), 2 (2002), 30\u201333.","journal-title":"Journal of the Telematics Engineering Society (TIV)"},{"key":"e_1_3_2_1_13_1","volume-title":"2007 IEEE International High Level Design Validation and Test Workshop. 65\u201372","author":"Wagner Ilya","year":"2007","unstructured":"Kai-hui Chang, Ilya Wagner, Valeria Bertacco, and Igor L Markov. 2007. Automatic error diagnosis and correction for RTL designs. In 2007 IEEE International High Level Design Validation and Test Workshop. 65\u201372."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1866307.1866370"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2970276.2970366"},{"key":"e_1_3_2_1_16_1","volume-title":"USENIX Security Symposium. 213\u2013230","author":"Dessouky Ghada","year":"2019","unstructured":"Ghada Dessouky, David Gens, Patrick Haney, Garrett Persyn, Arun Kanuparthi, Hareesh Khattri, Jason M Fung, Ahmad-Reza Sadeghi, and Jeyavijayan Rajendran. 2019. Hardfails: Insights into software-exploitable hardware bugs. In USENIX Security Symposium. 213\u2013230."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10664-005-3861-2"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1049\/ip-sen:19982444"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1569901.1570031"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-70545-1_3"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.2017.2755013"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/RTEST.2018.8397165"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCES.2015.7393026"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSTW.2010.31"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2241176"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/GI52543.2021.00013"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEEESTD.2006.99495"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/2931037.2931062"},{"key":"e_1_3_2_1_29_1","volume-title":"2005 IEEE International Symposium on Circuits and Systems. 5682\u20135685","author":"Jiang Tai-Ying","year":"2005","unstructured":"Tai-Ying Jiang, C-NJ Liu, and Jing Ya Jou. 2005. Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs. In 2005 IEEE International Symposium on Circuits and Systems. 5682\u20135685."},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1101908.1101949"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/581396.581397"},{"key":"e_1_3_2_1_32_1","first-page":"184","article-title":"Fitness Distance Correlation as a Measure of Problem Difficulty for Genetic Algorithms","volume":"95","author":"Jones Terry","year":"1995","unstructured":"Terry Jones and Stephanie Forrest. 1995. Fitness Distance Correlation as a Measure of Problem Difficulty for Genetic Algorithms. In ICGA. 95, 184\u2013192.","journal-title":"ICGA."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/2610384.2628055"},{"key":"e_1_3_2_1_34_1","volume-title":"Retrieved","author":"Keim Robert","year":"2020","unstructured":"Robert Keim. 2020. What is a Hardware Description Language (HDL)? Retrieved Jan 11, 2021 from https:\/\/www.allaboutcircuits.com\/technical-articles\/what-is-a-hardware-description-language-hdl\/"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2013.6606626"},{"key":"e_1_3_2_1_36_1","volume-title":"Genetic programming: on the programming of computers by means of natural selection. 1","author":"Koza John R","unstructured":"John R Koza. 1992. Genetic programming: on the programming of computers by means of natural selection. 1, MIT press."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2019.00064"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10664-017-9577-2"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2012.6227211"},{"key":"e_1_3_2_1_40_1","volume-title":"Current challenges in automatic software repair. Software quality journal, 21, 3","author":"Goues Claire Le","year":"2013","unstructured":"Claire Le Goues, Stephanie Forrest, and Westley Weimer. 2013. Current challenges in automatic software repair. Software quality journal, 21, 3 (2013), 421\u2013443."},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.2011.104"},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/2330163.2330296"},{"key":"e_1_3_2_1_43_1","unstructured":"Robert Lemos. 1997. Intel releases fix FOR F00F bug. https:\/\/www.zdnet.com\/article\/intel-releases-fix-for-f00f-bug\/"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/3293882.3330577"},{"key":"e_1_3_2_1_45_1","volume-title":"Proceedings of the 26th IEEE International Conference on Software Analysis, Evolution, and Reengineering. 456\u2013467","author":"Liu Kui","unstructured":"Kui Liu, Anil Koyuncu, Dongsun Kim, and Tegawend\u00e9 F. Bissyand\u00e9. 2019. AVATAR: Fixing Semantic Bugs with Fix Patterns of Static Analysis Violations. In Proceedings of the 26th IEEE International Conference on Software Analysis, Evolution, and Reengineering. 456\u2013467."},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.17706\/jsw.13.8.437-452"},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/2837614.2837617"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/3395363.3397351"},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1989.76898"},{"key":"e_1_3_2_1_50_1","unstructured":"M Morris Mano and Michael Ciletti. 2013. Digital design: with an introduction to the Verilog HDL. Pearson."},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1002\/spe.409"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/2931037.2948705"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1145\/1569901.1570127"},{"key":"e_1_3_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2015.63"},{"key":"e_1_3_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1145\/2884781.2884807"},{"key":"e_1_3_2_1_56_1","volume-title":"Genetic algorithms, selection schemes, and the varying effects of noise. Evolutionary computation, 4, 2","author":"Miller Brad L","year":"1996","unstructured":"Brad L Miller and David E Goldberg. 1996. Genetic algorithms, selection schemes, and the varying effects of noise. Evolutionary computation, 4, 2 (1996), 113\u2013131."},{"key":"e_1_3_2_1_57_1","volume-title":"Genetic algorithms, tournament selection, and the effects of noise. Complex systems, 9, 3","author":"Miller Brad L","year":"1995","unstructured":"Brad L Miller and David E Goldberg. 1995. Genetic algorithms, tournament selection, and the effects of noise. Complex systems, 9, 3 (1995), 193\u2013212."},{"key":"e_1_3_2_1_58_1","unstructured":"Martin Monperrus. 2018. The Living Review on Automated Program Repair. HAL\/archives-ouvertes.fr."},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"crossref","unstructured":"Manish Motwani. 2021. High-Quality Automated Program Repair. arxiv:2104.07851.","DOI":"10.1109\/ICSE-Companion52605.2021.00134"},{"key":"e_1_3_2_1_60_1","volume-title":"Hua Jie Lee, and Kotagiri Ramamohanarao","author":"Naish Lee","year":"2011","unstructured":"Lee Naish, Hua Jie Lee, and Kotagiri Ramamohanarao. 2011. A model for spectra-based software diagnosis. ACM Transactions on software engineering and methodology (TOSEM), 20, 3 (2011), 1\u201332."},{"key":"e_1_3_2_1_61_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2013.6606623"},{"key":"e_1_3_2_1_62_1","volume-title":"Soft Computing in Engineering Design and Manufacturing","author":"Poli Riccardo","unstructured":"Riccardo Poli and William B Langdon. 1998. Genetic programming with one-point crossover. In Soft Computing in Engineering Design and Manufacturing. Springer, 180\u2013189."},{"key":"e_1_3_2_1_63_1","doi-asserted-by":"publisher","DOI":"10.1145\/2568225.2568254"},{"key":"e_1_3_2_1_64_1","doi-asserted-by":"publisher","DOI":"10.1145\/2771783.2771791"},{"key":"e_1_3_2_1_65_1","volume-title":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.. 370\u2013373","author":"Ran Jiann-Chyi","year":"2003","unstructured":"Jiann-Chyi Ran, Yi-Yuan Chang, and Chia-Hung Lin. 2003. An efficient mechanism for debugging RTL description. In The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.. 370\u2013373."},{"key":"e_1_3_2_1_66_1","article-title":"A multi-study investigation into dead code","author":"Romano Simone","year":"2018","unstructured":"Simone Romano, Christopher Vendome, Giuseppe Scanniello, and Denys Poshyvanyk. 2018. A multi-study investigation into dead code. IEEE Transactions on Software Engineering.","journal-title":"IEEE Transactions on Software Engineering."},{"key":"e_1_3_2_1_67_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2019.00020"},{"key":"e_1_3_2_1_68_1","unstructured":"Frank Schirrmeister Michael McNamara Larry Melling and Neeti Bhatnagar. 2012. Debugging at the hardware\/software interface. https:\/\/www.embedded-computing.com\/embedded-computing-design\/debugging-at-the-hardware-software-interface"},{"key":"e_1_3_2_1_69_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10710-013-9195-8"},{"key":"e_1_3_2_1_70_1","unstructured":"Charles L Seitz C Mead and L Conway. 1980. System timing. Introduction to VLSI systems 218\u2013262."},{"key":"e_1_3_2_1_71_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.infsof.2011.02.006"},{"key":"e_1_3_2_1_72_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSEA.2009.29"},{"key":"e_1_3_2_1_73_1","doi-asserted-by":"publisher","DOI":"10.1145\/2786805.2786825"},{"key":"e_1_3_2_1_74_1","doi-asserted-by":"publisher","DOI":"10.1007\/11560548_6"},{"key":"e_1_3_2_1_75_1","doi-asserted-by":"publisher","DOI":"10.1145\/1370750.1370761"},{"key":"e_1_3_2_1_76_1","unstructured":"Stuart Sutherland. 2017. RTL Modeling with SystemVerilog for Simulation and Synthesis Using SystemVerilog for ASIC and FPGA Design. Sutherland HDL Incorporated."},{"key":"e_1_3_2_1_77_1","unstructured":"Synopsys. 2020. VCS Functional Verification Solution. https:\/\/www.synopsys.com\/verification\/simulation\/vcs.html"},{"key":"e_1_3_2_1_78_1","unstructured":"VCS Synopsys. 2004. Verilog Simulator. Avaliable HTTP: http:\/\/www. synopsys. com\/products\/simulation\/simulation. html."},{"key":"e_1_3_2_1_79_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-16214-0_42"},{"key":"e_1_3_2_1_80_1","volume-title":"Digital logic design using verilog: coding and RTL synthesis","author":"Taraate Vaibbhav","unstructured":"Vaibbhav Taraate. 2016. Digital logic design using verilog: coding and RTL synthesis. Springer."},{"key":"e_1_3_2_1_81_1","volume-title":"Advanced techniques for search-based program repair. Ph. D. Dissertation","author":"Timperley Christopher S","unstructured":"Christopher S Timperley. 2017. Advanced techniques for search-based program repair. Ph. D. Dissertation. University of York."},{"key":"e_1_3_2_1_82_1","doi-asserted-by":"publisher","DOI":"10.1109\/20.952626"},{"key":"e_1_3_2_1_83_1","unstructured":"Jayce Wagner. 2018. Intel Could Make Billions Off of Meltdown & Spectre. https:\/\/www.digitaltrends.com\/computing\/intel-could-make-billions-off-meltdown-spectre\/"},{"key":"e_1_3_2_1_84_1","doi-asserted-by":"publisher","DOI":"10.1145\/1173706.1173734"},{"key":"e_1_3_2_1_85_1","doi-asserted-by":"publisher","DOI":"10.1145\/1735223.1735249"},{"key":"e_1_3_2_1_86_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2009.5070536"},{"key":"e_1_3_2_1_87_1","doi-asserted-by":"crossref","unstructured":"Andreas Zeller. 2001. Automated debugging: Are we close. Computer 26\u201331.","DOI":"10.1109\/2.963440"}],"event":{"name":"ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems","location":"Lausanne Switzerland","acronym":"ASPLOS '22","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","SIGARCH ACM Special Interest Group on Computer Architecture","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3503222.3507763","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3503222.3507763","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3503222.3507763","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:30:49Z","timestamp":1750188649000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3503222.3507763"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,2,22]]},"references-count":87,"alternative-id":["10.1145\/3503222.3507763","10.1145\/3503222"],"URL":"https:\/\/doi.org\/10.1145\/3503222.3507763","relation":{},"subject":[],"published":{"date-parts":[[2022,2,22]]},"assertion":[{"value":"2022-02-22","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}