{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:27:38Z","timestamp":1773246458194,"version":"3.50.1"},"reference-count":27,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology of Taiwan","doi-asserted-by":"crossref","award":["MOST-109-2221-E-002-147-MY3, MOST-107-2923-E-001-001-MY3, and MOST-109-2221-E-001-012-MY3"],"award-info":[{"award-number":["MOST-109-2221-E-002-147-MY3, MOST-107-2923-E-001-001-MY3, and MOST-109-2221-E-001-012-MY3"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/100019206","name":"Delta Electronics","doi-asserted-by":"crossref","award":["110HT907002"],"award-info":[{"award-number":["110HT907002"]}],"id":[{"id":"10.13039\/100019206","id-type":"DOI","asserted-by":"crossref"}]},{"name":"Macronix Inc., Hsin-chu, Taiwan","award":["109-S-C24"],"award-info":[{"award-number":["109-S-C24"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2022,5,31]]},"abstract":"<jats:p>Memristor-based deep learning accelerators provide a promising solution to improve the energy efficiency of neuromorphic computing systems. However, the electrical properties and crossbar structure of memristors make these accelerators error-prone. In addition, due to the hardware constraints, the way to deploy neural network models on memristor crossbar arrays affects the computation parallelism and communication overheads. To enable reliable and energy-efficient memristor-based accelerators, a simulation platform is needed to precisely analyze the impact of non-ideal circuit\/device properties on the inference accuracy and the influence of different deployment strategies on performance and energy consumption. In this paper, we propose a flexible simulation framework, DL-RSIM, to tackle this challenge. A rich set of reliability impact factors and deployment strategies are explored by DL-RSIM, and it can be incorporated with any deep learning neural networks implemented by TensorFlow. Using several representative convolutional neural networks as case studies, we show that DL-RSIM can guide chip designers to choose a reliability-friendly design option and energy-efficient deployment strategies and develop optimization techniques accordingly.<\/jats:p>","DOI":"10.1145\/3507639","type":"journal-article","created":{"date-parts":[[2022,1,31]],"date-time":"2022-01-31T17:06:22Z","timestamp":1643648782000},"page":"1-29","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators"],"prefix":"10.1145","volume":"21","author":[{"given":"Wei-Ting","family":"Lin","sequence":"first","affiliation":[{"name":"National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8983-9835","authenticated-orcid":false,"given":"Hsiang-Yun","family":"Cheng","sequence":"additional","affiliation":[{"name":"Academia Sinica, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chia-Lin","family":"Yang","sequence":"additional","affiliation":[{"name":"National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Meng-Yao","family":"Lin","sequence":"additional","affiliation":[{"name":"National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kai","family":"Lien","sequence":"additional","affiliation":[{"name":"National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Han-Wen","family":"Hu","sequence":"additional","affiliation":[{"name":"Macronix International Co., Ltd., Hsin-Chu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hung-Sheng","family":"Chang","sequence":"additional","affiliation":[{"name":"Macronix International Co., Ltd., Hsin-Chu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hsiang-Pang","family":"Li","sequence":"additional","affiliation":[{"name":"Macronix International Co., Ltd., Hsin-Chu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Meng-Fan","family":"Chang","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Hsin-Chu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yen-Ting","family":"Tsou","sequence":"additional","affiliation":[{"name":"National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chin-Fu","family":"Nien","sequence":"additional","affiliation":[{"name":"Academia Sinica, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2022,5,28]]},"reference":[{"key":"e_1_3_2_2_2","article-title":"Learning multiple layers of features from tiny images","author":"Alex K.","year":"2012","unstructured":"K. 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In ACM\/IEEE International Symposium on Computer Architecture (ISCA). 27\u201339."},{"key":"e_1_3_2_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2009.5206848"},{"key":"e_1_3_2_10_2","first-page":"449","volume-title":"IEEE\/ACM International Symposium on Microarchitecture (MICRO)","author":"Esmaeilzadeh H.","year":"2012","unstructured":"H. Esmaeilzadeh, A. Sampson, L. Ceze, and D. Burger. 2012. Neural acceleration for general-purpose approximate programs. In IEEE\/ACM International Symposium on Microarchitecture (MICRO). 449\u2013460."},{"key":"e_1_3_2_11_2","first-page":"52","volume-title":"IEEE International Symposium on High Performance Computer Architecture (HPCA)","author":"Feinberg B.","year":"2018","unstructured":"B. Feinberg, S. Wang, and E. Ipek. 2018. Making memristive neural network accelerators reliable. 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ACM Trans. Archit. Code Optim. 15, 4, Article 64 (2019), 24 pages.","journal-title":"ACM Trans. Archit. Code Optim."},{"key":"e_1_3_2_20_2","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415663"},{"key":"e_1_3_2_21_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2107214"},{"key":"e_1_3_2_22_2","unstructured":"P. Sermanet D. Eigen X. Zhang M. Mathieu R. Fergus and Y. LeCun. 2014. OverFeat: Integrated Recognition Localization and Detection using Convolutional Networks. arxiv:cs.CV\/1312.6229."},{"key":"e_1_3_2_23_2","first-page":"14","volume-title":"ACM\/IEEE International Symposium on Computer Architecture (ISCA)","author":"Shafiee A.","year":"2016","unstructured":"A. Shafiee, A. Nag, N. Muralimanohar, R. Balasubramonian, J. P. Strachan, M. Hu, R. S. Williams, and V. Srikumar. 2016. ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars. 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