{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:35:01Z","timestamp":1773246901830,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,10,30]],"date-time":"2022-10-30T00:00:00Z","timestamp":1667088000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["2106828"],"award-info":[{"award-number":["2106828"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["GRC-CADT 3103.001\/3104.001"],"award-info":[{"award-number":["GRC-CADT 3103.001\/3104.001"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF (National Science Foundation)","doi-asserted-by":"publisher","award":["CCF-2106725"],"award-info":[{"award-number":["CCF-2106725"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,10,30]]},"DOI":"10.1145\/3508352.3549375","type":"proceedings-article","created":{"date-parts":[[2022,12,22]],"date-time":"2022-12-22T12:10:54Z","timestamp":1671711054000},"page":"1-9","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["How Good Is Your Verilog RTL Code?"],"prefix":"10.1145","author":[{"given":"Prianka","family":"Sengupta","sequence":"first","affiliation":[{"name":"Texas A&amp;M University"}]},{"given":"Aakash","family":"Tyagi","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University"}]},{"given":"Yiran","family":"Chen","sequence":"additional","affiliation":[{"name":"Duke University"}]},{"given":"Jiang","family":"Hu","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University"}]}],"member":"320","published-online":{"date-parts":[[2022,12,22]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415736"},{"key":"e_1_3_2_1_2_1","unstructured":"Ansys. 2021. PowerArtist. https:\/\/www.ansys.com\/products\/semiconductors\/ansys-powerartist"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/2939672.2939785"},{"key":"e_1_3_2_1_4_1","volume-title":"Fast and Accurate PPA Modeling with Transfer Learning. In 2021 IEEE\/ACM International Conference On Computer Aided Design (ICCAD). IEEE, 1--8.","author":"Davis W Rhett","year":"2021","unstructured":"W Rhett Davis, Paul Franzon, Luis Francisco, Billy Huggins, and Rajeev Jain. 2021. Fast and Accurate PPA Modeling with Transfer Learning. In 2021 IEEE\/ACM International Conference On Computer Aided Design (ICCAD). IEEE, 1--8."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MCI.2020.3039072"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358322"},{"key":"e_1_3_2_1_7_1","volume-title":"RTL Delay Prediction Using Neural Networks. In 2021 IEEE Nordic Circuits and Systems Conference (NorCAS). IEEE, 1--7.","author":"Lopera Daniela S\u00e1nchez","year":"2021","unstructured":"Daniela S\u00e1nchez Lopera, Lorenzo Servadei, Vishwa Priyanka Kasi, Sebastian Prebeck, and Wolfgang Ecker. 2021. RTL Delay Prediction Using Neural Networks. In 2021 IEEE Nordic Circuits and Systems Conference (NorCAS). IEEE, 1--7."},{"key":"e_1_3_2_1_8_1","volume-title":"Understanding random forests: From theory to practice. arXiv preprint arXiv:1407.7502","author":"Louppe Gilles","year":"2014","unstructured":"Gilles Louppe. 2014. Understanding random forests: From theory to practice. arXiv preprint arXiv:1407.7502 (2014)."},{"key":"e_1_3_2_1_9_1","volume-title":"Proc. IWLS'05","author":"Mishchenko Alan","year":"2006","unstructured":"Alan Mishchenko, Satrajit Chatterjee, and Robert Brayton. 2006. Integrating logic synthesis, technology mapping, and retiming. In Proc. IWLS'05. Citeseer."},{"key":"e_1_3_2_1_10_1","volume-title":"Scikit-learn: Machine learning in Python. the Journal of machine Learning research 12","author":"Pedregosa Fabian","year":"2011","unstructured":"Fabian Pedregosa, Ga\u00ebl Varoquaux, Alexandre Gramfort, Vincent Michel, Bertrand Thirion, Olivier Grisel, Mathieu Blondel, Peter Prettenhofer, Ron Weiss, Vincent Dubourg, et al. 2011. Scikit-learn: Machine learning in Python. the Journal of machine Learning research 12 (2011), 2825--2830."},{"key":"e_1_3_2_1_11_1","volume-title":"Markus Hagenbuchner, and Gabriele Monfardini.","author":"Scarselli Franco","year":"2008","unstructured":"Franco Scarselli, Marco Gori, Ah Chung Tsoi, Markus Hagenbuchner, and Gabriele Monfardini. 2008. The graph neural network model. IEEE transactions on neural networks 20, 1 (2008), 61--80."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1186\/s40537-019-0197-0"},{"key":"e_1_3_2_1_14_1","volume-title":"Design Automation Conference.","author":"Snyder Wilson","year":"2004","unstructured":"Wilson Snyder. 2004. Verilator and systemperl. In North American SystemC Users' Group, Design Automation Conference."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.661259"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-16214-0_42"},{"key":"e_1_3_2_1_17_1","volume-title":"Graph attention networks. arXiv preprint arXiv:1710.10903","author":"Veli\u010dkovi\u0107 Petar","year":"2017","unstructured":"Petar Veli\u010dkovi\u0107, Guillem Cucurull, Arantxa Casanova, Adriana Romero, Pietro Lio, and Yoshua Bengio. 2017. Graph attention networks. arXiv preprint arXiv:1710.10903 (2017)."},{"key":"e_1_3_2_1_18_1","volume-title":"Interdisciplinary computing in java programming","author":"Wang Sun-Chong","unstructured":"Sun-Chong Wang. 2003. Artificial neural network. In Interdisciplinary computing in java programming. Springer, 81--100."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045201"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059105"}],"event":{"name":"ICCAD '22: IEEE\/ACM International Conference on Computer-Aided Design","location":"San Diego California","acronym":"ICCAD '22","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE-EDS Electronic Devices Society","IEEE CAS","IEEE CEDA"]},"container-title":["Proceedings of the 41st IEEE\/ACM International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3508352.3549375","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3508352.3549375","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3508352.3549375","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:30:23Z","timestamp":1750188623000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3508352.3549375"}},"subtitle":["A Quick Answer from Machine Learning"],"short-title":[],"issued":{"date-parts":[[2022,10,30]]},"references-count":19,"alternative-id":["10.1145\/3508352.3549375","10.1145\/3508352"],"URL":"https:\/\/doi.org\/10.1145\/3508352.3549375","relation":{},"subject":[],"published":{"date-parts":[[2022,10,30]]},"assertion":[{"value":"2022-12-22","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}