{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:16:20Z","timestamp":1750220180624,"version":"3.41.0"},"reference-count":35,"publisher":"Association for Computing Machinery (ACM)","issue":"6","license":[{"start":{"date-parts":[[2022,11,22]],"date-time":"2022-11-22T00:00:00Z","timestamp":1669075200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"National Key Research and Development Program of China","award":["2018YFA0701500"],"award-info":[{"award-number":["2018YFA0701500"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["61772331"],"award-info":[{"award-number":["61772331"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2022,11,30]]},"abstract":"<jats:p>\n            Resistive-RAM-based (ReRAM-based) computing shows great potential on accelerating DNN inference by its highly parallel structure. Regrettably, computing accuracy in practical is much lower than expected due to the non-ideal ReRAM device. Conventional computing flow with fixed wordline activation scheme can effectively protect computing accuracy but at the cost of significant performance and energy savings reduction. For such embarrassment of accuracy, performance and energy, this article proposes a new Adaptive-Wordline-Activation control scheme (\n            <jats:italic>AWA-control<\/jats:italic>\n            ) and combines it with a theoretical Output-Significance-Aligned computing flow (\n            <jats:italic>OSA-flow<\/jats:italic>\n            ) to enable fine-grained control on output significance with distinct impact on final result. We demonstrate\n            <jats:italic>AWA-control<\/jats:italic>\n            -supported\n            <jats:italic>OSA-flow<\/jats:italic>\n            architecture with maximal compatibility to conventional crossbar by input retiming and weight remapping using shifting registers to enable the new flow. However, in contrast to the conventional computing architecture, the\n            <jats:italic>OSA-flow<\/jats:italic>\n            architecture shows the better capability to exploit data sparsity commonly seen in DNN models. So we also design a sparsity-aware\n            <jats:italic>OSA-flow<\/jats:italic>\n            architecture for further DNN speedup. Evaluation results show that\n            <jats:italic>OSA-flow<\/jats:italic>\n            architecture can provide significant performance improvement of 21.6\u00d7, and energy savings of 96.2% over conventional computing architecture with similar DNN accuracy.\n          <\/jats:p>","DOI":"10.1145\/3510819","type":"journal-article","created":{"date-parts":[[2022,5,23]],"date-time":"2022-05-23T08:54:31Z","timestamp":1653296071000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["A Novel Architecture Design for Output Significance Aligned Flow with Adaptive Control in ReRAM-based Neural Network Accelerator"],"prefix":"10.1145","volume":"27","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5421-0199","authenticated-orcid":false,"given":"Taozhong","family":"Li","sequence":"first","affiliation":[{"name":"Shanghai Jiao Tong University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8417-5796","authenticated-orcid":false,"given":"Naifeng","family":"Jing","sequence":"additional","affiliation":[{"name":"Shanghai Jiao Tong University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5521-6197","authenticated-orcid":false,"given":"Jianfei","family":"Jiang","sequence":"additional","affiliation":[{"name":"Shanghai Jiao Tong University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6559-5207","authenticated-orcid":false,"given":"Qin","family":"Wang","sequence":"additional","affiliation":[{"name":"Shanghai Jiao Tong University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9431-9853","authenticated-orcid":false,"given":"Zhigang","family":"Mao","sequence":"additional","affiliation":[{"name":"Shanghai Jiao Tong University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1486-8412","authenticated-orcid":false,"given":"Yiran","family":"Chen","sequence":"additional","affiliation":[{"name":"Duke University, USA"}]}],"member":"320","published-online":{"date-parts":[[2022,11,22]]},"reference":[{"key":"e_1_3_1_2_2","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304049"},{"key":"e_1_3_1_3_2","article-title":"The power of sparsity in convolutional neural networks","author":"Changpinyo Soravit","year":"2017","unstructured":"Soravit Changpinyo, Mark Sandler, and Andrey Zhmoginov. 2017. The power of sparsity in convolutional neural networks. arXiv:1702.06257. Retrieved from https:\/\/arxiv.org\/abs\/1702.06257.","journal-title":"arXiv:1702.06257"},{"key":"e_1_3_1_4_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310400"},{"key":"e_1_3_1_5_2","doi-asserted-by":"publisher","DOI":"10.5555\/3201607.3201633"},{"key":"e_1_3_1_6_2","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"e_1_3_1_7_2","first-page":"30","volume-title":"Proceedings of the 5th IEEE International Memory Workshop","author":"Fantini Andrea","year":"2013","unstructured":"Andrea Fantini, Ludovic Goux, Robin Degraeve, D. J. Wouters, N. Raghavan, G. Kar, Attilio Belmonte, Y.-Y. Chen, Bogdan Govoreanu, and Malgorzata Jurczak. 2013. Intrinsic switching variability in HfO 2 RRAM. In Proceedings of the 5th IEEE International Memory Workshop. 30\u201333."},{"key":"e_1_3_1_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00039"},{"key":"e_1_3_1_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00015"},{"key":"e_1_3_1_10_2","article-title":"Compressing deep convolutional networks using vector quantization","author":"Gong Yunchao","year":"2014","unstructured":"Yunchao Gong, Liu Liu, Ming Yang, and Lubomir Bourdev. 2014. Compressing deep convolutional networks using vector quantization. arXiv:1412.6115. Retrieved from https:\/\/arxiv.org\/abs\/1412.6115.","journal-title":"arXiv:1412.6115"},{"key":"e_1_3_1_11_2","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"e_1_3_1_12_2","first-page":"1168","volume-title":"Proceedings of the International Conference on Solid State Devices and Materials (SSDM\u201915)","author":"Hsu K. C.","year":"2015","unstructured":"K. C. Hsu, F. M. Lee, Y. Y. Lin, E. K. Lai, J. Y. Wu, D. Y. Lee, M. H. Lee, H. L. Lung, K. Y. Hsieh, and C. Y. Lu. 2015. A study of array resistance distribution and a novel operation algorithm for WOx ReRAM memory. In Proceedings of the International Conference on Solid State Devices and Materials (SSDM\u201915). 1168\u20131169."},{"key":"e_1_3_1_13_2","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"e_1_3_1_14_2","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858421"},{"key":"e_1_3_1_15_2","article-title":"SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5 MB model size","author":"Iandola Forrest N.","year":"2016","unstructured":"Forrest N. Iandola, Song Han, Matthew W. Moskewicz, Khalid Ashraf, William J. Dally, and Kurt Keutzer. 2016. SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5 MB model size. arXiv:1602.07360. Retrieved from https:\/\/arxiv.org\/abs\/1602.07360.","journal-title":"arXiv:1602.07360"},{"key":"e_1_3_1_16_2","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342009"},{"key":"e_1_3_1_17_2","article-title":"One weird trick for parallelizing convolutional neural networks","author":"Krizhevsky Alex","year":"2014","unstructured":"Alex Krizhevsky. 2014. One weird trick for parallelizing convolutional neural networks. arXiv:1404.5997. Retrieved from https:\/\/arxiv.org\/abs\/1404.5997.","journal-title":"arXiv:1404.5997"},{"key":"e_1_3_1_18_2","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"e_1_3_1_19_2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242466"},{"key":"e_1_3_1_20_2","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287715"},{"key":"e_1_3_1_21_2","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240800"},{"key":"e_1_3_1_22_2","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744930"},{"key":"e_1_3_1_23_2","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715178"},{"key":"e_1_3_1_24_2","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/22\/9\/095702"},{"key":"e_1_3_1_25_2","doi-asserted-by":"publisher","DOI":"10.1149\/08603.0035ecst"},{"key":"e_1_3_1_26_2","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080254"},{"key":"e_1_3_1_27_2","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"e_1_3_1_28_2","article-title":"Very deep convolutional networks for large-scale image recognition","author":"Simonyan Karen","year":"2014","unstructured":"Karen Simonyan and Andrew Zisserman. 2014. Very deep convolutional networks for large-scale image recognition. arXiv:1409.1556. Retrieved from https:\/\/arxiv.org\/abs\/1409.1556.","journal-title":"arXiv:1409.1556"},{"key":"e_1_3_1_29_2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"issue":"4","key":"e_1_3_1_30_2","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3325067","article-title":"Cross-point resistive memory: Nonideal properties and solutions","volume":"24","author":"Wang Chengning","year":"2019","unstructured":"Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Zheng Li, Jiayi Chang, Yang Zhang, Bing Wu, Jie Xu, Wei Zhao, et\u00a0al. 2019. Cross-point resistive memory: Nonideal properties and solutions. ACM Trans. Des. Autom. Electr. Syst. 24, 4 (2019), 1\u201337.","journal-title":"ACM Trans. Des. Autom. Electr. Syst."},{"key":"e_1_3_1_31_2","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3196116"},{"key":"e_1_3_1_32_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662395"},{"key":"e_1_3_1_33_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063078"},{"key":"e_1_3_1_34_2","doi-asserted-by":"publisher","DOI":"10.1145\/3307650.3322271"},{"key":"e_1_3_1_35_2","article-title":"Handling stuck-at-fault defects using matrix transformation for robust inference of DNNs","author":"Zhang B.","year":"2019","unstructured":"B. Zhang, N. Uysal, D. Fan, and R. Ewetz. 2019. Handling stuck-at-fault defects using matrix transformation for robust inference of DNNs. IEEE Trans. Comput.-Aid. Des. Integr. Circ. Syst. 39, 10 (2019), 2448\u20132460.","journal-title":"IEEE Trans. Comput.-Aid. Des. Integr. Circ. Syst."},{"key":"e_1_3_1_36_2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783723"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3510819","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3510819","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:02:11Z","timestamp":1750186931000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3510819"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,11,22]]},"references-count":35,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2022,11,30]]}},"alternative-id":["10.1145\/3510819"],"URL":"https:\/\/doi.org\/10.1145\/3510819","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"type":"print","value":"1084-4309"},{"type":"electronic","value":"1557-7309"}],"subject":[],"published":{"date-parts":[[2022,11,22]]},"assertion":[{"value":"2021-10-10","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2022-01-06","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2022-11-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}