{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T02:26:46Z","timestamp":1767839206372,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":24,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,6,6]],"date-time":"2022-06-06T00:00:00Z","timestamp":1654473600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,6,6]]},"DOI":"10.1145\/3526241.3530311","type":"proceedings-article","created":{"date-parts":[[2022,6,2]],"date-time":"2022-06-02T14:37:09Z","timestamp":1654180629000},"page":"287-292","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Adapt-Flow: A Flexible DNN Accelerator Architecture for Heterogeneous Dataflow Implementation"],"prefix":"10.1145","author":[{"given":"Jiaqi","family":"Yang","sequence":"first","affiliation":[{"name":"The George Washington University, Washington DC, DC, USA"}]},{"given":"Hao","family":"Zheng","sequence":"additional","affiliation":[{"name":"University of Central Florida, Orlando, FL, USA"}]},{"given":"Ahmed","family":"Louri","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington DC, DC, USA"}]}],"member":"320","published-online":{"date-parts":[[2022,6,6]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"http:\/\/nvdla.org","author":"Nvdla","year":"2017","unstructured":"Nvdla deep learning accelerator , http:\/\/nvdla.org , 2017 . Nvdla deep learning accelerator, http:\/\/nvdla.org, 2017."},{"key":"e_1_3_2_1_2_1","volume-title":"Shidiannao: Shifting vision processing closer to the sensor. In proc","author":"Zidong Du","year":"2015","unstructured":"Zidong Du et al. Shidiannao: Shifting vision processing closer to the sensor. In proc . of ISCA. IEEE , 2015 . Zidong Du et al. Shidiannao: Shifting vision processing closer to the sensor. In proc. of ISCA. IEEE, 2015."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001177"},{"key":"e_1_3_2_1_4_1","volume-title":"Machine learning at facebook: Understanding inference at the edge. In proc","author":"Wu Carole-Jean","year":"2019","unstructured":"Carole-Jean Wu Machine learning at facebook: Understanding inference at the edge. In proc . of HPCA. IEEE , 2019 . Carole-Jean Wu et al. Machine learning at facebook: Understanding inference at the edge. In proc. of HPCA. IEEE, 2019."},{"key":"e_1_3_2_1_5_1","volume-title":"Imagenet classification with deep convolutional neural networks. Advances in neural information processing systems","author":"Alex Krizhevsky","year":"2012","unstructured":"Alex Krizhevsky et al. Imagenet classification with deep convolutional neural networks. Advances in neural information processing systems , 2012 . Alex Krizhevsky et al. Imagenet classification with deep convolutional neural networks. Advances in neural information processing systems, 2012."},{"key":"e_1_3_2_1_6_1","volume-title":"X-vectors: Robust dnn embeddings for speaker recognition. In proc","author":"David Snyder","year":"2018","unstructured":"David Snyder et al. X-vectors: Robust dnn embeddings for speaker recognition. In proc . of ICASSP. IEEE , 2018 . David Snyder et al. X-vectors: Robust dnn embeddings for speaker recognition. In proc. of ICASSP. IEEE, 2018."},{"key":"e_1_3_2_1_7_1","volume-title":"Proc. of the","author":"Vivienne Sze","year":"2017","unstructured":"Vivienne Sze et al. Efficient processing of deep neural networks: A tutorial and survey . In Proc. of the IEEE , 2017 . Vivienne Sze et al. Efficient processing of deep neural networks: A tutorial and survey. In Proc. of the IEEE, 2017."},{"key":"e_1_3_2_1_8_1","volume-title":"Proc. of ASPLOS","author":"Maeri H. Kwon","year":"2018","unstructured":"H. Kwon et al. Maeri : Enabling flexible dataflow mapping over dnn accelerators via reconfigurable interconnects . In Proc. of ASPLOS , 2018 . H. Kwon et al. Maeri: Enabling flexible dataflow mapping over dnn accelerators via reconfigurable interconnects. In Proc. of ASPLOS, 2018."},{"key":"e_1_3_2_1_9_1","volume-title":"Proc. of the ASPLOS. ACM","author":"Mingyu","year":"2019","unstructured":"Mingyu Gao et al. Tangram: Optimized coarse-grained dataflow for scalable nn accelerators . In Proc. of the ASPLOS. ACM , 2019 . Mingyu Gao et al. Tangram: Optimized coarse-grained dataflow for scalable nn accelerators. In Proc. of the ASPLOS. ACM, 2019."},{"key":"e_1_3_2_1_10_1","volume-title":"IEEE JETCES","author":"Yu-Hsin","year":"2019","unstructured":"Yu-Hsin Chen et al. Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices . IEEE JETCES , 2019 . Yu-Hsin Chen et al. Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices. IEEE JETCES, 2019."},{"key":"e_1_3_2_1_11_1","volume-title":"Proc. of Micro. ACM","author":"Hyoukjun","year":"2019","unstructured":"Hyoukjun Kwon et al. Understanding reuse, performance, and hardware cost of dnn dataflow: A data-centric approach . In Proc. of Micro. ACM , 2019 . Hyoukjun Kwon et al. Understanding reuse, performance, and hardware cost of dnn dataflow: A data-centric approach. In Proc. of Micro. ACM, 2019."},{"key":"e_1_3_2_1_12_1","volume-title":"Proc. of the ISPASS. IEEE","author":"Angshuman","year":"2019","unstructured":"Angshuman Parashar et al. Timeloop: A systematic approach to dnn accelerator evaluation . In Proc. of the ISPASS. IEEE , 2019 . Angshuman Parashar et al. Timeloop: A systematic approach to dnn accelerator evaluation. In Proc. of the ISPASS. IEEE, 2019."},{"key":"e_1_3_2_1_13_1","volume-title":"Proc. of the ASPLOS. ACM","author":"Xuan","year":"2020","unstructured":"Xuan Yang et al. Interstellar: Using halide's scheduling language to analyze dnn accelerators . In Proc. of the ASPLOS. ACM , 2020 . Xuan Yang et al. Interstellar: Using halide's scheduling language to analyze dnn accelerators. In Proc. of the ASPLOS. ACM, 2020."},{"key":"e_1_3_2_1_14_1","volume-title":"Smart: A single-cycle reconfigurable noc for soc applications. In proc","author":"Owen Chen Chia-Hsin","year":"2013","unstructured":"Chia-Hsin Owen Chen Smart: A single-cycle reconfigurable noc for soc applications. In proc . of DATE. IEEE , 2013 . Chia-Hsin Owen Chen et al. Smart: A single-cycle reconfigurable noc for soc applications. In proc. of DATE. IEEE, 2013."},{"key":"e_1_3_2_1_15_1","volume-title":"Adapt-noc: A flexible network-on-chip design for heterogeneous manycore architectures. In proc","author":"Hao Zheng","year":"2021","unstructured":"Hao Zheng et al. Adapt-noc: A flexible network-on-chip design for heterogeneous manycore architectures. In proc . of HPCA. IEEE , 2021 . Hao Zheng et al. Adapt-noc: A flexible network-on-chip design for heterogeneous manycore architectures. In proc. of HPCA. IEEE, 2021."},{"key":"e_1_3_2_1_16_1","volume-title":"Proc. of DAC. IEEE","author":"Hao","year":"2020","unstructured":"Hao Zheng et al. A versatile and flexible chiplet-based system design for heterogeneous manycore architectures . In Proc. of DAC. IEEE , 2020 . Hao Zheng et al. A versatile and flexible chiplet-based system design for heterogeneous manycore architectures. In Proc. of DAC. IEEE, 2020."},{"key":"e_1_3_2_1_17_1","volume-title":"Proc. of HPCA. IEEE","author":"Eric","year":"2020","unstructured":"Eric Qin et al. Sigma: A sparse and irregular gemm accelerator with flexible interconnects for dnn training . In Proc. of HPCA. IEEE , 2020 . Eric Qin et al. Sigma: A sparse and irregular gemm accelerator with flexible interconnects for dnn training. In Proc. of HPCA. IEEE, 2020."},{"key":"e_1_3_2_1_18_1","volume-title":"Proc. of HPCA. IEEE","author":"Lizhong","year":"2014","unstructured":"Lizhong Chen et al. Mp3: Minimizing performance penalty for power-gating of clos network-on-chip . In Proc. of HPCA. IEEE , 2014 . Lizhong Chen et al. Mp3: Minimizing performance penalty for power-gating of clos network-on-chip. In Proc. of HPCA. IEEE, 2014."},{"key":"e_1_3_2_1_19_1","volume-title":"Proc. of the ICLR","author":"Simonyan Karen","year":"2014","unstructured":"Karen Simonyan and Andrew Zisserman . Very deep convolutional networks for large-scale image recognition . In Proc. of the ICLR , 2014 . Karen Simonyan and Andrew Zisserman. Very deep convolutional networks for large-scale image recognition. In Proc. of the ICLR, 2014."},{"key":"e_1_3_2_1_20_1","volume-title":"Proc. of the CVPR. IEEE","author":"Kaiming","year":"2016","unstructured":"Kaiming He et al. Deep residual learning for image recognition . In Proc. of the CVPR. IEEE , 2016 . Kaiming He et al. Deep residual learning for image recognition. In Proc. of the CVPR. IEEE, 2016."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-24574-4_28"},{"key":"e_1_3_2_1_22_1","author":"Jajszczyk Andrzej","year":"2003","unstructured":"Andrzej Jajszczyk . Nonblocking, repackable, and rearrangeable clos networks: fifty years of the theory evolution. In Communications Magazine. IEEE , 2003 . Andrzej Jajszczyk. Nonblocking, repackable, and rearrangeable clos networks: fifty years of the theory evolution. In Communications Magazine. IEEE, 2003.","journal-title":"Magazine. IEEE"},{"key":"e_1_3_2_1_23_1","volume-title":"Planaria: Dynamic architecture fission for spatial multi-tenant acceleration of deep neural networks. In proc","author":"Soroush Ghodrati","year":"2020","unstructured":"Soroush Ghodrati et al. Planaria: Dynamic architecture fission for spatial multi-tenant acceleration of deep neural networks. In proc . of MICRO. IEEE , 2020 . Soroush Ghodrati et al. Planaria: Dynamic architecture fission for spatial multi-tenant acceleration of deep neural networks. In proc. of MICRO. IEEE, 2020."},{"key":"e_1_3_2_1_24_1","volume-title":"Proc. of the NOCS. IEEE","author":"Chen","year":"2012","unstructured":"Chen Sun et al. Dsent-a tool connecting emerging photonics with electronics for opto-electronic networks-on-chip modeling . In Proc. of the NOCS. IEEE , 2012 . Chen Sun et al. Dsent-a tool connecting emerging photonics with electronics for opto-electronic networks-on-chip modeling. In Proc. of the NOCS. IEEE, 2012."}],"event":{"name":"GLSVLSI '22: Great Lakes Symposium on VLSI 2022","location":"Irvine CA USA","acronym":"GLSVLSI '22","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the Great Lakes Symposium on VLSI 2022"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3526241.3530311","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3526241.3530311","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:02:16Z","timestamp":1750186936000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3526241.3530311"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,6]]},"references-count":24,"alternative-id":["10.1145\/3526241.3530311","10.1145\/3526241"],"URL":"https:\/\/doi.org\/10.1145\/3526241.3530311","relation":{},"subject":[],"published":{"date-parts":[[2022,6,6]]},"assertion":[{"value":"2022-06-06","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}