{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:16:23Z","timestamp":1750220183201,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":44,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,6,6]],"date-time":"2022-06-06T00:00:00Z","timestamp":1654473600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-2019310, CCF-2028910"],"award-info":[{"award-number":["CCF-2019310, CCF-2028910"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,6,6]]},"DOI":"10.1145\/3526241.3530827","type":"proceedings-article","created":{"date-parts":[[2022,6,2]],"date-time":"2022-06-02T14:37:09Z","timestamp":1654180629000},"page":"481-486","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Graph Neural Network based Hardware Trojan Detection at Intermediate Representative for SoC Platforms"],"prefix":"10.1145","author":[{"given":"Weimin","family":"Fu","sequence":"first","affiliation":[{"name":"Kansas State University, Manhattan, KS, USA"}]},{"given":"Honggang","family":"Yu","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}]},{"given":"Orlando","family":"Arias","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}]},{"given":"Kaichen","family":"Yang","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}]},{"given":"Yier","family":"Jin","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}]},{"given":"Tuba","family":"Yavuz","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, FL, USA"}]},{"given":"Xiaolong","family":"Guo","sequence":"additional","affiliation":[{"name":"Kansas State University, Manhattan, KS, USA"}]}],"member":"320","published-online":{"date-parts":[[2022,6,6]]},"reference":[{"volume-title":"HACK at DAC. Retrieved December 5--9","year":"2021","key":"e_1_3_2_1_1_1","unstructured":"2021. HACK at DAC. Retrieved December 5--9 , 2021 from https:\/\/hackatevent.org\/hackdac21\/ 2021. HACK at DAC. Retrieved December 5--9, 2021 from https:\/\/hackatevent.org\/hackdac21\/"},{"key":"e_1_3_2_1_2_1","unstructured":"2022. Common Weakness Enumeration. https:\/\/cwe.mitre.org\/  2022. Common Weakness Enumeration. https:\/\/cwe.mitre.org\/"},{"key":"e_1_3_2_1_3_1","volume-title":"GitHub - lowRISC\/ibex: Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy. [Online","author":"RISC.","year":"2022","unstructured":"low RISC. 2022. GitHub - lowRISC\/ibex: Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy. [Online ; accessed 2022 -04--10]. lowRISC. 2022. GitHub - lowRISC\/ibex: Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy. [Online; accessed 2022-04--10]."},{"key":"e_1_3_2_1_4_1","unstructured":"antmicro. 2022. GitHub - antmicro\/yosys-uhdm-plugin-integration. https:\/\/github.com\/antmicro\/yosys-uhdm-plugin-integration  antmicro. 2022. GitHub - antmicro\/yosys-uhdm-plugin-integration. https:\/\/github.com\/antmicro\/yosys-uhdm-plugin-integration"},{"key":"e_1_3_2_1_5_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","author":"Arias Orlando","year":"2022","unstructured":"Orlando Arias , Zhaoxiang Liu , Xiaolong Guo , Yier Jin , and Shuo Wang . 2022 . RTSec: Automated RTL Code Augmentation for Hardware Security Enhancement. In 2022 Design , Automation & Test in Europe Conference & Exhibition (DATE). IEEE. Orlando Arias, Zhaoxiang Liu, Xiaolong Guo, Yier Jin, and Shuo Wang. 2022. RTSec: Automated RTL Code Augmentation for Hardware Security Enhancement. In 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE."},{"key":"e_1_3_2_1_6_1","first-page":"209","article-title":"Klee: unassisted and automatic generation of high-coverage tests for complex systems programs","volume":"8","author":"Cadar Cristian","year":"2008","unstructured":"Cristian Cadar , Daniel Dunbar , Dawson R Engler , 2008 . Klee: unassisted and automatic generation of high-coverage tests for complex systems programs .. In OSDI , Vol. 8. 209 -- 224 . Cristian Cadar, Daniel Dunbar, Dawson R Engler, et al. 2008. Klee: unassisted and automatic generation of high-coverage tests for complex systems programs.. In OSDI, Vol. 8. 209--224.","journal-title":"OSDI"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TKDE.2018.2807452"},{"volume-title":"Verible project. Retrieved","year":"2022","key":"e_1_3_2_1_8_1","unstructured":"Chipsalliance. 2019. Verible project. Retrieved April 5, 2022 from https:\/\/github.com\/chipsalliance\/verible\/ Chipsalliance. 2019. Verible project. Retrieved April 5, 2022 from https:\/\/github.com\/chipsalliance\/verible\/"},{"volume-title":"Parser, Elaborator, UHDM Compiler","key":"e_1_3_2_1_9_1","unstructured":"chipsalliance. 2022. GitHub - chipsalliance\/Surelog: SystemVerilog 2017 Preprocessor , Parser, Elaborator, UHDM Compiler . Provides IEEE Design\/TB C\/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX. https:\/\/github.com\/chipsalliance\/Surelog chipsalliance. 2022. GitHub - chipsalliance\/Surelog: SystemVerilog 2017 Preprocessor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design\/TB C\/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX. https:\/\/github.com\/chipsalliance\/Surelog"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/IVC.1996.496013"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/1792734.1792766"},{"key":"e_1_3_2_1_12_1","volume-title":"Graph Neural Networks in Tensor-Flow and Keras with Spektral. CoRR abs\/2006.12138","author":"Grattarola Daniele","year":"2020","unstructured":"Daniele Grattarola and Cesare Alippi . 2020. Graph Neural Networks in Tensor-Flow and Keras with Spektral. CoRR abs\/2006.12138 ( 2020 ). arXiv:2006.12138 https:\/\/arxiv.org\/abs\/2006.12138 Daniele Grattarola and Cesare Alippi. 2020. Graph Neural Networks in Tensor-Flow and Keras with Spektral. CoRR abs\/2006.12138 (2020). arXiv:2006.12138 https:\/\/arxiv.org\/abs\/2006.12138"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2019.8740840"},{"key":"e_1_3_2_1_14_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1727--1732","author":"Guo Xiaolong","year":"2019","unstructured":"Xiaolong Guo , Huifeng Zhu , Yier Jin , and Xuan Zhang . 2019 . When capacitors attack: Formal method driven design and detection of charge-domain trojans. In 2019 Design , Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1727--1732 . Xiaolong Guo, Huifeng Zhu, Yier Jin, and Xuan Zhang. 2019. When capacitors attack: Formal method driven design and detection of charge-domain trojans. In 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1727--1732."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702479"},{"key":"e_1_3_2_1_17_1","volume-title":"Security And Privacy In Computing And Communications\/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom\/BigDataSE)","author":"Hasegawa Kento","year":"1891","unstructured":"Kento Hasegawa , Youhua Shi , and Nozomu Togawa . 2018. Hardware Trojan detection utilizing machine learning approaches. In 2018 17th IEEE International Conference On Trust , Security And Privacy In Computing And Communications\/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom\/BigDataSE) . IEEE , 1891 --1896. Kento Hasegawa, Youhua Shi, and Nozomu Togawa. 2018. Hardware Trojan detection utilizing machine learning approaches. In 2018 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications\/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom\/BigDataSE). IEEE, 1891--1896."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2018.09.007"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203780"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.907270"},{"key":"e_1_3_2_1_21_1","volume-title":"Semi-supervised classification with graph convolutional networks. arXiv preprint arXiv:1609.02907","author":"Kipf Thomas N","year":"2016","unstructured":"Thomas N Kipf and MaxWelling. 2016. Semi-supervised classification with graph convolutional networks. arXiv preprint arXiv:1609.02907 ( 2016 ). Thomas N Kipf and MaxWelling. 2016. Semi-supervised classification with graph convolutional networks. arXiv preprint arXiv:1609.02907 (2016)."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00002"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"key":"e_1_3_2_1_24_1","volume-title":"arXiv preprint arXiv:1801.01207","author":"Lipp Moritz","year":"2018","unstructured":"Moritz Lipp , Michael Schwarz , Daniel Gruss , Thomas Prescher , Werner Haas , Stefan Mangard , Paul Kocher , Daniel Genkin , Yuval Yarom , and Mike Hamburg . 2018. Meltdown. arXiv preprint arXiv:1801.01207 ( 2018 ). Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Stefan Mangard, Paul Kocher, Daniel Genkin, Yuval Yarom, and Mike Hamburg. 2018. Meltdown. arXiv preprint arXiv:1801.01207 (2018)."},{"key":"e_1_3_2_1_25_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","author":"Liu Zhaoxiang","year":"2022","unstructured":"Zhaoxiang Liu , Orlando Arias , Weimin Fu , and Yier Jin . 2022 . Inter-IP Malicious Modification Detection through Static Information Flow Tracking. In 2022 Design , Automation & Test in Europe Conference & Exhibition (DATE). IEEE. Zhaoxiang Liu, Orlando Arias, Weimin Fu, and Yier Jin. 2022. Inter-IP Malicious Modification Detection through Static Information Flow Tracking. In 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE."},{"volume-title":"CoSA: Integrated verification for agile hardware design. In 2018 Formal Methods in Computer Aided Design (FMCAD)","author":"Mattarei Cristian","key":"e_1_3_2_1_26_1","unstructured":"Cristian Mattarei , Makai Mann , Clark Barrett , Ross G Daly , Dillon Huff , and Pat Hanrahan . 2018. CoSA: Integrated verification for agile hardware design. In 2018 Formal Methods in Computer Aided Design (FMCAD) . IEEE , 1--5. Cristian Mattarei, Makai Mann, Clark Barrett, Ross G Daly, Dillon Huff, and Pat Hanrahan. 2018. CoSA: Integrated verification for agile hardware design. In 2018 Formal Methods in Computer Aided Design (FMCAD). IEEE, 1--5."},{"key":"e_1_3_2_1_27_1","volume-title":"RTLConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities","author":"Meng Xingyu","year":"2021","unstructured":"Xingyu Meng , Shamik Kundu , Arun K Kanuparthi , and Kanad Basu . 2021. RTLConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( 2021 ). Xingyu Meng, Shamik Kundu, Arun K Kanuparthi, and Kanad Basu. 2021. RTLConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2021)."},{"key":"e_1_3_2_1_28_1","volume-title":"ABC: A system for sequential synthesis and verification. URL http:\/\/www.eecs.berkeley.edu\/alanmi\/abc 17","author":"Alan Mishchenko","year":"2007","unstructured":"Alan Mishchenko et al. 2007 . ABC: A system for sequential synthesis and verification. URL http:\/\/www.eecs.berkeley.edu\/alanmi\/abc 17 (2007). Alan Mishchenko et al. 2007. ABC: A system for sequential synthesis and verification. URL http:\/\/www.eecs.berkeley.edu\/alanmi\/abc 17 (2007)."},{"key":"e_1_3_2_1_29_1","volume-title":"Slang - SystemVerilog Language Services. Retrieved","author":"Popoloski Michael","year":"2022","unstructured":"Michael Popoloski . 2019. Slang - SystemVerilog Language Services. Retrieved April 3, 2022 from https:\/\/github.com\/MikePopoloski\/slang\/ Michael Popoloski. 2019. Slang - SystemVerilog Language Services. Retrieved April 3, 2022 from https:\/\/github.com\/MikePopoloski\/slang\/"},{"key":"e_1_3_2_1_30_1","volume-title":"QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog. In 2021 IEEE 39th International Conference on Computer Design (ICCD). IEEE, 603--607","author":"Reimann Lennart M","year":"2021","unstructured":"Lennart M Reimann , Luca Hanel , Dominik Sisejkovic , Farhad Merchant , and Rainer Leupers . 2021 . QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog. In 2021 IEEE 39th International Conference on Computer Design (ICCD). IEEE, 603--607 . Lennart M Reimann, Luca Hanel, Dominik Sisejkovic, Farhad Merchant, and Rainer Leupers. 2021. QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog. In 2021 IEEE 39th International Conference on Computer Design (ICCD). IEEE, 603--607."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657085"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/3385412.3386024"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358292"},{"key":"e_1_3_2_1_34_1","volume-title":"Verilator: Open simulation-growing up. DVClub Bristol","author":"Snyder Wilson","year":"2013","unstructured":"Wilson Snyder . 2013 . Verilator: Open simulation-growing up. DVClub Bristol (2013). Wilson Snyder. 2013. Verilator: Open simulation-growing up. DVClub Bristol (2013)."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/72.572108"},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-16214-0_42"},{"key":"e_1_3_2_1_37_1","volume-title":"Fuzzing hardware like software. arXiv preprint arXiv:2102.02308","author":"Trippel Timothy","year":"2021","unstructured":"Timothy Trippel , Kang G Shin , Alex Chernyakhovsky , Garret Kelly , Dominic Rizzo , and Matthew Hicks . 2021. Fuzzing hardware like software. arXiv preprint arXiv:2102.02308 ( 2021 ). Timothy Trippel, Kang G Shin, Alex Chernyakhovsky, Garret Kelly, Dominic Rizzo, and Matthew Hicks. 2021. Fuzzing hardware like software. arXiv preprint arXiv:2102.02308 (2021)."},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132847.3132967"},{"key":"e_1_3_2_1_39_1","volume-title":"Proc. 2nd Workshop Open-Source EDA Technol.","author":"Wang Sheng-Hong","year":"2019","unstructured":"Sheng-Hong Wang , Rafael Trapani Possignolo , Qian Chen , Rohan Ganpati , and Jose Renau . 2019 . LGraph: A unified data model and API for productive opensource hardware design . In Proc. 2nd Workshop Open-Source EDA Technol. Sheng-Hong Wang, Rafael Trapani Possignolo, Qian Chen, Rohan Ganpati, and Jose Renau. 2019. LGraph: A unified data model and API for productive opensource hardware design. In Proc. 2nd Workshop Open-Source EDA Technol."},{"key":"e_1_3_2_1_40_1","unstructured":"Sheng-Hong Wang and Jose Renau. 2021. Design Decisions in LiveHD for HDLs Compilation. (2021).  Sheng-Hong Wang and Jose Renau. 2021. Design Decisions in LiveHD for HDLs Compilation. (2021)."},{"key":"e_1_3_2_1_41_1","volume-title":"Proc. 2nd Workshop Open-Source EDA Technol.","author":"Wang Sheng-Hong","year":"2019","unstructured":"Sheng-Hong Wang , Akash Sridhar , and Jose Renau . 2019 . LNAST: A language neutral intermediate representation for hardware description languages . In Proc. 2nd Workshop Open-Source EDA Technol. Sheng-Hong Wang, Akash Sridhar, and Jose Renau. 2019. LNAST: A language neutral intermediate representation for hardware description languages. In Proc. 2nd Workshop Open-Source EDA Technol."},{"key":"e_1_3_2_1_42_1","unstructured":"Clifford Wolf. 2016. Yosys open synthesis suite.  Clifford Wolf. 2016. Yosys open synthesis suite."},{"key":"e_1_3_2_1_43_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1504--1509","author":"Yasaei Rozhin","year":"2021","unstructured":"Rozhin Yasaei , Shih-Yuan Yu , and Mohammad Abdullah Al Faruque . 2021 . Gnn4tj: Graph neural networks for hardware trojan detection at register transfer level. In 2021 Design , Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1504--1509 . Rozhin Yasaei, Shih-Yuan Yu, and Mohammad Abdullah Al Faruque. 2021. Gnn4tj: Graph neural networks for hardware trojan detection at register transfer level. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1504--1509."},{"key":"e_1_3_2_1_44_1","volume-title":"HW2VEC: A Graph Learning Tool for Automating Hardware Security. arXiv preprint arXiv:2107.12328","author":"Yu Shih-Yuan","year":"2021","unstructured":"Shih-Yuan Yu , Rozhin Yasaei , Qingrong Zhou , Tommy Nguyen , and Mohammad Abdullah Al Faruque . 2021. HW2VEC: A Graph Learning Tool for Automating Hardware Security. arXiv preprint arXiv:2107.12328 ( 2021 ). Shih-Yuan Yu, Rozhin Yasaei, Qingrong Zhou, Tommy Nguyen, and Mohammad Abdullah Al Faruque. 2021. HW2VEC: A Graph Learning Tool for Automating Hardware Security. arXiv preprint arXiv:2107.12328 (2021)."},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00071"}],"event":{"name":"GLSVLSI '22: Great Lakes Symposium on VLSI 2022","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Irvine CA USA","acronym":"GLSVLSI '22"},"container-title":["Proceedings of the Great Lakes Symposium on VLSI 2022"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3526241.3530827","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3526241.3530827","content-type":"text\/html","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3526241.3530827","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3526241.3530827","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:02:17Z","timestamp":1750186937000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3526241.3530827"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,6]]},"references-count":44,"alternative-id":["10.1145\/3526241.3530827","10.1145\/3526241"],"URL":"https:\/\/doi.org\/10.1145\/3526241.3530827","relation":{},"subject":[],"published":{"date-parts":[[2022,6,6]]},"assertion":[{"value":"2022-06-06","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}