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Syst."],"published-print":{"date-parts":[[2022,5,26]]},"abstract":"<jats:p>While cycle-accurate simulators are essential tools for architecture research, design, and development, their practicality is limited by an extremely long time-to-solution for realistic applications under investigation. This work describes a concerted effort, where machine learning (ML) is used to accelerate microarchitecture simulation. First, an ML-based instruction latency prediction framework that accounts for both static instruction properties and dynamic processor states is constructed. Then, a GPU-accelerated parallel simulator is implemented based on the proposed instruction latency predictor, and its simulation accuracy and throughput are validated and evaluated against a state-of-the-art simulator. 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Kodama , T. Odajima , M. Tsuji , H. Yashiro , M. Aoki , N. Shida , I. Miyoshi , K. Hirai , A. Furuya , A. Asato , K. Morita , and T. Shimizu . 2020. Co-Design for A64FX Manycore Processor and \"Fugaku \". In SC20: International Conference for High Performance Computing, Networking, Storage and Analysis. Proc. ACM Meas. Anal. Comput. Syst. , Vol. 6 , No. 2, Article 25. Publication date : June 2022 . 25:24 Lingda Li, Santosh Pandey, Thomas Flynn, Hang Liu, Noel Wheeler, and Adolfy Hoisie M. Sato, Y. Ishikawa, H. Tomita, Y. Kodama, T. Odajima, M. Tsuji, H. Yashiro, M. Aoki, N. Shida, I. Miyoshi, K. Hirai, A. Furuya, A. Asato, K. Morita, and T. Shimizu. 2020. Co-Design for A64FX Manycore Processor and \"Fugaku\". In SC20: International Conference for High Performance Computing, Networking, Storage and Analysis. Proc. ACM Meas. Anal. Comput. Syst., Vol. 6, No. 2, Article 25. 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In 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5)","author":"Seznec Andr\u00e9","year":"2016","unstructured":"Andr\u00e9 Seznec . 2016 . TAGE-SC-L Branch Predictors Again. In 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5) . Seoul, South Korea. https:\/\/hal.inria.fr\/hal-01354253 Andr\u00e9 Seznec. 2016. TAGE-SC-L Branch Predictors Again. In 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5). Seoul, South Korea. https:\/\/hal.inria.fr\/hal-01354253"},{"key":"e_1_2_1_44_1","volume-title":"A value for n-person games. Contributions to the Theory of Games 2, 28","author":"Shapley Lloyd S","year":"1953","unstructured":"Lloyd S Shapley . 1953. A value for n-person games. Contributions to the Theory of Games 2, 28 ( 1953 ), 307--317. Lloyd S Shapley. 1953. A value for n-person games. Contributions to the Theory of Games 2, 28 (1953), 307--317."},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605403"},{"key":"e_1_2_1_46_1","volume-title":"Spectral Audio Signal Processing. https:\/\/ccrma.stanford.edu\/~jos\/sasp online book","author":"Smith Julius O.","year":"2011","unstructured":"Julius O. Smith . 2011. Spectral Audio Signal Processing. https:\/\/ccrma.stanford.edu\/~jos\/sasp online book , 2011 edition. Julius O. Smith. 2011. Spectral Audio Signal Processing. https:\/\/ccrma.stanford.edu\/~jos\/sasp online book, 2011 edition."},{"volume-title":"Proceedings of the IEEE\/CVF Conference on Computer Vision and Pattern Recognition (CVPR).","author":"Tan Mingxing","key":"e_1_2_1_47_1","unstructured":"Mingxing Tan , Bo Chen , Ruoming Pang , Vijay Vasudevan , Mark Sandler , Andrew Howard , and Quoc V. Le . 2019. MnasNet: Platform-Aware Neural Architecture Search for Mobile . In Proceedings of the IEEE\/CVF Conference on Computer Vision and Pattern Recognition (CVPR). Mingxing Tan, Bo Chen, Ruoming Pang, Vijay Vasudevan, Mark Sandler, Andrew Howard, and Quoc V. Le. 2019. MnasNet: Platform-Aware Neural Architecture Search for Mobile. In Proceedings of the IEEE\/CVF Conference on Computer Vision and Pattern Recognition (CVPR)."},{"key":"e_1_2_1_48_1","volume-title":"Proceedings of the 36th International Conference on Machine Learning (Proceedings of Machine Learning Research","volume":"6114","author":"Tan Mingxing","year":"2019","unstructured":"Mingxing Tan and Quoc Le . 2019 . EfficientNet: Rethinking Model Scaling for Convolutional Neural Networks . In Proceedings of the 36th International Conference on Machine Learning (Proceedings of Machine Learning Research , Vol. 97), Kamalika Chaudhuri and Ruslan Salakhutdinov (Eds.). PMLR, 6105-- 6114 . http:\/\/proceedings.mlr.press\/v97\/tan19a.html Mingxing Tan and Quoc Le. 2019. EfficientNet: Rethinking Model Scaling for Convolutional Neural Networks. In Proceedings of the 36th International Conference on Machine Learning (Proceedings of Machine Learning Research, Vol. 97), Kamalika Chaudhuri and Ruslan Salakhutdinov (Eds.). PMLR, 6105--6114. http:\/\/proceedings.mlr.press\/v97\/tan19a.html"},{"key":"e_1_2_1_49_1","volume-title":"Cache Simulation for Instruction Set Simulator QEMU. In 2014 IEEE 12th International Conference on Dependable, Autonomic and Secure Computing. 441--446","author":"Dung Tran Van","year":"2014","unstructured":"Tran Van Dung , Ittetsu Taniguchi , and Hiroyuki Tomiyama . 2014 . Cache Simulation for Instruction Set Simulator QEMU. In 2014 IEEE 12th International Conference on Dependable, Autonomic and Secure Computing. 441--446 . https: \/\/doi.org\/10.1109\/DASC.2014.85 10.1109\/DASC.2014.85 Tran Van Dung, Ittetsu Taniguchi, and Hiroyuki Tomiyama. 2014. Cache Simulation for Instruction Set Simulator QEMU. In 2014 IEEE 12th International Conference on Dependable, Autonomic and Secure Computing. 441--446. https: \/\/doi.org\/10.1109\/DASC.2014.85"},{"key":"e_1_2_1_50_1","unstructured":"Han Vanholder. 2016. Efficient inference with tensorrt.  Han Vanholder. 2016. Efficient inference with tensorrt."},{"key":"e_1_2_1_51_1","unstructured":"Ashish Vaswani Noam Shazeer Niki Parmar Jakob Uszkoreit Llion Jones Aidan N Gomez Lukasz Kaiser and Illia Polosukhin. 2017. Attention is all you need. In Advances in neural information processing systems. 5998--6008.  Ashish Vaswani Noam Shazeer Niki Parmar Jakob Uszkoreit Llion Jones Aidan N Gomez Lukasz Kaiser and Illia Polosukhin. 2017. Attention is all you need. In Advances in neural information processing systems. 5998--6008."},{"key":"e_1_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.79"},{"key":"e_1_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056063"},{"key":"e_1_2_1_54_1","volume-title":"A Survey of Machine Learning for Computer Architecture and Systems. arXiv preprint arXiv:2102.07952","author":"Wu Nan","year":"2021","unstructured":"Nan Wu and Yuan Xie . 2021. A Survey of Machine Learning for Computer Architecture and Systems. arXiv preprint arXiv:2102.07952 ( 2021 ). Nan Wu and Yuan Xie. 2021. A Survey of Machine Learning for Computer Architecture and Systems. arXiv preprint arXiv:2102.07952 (2021)."},{"volume-title":"Proceedings of the 30th Annual International Symposium on Computer Architecture","author":"Wunderlich Roland E.","key":"e_1_2_1_55_1","unstructured":"Roland E. Wunderlich , Thomas F. Wenisch, Babak Falsafi, and James C. Hoe. 2003. SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling . In Proceedings of the 30th Annual International Symposium on Computer Architecture ( San Diego, California) (ISCA '03). Association for Computing Machinery, New York, NY, USA, 84--97. https:\/\/doi.org\/10.1145\/859618.859629 10.1145\/859618.859629 Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, and James C. Hoe. 2003. SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling. In Proceedings of the 30th Annual International Symposium on Computer Architecture (San Diego, California) (ISCA '03). Association for Computing Machinery, New York, NY, USA, 84--97. https:\/\/doi.org\/10.1145\/859618.859629"},{"key":"e_1_2_1_56_1","volume-title":"Hot Chips","volume":"30","author":"Yoshida Toshio","year":"2018","unstructured":"Toshio Yoshida . 2018 . Fujitsu high performance CPU for the Post-K Computer . In Hot Chips , Vol. 30 . Toshio Yoshida. 2018. Fujitsu high performance CPU for the Post-K Computer. In Hot Chips, Vol. 30."},{"key":"e_1_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2897977"},{"key":"e_1_2_1_58_1","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2015.7363659"}],"container-title":["Proceedings of the ACM on Measurement and Analysis of Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3530891","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3530891","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3530891","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T18:09:26Z","timestamp":1750183766000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3530891"}},"subtitle":["Accurate and High-Performance Computer Architecture Simulation using Deep Learning"],"short-title":[],"issued":{"date-parts":[[2022,5,26]]},"references-count":59,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2022,5,26]]}},"alternative-id":["10.1145\/3530891"],"URL":"https:\/\/doi.org\/10.1145\/3530891","relation":{},"ISSN":["2476-1249"],"issn-type":[{"type":"electronic","value":"2476-1249"}],"subject":[],"published":{"date-parts":[[2022,5,26]]},"assertion":[{"value":"2022-06-06","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}