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However, FPGA adoption found limitations in their programmability and required knowledge. Therefore, researchers focused on FPGA abstractions and automation tools. Here, we survey three leading digital design abstractions:\n            <jats:bold>Hardware Description Languages (HDLs)<\/jats:bold>\n            ,\n            <jats:bold>High-Level Synthesis (HLS)<\/jats:bold>\n            tools, and\n            <jats:bold>Domain-Specific Languages (DSLs)<\/jats:bold>\n            . We review these abstraction solutions, provide a timeline, and propose a taxonomy for each abstraction trend: programming models for HDLs;\n            <jats:bold>Intellectual Property (IP)<\/jats:bold>\n            -based or System-based toolchains for HLS; application, architecture, and infrastructure domains for DSLs.\n          <\/jats:p>","DOI":"10.1145\/3532989","type":"journal-article","created":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T11:53:59Z","timestamp":1651060439000},"page":"1-48","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":56,"title":["Pushing the Level of Abstraction of Digital System Design: A Survey on How to Program FPGAs"],"prefix":"10.1145","volume":"55","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3101-8118","authenticated-orcid":false,"given":"Emanuele Del","family":"Sozzo","sequence":"first","affiliation":[{"name":"Politecnico di Milano, DEIB, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5834-0812","authenticated-orcid":false,"given":"Davide","family":"Conficconi","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, DEIB, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4005-6036","authenticated-orcid":false,"given":"Alberto","family":"Zeni","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, DEIB, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2395-9866","authenticated-orcid":false,"given":"Mirko","family":"Salaris","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, DEIB, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9030-6940","authenticated-orcid":false,"given":"Donatella","family":"Sciuto","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, DEIB, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9883-9693","authenticated-orcid":false,"given":"Marco D.","family":"Santambrogio","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, DEIB, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2022,12,3]]},"reference":[{"key":"e_1_3_4_2_2","unstructured":"ACE. 2017. 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