{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,14]],"date-time":"2026-05-14T02:33:03Z","timestamp":1778725983230,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T00:00:00Z","timestamp":1656288000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"National Research Foundation of Korea (NRF) by the Korea government (MSIT)","award":["NRF-2021R1G1A1094835"],"award-info":[{"award-number":["NRF-2021R1G1A1094835"]}]},{"name":"Samsung Research Funding & Incubation Center of Samsung Electronics, Republic of Korea","award":["SRFC-IT2002-06"],"award-info":[{"award-number":["SRFC-IT2002-06"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,6,27]]},"DOI":"10.1145\/3538643.3539742","type":"proceedings-article","created":{"date-parts":[[2022,6,23]],"date-time":"2022-06-23T22:31:06Z","timestamp":1656023466000},"page":"106-112","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["PiF"],"prefix":"10.1145","author":[{"given":"Myungjun","family":"Chun","sequence":"first","affiliation":[{"name":"Seoul National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaeyong","family":"Lee","sequence":"additional","affiliation":[{"name":"Seoul National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sanggu","family":"Lee","sequence":"additional","affiliation":[{"name":"Seoul National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Myungsuk","family":"Kim","sequence":"additional","affiliation":[{"name":"Kyungpook National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jihong","family":"Kim","sequence":"additional","affiliation":[{"name":"Seoul National University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2022,6,27]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358320"},{"key":"e_1_3_2_1_2_1","volume-title":"the ACM SIGKDD International Conference on Knowledge Discovery & Data Mining (KDD)","author":"Borisyuk Fedor","year":"2018","unstructured":"Fedor Borisyuk , Albert Gordo , and Viswanath Sivakumar . Rosetta : Large scale system for text detection and recognition in images . In the ACM SIGKDD International Conference on Knowledge Discovery & Data Mining (KDD) , 2018 . Fedor Borisyuk, Albert Gordo, and Viswanath Sivakumar. Rosetta: Large scale system for text detection and recognition in images. In the ACM SIGKDD International Conference on Knowledge Discovery & Data Mining (KDD), 2018."},{"key":"e_1_3_2_1_3_1","volume-title":"Face search at scale: 80 million gallery. arXiv preprint arXiv:1507.07242","author":"Wang Dayong","year":"2015","unstructured":"Dayong Wang , Charles Otto , and Anil K Jain . Face search at scale: 80 million gallery. arXiv preprint arXiv:1507.07242 , 2015 . Dayong Wang, Charles Otto, and Anil K Jain. Face search at scale: 80 million gallery. arXiv preprint arXiv:1507.07242, 2015."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.14778\/2732967.2732972"},{"key":"e_1_3_2_1_5_1","volume-title":"Jason Cong. INSIDER: Designing in-Storage Computing System for Emerging High-Performance Drive. In the USENIX Annual Technical Conference (ATC)","author":"Ruan Zhenyuan","year":"2019","unstructured":"Zhenyuan Ruan , Tong He , and Jason Cong. INSIDER: Designing in-Storage Computing System for Emerging High-Performance Drive. In the USENIX Annual Technical Conference (ATC) , 2019 . Zhenyuan Ruan, Tong He, and Jason Cong. INSIDER: Designing in-Storage Computing System for Emerging High-Performance Drive. In the USENIX Annual Technical Conference (ATC), 2019."},{"key":"e_1_3_2_1_6_1","volume-title":"High-Performance Key-Value SSD. In the IEEE International Symposium on High Performance Computer Architecture (HPCA)","author":"Jin Yanqin","year":"2017","unstructured":"Yanqin Jin , Hung-Wei Tseng , Yannis Papakonstantinou , and Steven Swanson . KAML : A Flexible , High-Performance Key-Value SSD. In the IEEE International Symposium on High Performance Computer Architecture (HPCA) , 2017 . Yanqin Jin, Hung-Wei Tseng, Yannis Papakonstantinou, and Steven Swanson. KAML: A Flexible, High-Performance Key-Value SSD. In the IEEE International Symposium on High Performance Computer Architecture (HPCA), 2017."},{"key":"e_1_3_2_1_7_1","volume-title":"DeWitt. Query Processing on Smart SSDs: Opportunities and Challenges. In the ACM SIGMOD International Conference on Management of Data (SIGMOD)","author":"Do Jaeyoung","year":"2013","unstructured":"Jaeyoung Do , Yang-Suk Kee , Jignesh M. Patel , Chanik Park , Kwanghyun Park , and David J . DeWitt. Query Processing on Smart SSDs: Opportunities and Challenges. In the ACM SIGMOD International Conference on Management of Data (SIGMOD) , 2013 . Jaeyoung Do, Yang-Suk Kee, Jignesh M. Patel, Chanik Park, Kwanghyun Park, and David J. DeWitt. Query Processing on Smart SSDs: Opportunities and Challenges. In the ACM SIGMOD International Conference on Management of Data (SIGMOD), 2013."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2020.3009347"},{"key":"e_1_3_2_1_9_1","volume-title":"Summarizer: Trading Communication with Computing Near Storage. In the IEEE\/ACM International Symposium on Microarchitecture (MICRO)","author":"Koo Gunjae","year":"2017","unstructured":"Gunjae Koo , Kiran Kumar Matam , Te I., H. V. Krishna Giri Narra, Jing Li, Hung-Wei Tseng, Steven Swanson, and Murali Annavaram . Summarizer: Trading Communication with Computing Near Storage. In the IEEE\/ACM International Symposium on Microarchitecture (MICRO) , 2017 . Gunjae Koo, Kiran Kumar Matam, Te I., H.V. Krishna Giri Narra, Jing Li, Hung-Wei Tseng, Steven Swanson, and Murali Annavaram. Summarizer: Trading Communication with Computing Near Storage. In the IEEE\/ACM International Symposium on Microarchitecture (MICRO), 2017."},{"key":"e_1_3_2_1_10_1","volume-title":"Arvind. GraFboost: Using Accelerated Flash Storage for External Graph Analytics. In the International Symposium on Computer Architecture (ISCA)","author":"Jun Sang-Woo","year":"2018","unstructured":"Sang-Woo Jun , Andy Wright , Sizhuo Zhang , Shuotao Xu , and Arvind. GraFboost: Using Accelerated Flash Storage for External Graph Analytics. In the International Symposium on Computer Architecture (ISCA) , 2018 . Sang-Woo Jun, Andy Wright, Sizhuo Zhang, Shuotao Xu, and Arvind. GraFboost: Using Accelerated Flash Storage for External Graph Analytics. In the International Symposium on Computer Architecture (ISCA), 2018."},{"key":"e_1_3_2_1_11_1","volume-title":"Nader Bagherzadeh. GraFboost: Using Accelerated Flash Storage for External Graph Analytics. In the Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)","author":"Torabzadehkashi Mahdi","year":"2019","unstructured":"Mahdi Torabzadehkashi , Siavash Rezaei , Ali Heydarigorji , Hosein Bobarshad , Vladimir Alves , and Nader Bagherzadeh. GraFboost: Using Accelerated Flash Storage for External Graph Analytics. In the Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP) , 2019 . Mahdi Torabzadehkashi, Siavash Rezaei, Ali Heydarigorji, Hosein Bobarshad, Vladimir Alves, and Nader Bagherzadeh. GraFboost: Using Accelerated Flash Storage for External Graph Analytics. In the Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2019."},{"key":"e_1_3_2_1_12_1","volume-title":"the IEEE International Solid-State Circuits Conference (ISSCC)","author":"Park Jae-Woo","year":"2021","unstructured":"Jae-Woo Park , Doogon Kim , Sunghwa Ok , Jaebeom Park , Taeheui Kwon , Hyunsoo Lee , A 176-Stacked 512Gb 3b\/Cell 3D-NAND Flash with 10.8Gb\/mm2 Density with a Peripheral Circuit Under Cell Array Architecture . In the IEEE International Solid-State Circuits Conference (ISSCC) , 2021 . Jae-Woo Park, Doogon Kim, Sunghwa Ok, Jaebeom Park, Taeheui Kwon, Hyunsoo Lee, et al. 30.1 A 176-Stacked 512Gb 3b\/Cell 3D-NAND Flash with 10.8Gb\/mm2 Density with a Peripheral Circuit Under Cell Array Architecture. In the IEEE International Solid-State Circuits Conference (ISSCC), 2021."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/CNS.2016.7860492"},{"key":"e_1_3_2_1_14_1","volume-title":"Sang-Woo Jun. MithriLog: Near-Storage Accelerator for High-Performance Log Analytics. In the IEEE\/ACM International Symposium on Microarchitecture (MICRO)","author":"Kang Seongyoung","year":"2021","unstructured":"Seongyoung Kang , Jiyoung An , Jinpyo Kim , and Sang-Woo Jun. MithriLog: Near-Storage Accelerator for High-Performance Log Analytics. In the IEEE\/ACM International Symposium on Microarchitecture (MICRO) , 2021 . Seongyoung Kang, Jiyoung An, Jinpyo Kim, and Sang-Woo Jun. MithriLog: Near-Storage Accelerator for High-Performance Log Analytics. In the IEEE\/ACM International Symposium on Microarchitecture (MICRO), 2021."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001154"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2013.6558444"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541959"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2815400.2815410"},{"key":"e_1_3_2_1_19_1","volume-title":"the USENIX Symposium on Operating Systems Design and Implementation (OSDI)","author":"Iyer Anand Padmanabha","year":"2018","unstructured":"Anand Padmanabha Iyer , Zaoxing Liu , Xin Jin , Shivaram Venkataraman , : Fast, approximate graph pattern mining at scale . In the USENIX Symposium on Operating Systems Design and Implementation (OSDI) , 2018 . Anand Padmanabha Iyer, Zaoxing Liu, Xin Jin, Shivaram Venkataraman, et al. ASAP: Fast, approximate graph pattern mining at scale. In the USENIX Symposium on Operating Systems Design and Implementation (OSDI), 2018."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2633581"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2016.33"},{"key":"e_1_3_2_1_22_1","volume-title":"the Technology Conference on Performance Evaluation and Benchmarking (TPCTC)","author":"Boncz Peter","year":"2013","unstructured":"Peter Boncz , Thomas Neumann , and Orri Erling . TPC-H analyzed : Hidden messages and lessons learned from an influential benchmark . In the Technology Conference on Performance Evaluation and Benchmarking (TPCTC) , 2013 . Peter Boncz, Thomas Neumann, and Orri Erling. TPC-H analyzed: Hidden messages and lessons learned from an influential benchmark. In the Technology Conference on Performance Evaluation and Benchmarking (TPCTC), 2013."},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.5"},{"key":"e_1_3_2_1_24_1","volume-title":"http:\/\/www.onfi.org\/","author":"Flash Interface ONFI.","year":"2017","unstructured":"ONFI. Open NAND Flash Interface Specification 4.1. http:\/\/www.onfi.org\/ , 2017 . ONFI. Open NAND Flash Interface Specification 4.1. http:\/\/www.onfi.org\/, 2017."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3326334"},{"key":"e_1_3_2_1_26_1","volume-title":"the IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","author":"Guthaus Matthew R.","year":"2016","unstructured":"Matthew R. Guthaus , James E. Stine , Samira Ataei , Brian Chen , : An open-source memory compiler . In the IEEE\/ACM International Conference on Computer-Aided Design (ICCAD) , 2016 . Matthew R. Guthaus, James E. Stine, Samira Ataei, Brian Chen, et al. OpenRAM: An open-source memory compiler. In the IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2016."},{"key":"e_1_3_2_1_27_1","volume-title":"Tae Seung Shin, and Sung Lae Oh. Memory device including page buffer and method of arranging page buffer having cache latches","author":"Chun Ki Chang","year":"2018","unstructured":"Ki Chang Chun , Hee Joung Park , Tae Seung Shin, and Sung Lae Oh. Memory device including page buffer and method of arranging page buffer having cache latches , 2018 . US Patent 9,965,388. Ki Chang Chun, Hee Joung Park, Tae Seung Shin, and Sung Lae Oh. Memory device including page buffer and method of arranging page buffer having cache latches, 2018. US Patent 9,965,388."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/3385073"},{"key":"e_1_3_2_1_29_1","volume-title":"Interface. In the IEEE International Solid-State Circuits Conference (ISSCC)","author":"Kang Dongku","year":"2019","unstructured":"Dongku Kang , Minsu Kim , Su Chang Jeon , Wontaeck Jung , A 512Gb 3-bit\/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB\/s Write Throughput and 1.2Gb\/s Interface. In the IEEE International Solid-State Circuits Conference (ISSCC) , 2019 . Dongku Kang, Minsu Kim, Su Chang Jeon, Wontaeck Jung, et al. 13.4 A 512Gb 3-bit\/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB\/s Write Throughput and 1.2Gb\/s Interface. In the IEEE International Solid-State Circuits Conference (ISSCC), 2019."},{"key":"e_1_3_2_1_30_1","unstructured":"Micron NAND System Power Calculator. https:\/\/www.micron.com\/support\/tools-and-utilities\/nand-system-power-calculator.  Micron NAND System Power Calculator. https:\/\/www.micron.com\/support\/tools-and-utilities\/nand-system-power-calculator."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480078"}],"event":{"name":"HotStorage '22: 14th ACM Workshop on Hot Topics in Storage and File Systems","location":"Virtual Event","acronym":"HotStorage '22","sponsor":["SIGOPS ACM Special Interest Group on Operating Systems","USENIX Assoc USENIX Assoc"]},"container-title":["Proceedings of the 14th ACM Workshop on Hot Topics in Storage and File Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3538643.3539742","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3538643.3539742","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:03:02Z","timestamp":1750186982000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3538643.3539742"}},"subtitle":["in-flash acceleration for data-intensive applications"],"short-title":[],"issued":{"date-parts":[[2022,6,27]]},"references-count":31,"alternative-id":["10.1145\/3538643.3539742","10.1145\/3538643"],"URL":"https:\/\/doi.org\/10.1145\/3538643.3539742","relation":{},"subject":[],"published":{"date-parts":[[2022,6,27]]},"assertion":[{"value":"2022-06-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}