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Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2023,1,31]]},"abstract":"<jats:p>Traditional CMOS-based von-Neumann computer architecture faces the issue of memory wall that the limitation of bus-bandwidth and the speed mismatch between processor and memory restrict the efficiency of data processing along with an irreducible energy consumption conducted by data movement, especially in some data-intensive applications. Recently, some novel in-memory computing (IMC) paradigms developed by utilizing the characteristics of different non-volatile memories provide promising ways to overcome the bottleneck of memory wall. Here, we propose a new IMC unit based on a memory array with the core element of magnetoelectric spin-orbit logic (MESO) device (AIMCU-MESO), in which the characteristics of the MESO device are exploited to achieve several in-memory logic operations with the functions of NAND, NOR, and XOR in the MESO-based memory array. With the aid of some transistor-based switches, these logic operations can be achieved between any two MESOs in the array. Furthermore, the computing process of a 1-bit full adder (FA) is achieved in AIMCU-MESO by the in-memory logic manner to demonstrate the ability of logic cascading. The result of SPICE simulation for achieving the 1-bit FA using MESO devices is demonstrated, and the performances are compared with other designs of spintronics-based devices. Compared to multilevel voltage-controlled spin-orbit torque\u2013based magnetic memory, the proposed design demonstrates 71.4% and 49.2% reductions in terms of storage delay and logic delay, respectively.<\/jats:p>","DOI":"10.1145\/3539575","type":"journal-article","created":{"date-parts":[[2022,5,26]],"date-time":"2022-05-26T15:09:18Z","timestamp":1653577758000},"page":"1-16","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["AIMCU-MESO: An In-Memory Computing Unit Constructed by MESO Device"],"prefix":"10.1145","volume":"28","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9456-1583","authenticated-orcid":false,"given":"Junwei","family":"Zeng","sequence":"first","affiliation":[{"name":"Institute for Quantum Information &amp; State Key Laboratory of High Performance Computing, College of Computer, National University of Defense Technology, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1224-7345","authenticated-orcid":false,"given":"Nuo","family":"Xu","sequence":"additional","affiliation":[{"name":"College of Computer, National University of Defense Technology and Wuhan National Laboratory for Optoelectronics, Wuhan, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2751-0118","authenticated-orcid":false,"given":"Yabo","family":"Chen","sequence":"additional","affiliation":[{"name":"Institute for Quantum Information &amp; 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