{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:16:15Z","timestamp":1750220175456,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":0,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,2,12]],"date-time":"2023-02-12T00:00:00Z","timestamp":1676160000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Micron Foundation"},{"name":"JST FOREST Program","award":["JPMJFR216P"],"award-info":[{"award-number":["JPMJFR216P"]}]},{"name":"JST AIP Acceleration Research","award":["JPMJCR20U2"],"award-info":[{"award-number":["JPMJCR20U2"]}]},{"name":"JSPS KAKENHI","award":["JP20H00590"],"award-info":[{"award-number":["JP20H00590"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,2,12]]},"DOI":"10.1145\/3543622.3573167","type":"proceedings-article","created":{"date-parts":[[2023,2,10]],"date-time":"2023-02-10T23:15:13Z","timestamp":1676070913000},"page":"52-52","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Power Side-channel Countermeasures for ARX Ciphers using High-level Synthesis"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4727-3906","authenticated-orcid":false,"given":"Saya","family":"Inagaki","sequence":"first","affiliation":[{"name":"Tokyo Institute of Technology, Tokyo, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3722-7009","authenticated-orcid":false,"given":"Mingyu","family":"Yang","sequence":"additional","affiliation":[{"name":"Tokyo Institute of Technology, Tokyo, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0219-5289","authenticated-orcid":false,"given":"Yang","family":"Li","sequence":"additional","affiliation":[{"name":"The University of Electro-Communications, Tokyo, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4414-815X","authenticated-orcid":false,"given":"Kazuo","family":"Sakiyama","sequence":"additional","affiliation":[{"name":"The University of Electro-Communications, Tokyo, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9486-5272","authenticated-orcid":false,"given":"Yuko","family":"Hara-Azumi","sequence":"additional","affiliation":[{"name":"Tokyo Institute of Technology, Tokyo, Japan"}]}],"member":"320","published-online":{"date-parts":[[2023,2,12]]},"event":{"name":"FPGA '23: The 2023 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey CA USA","acronym":"FPGA '23"},"container-title":["Proceedings of the 2023 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3543622.3573167","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T19:00:48Z","timestamp":1750186848000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3543622.3573167"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,2,12]]},"references-count":0,"alternative-id":["10.1145\/3543622.3573167","10.1145\/3543622"],"URL":"https:\/\/doi.org\/10.1145\/3543622.3573167","relation":{},"subject":[],"published":{"date-parts":[[2023,2,12]]},"assertion":[{"value":"2023-02-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}