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Syst."],"published-print":{"date-parts":[[2023,3,31]]},"abstract":"<jats:p>Innovative processor architectures aim to play a critical role in future sustainment of performance improvements under severe limitations imposed by the end of Moore\u2019s Law. The Reconfigurable Optical Computer (ROC) is one such innovative, Post-Moore\u2019s Law processor. ROC is designed to solve partial differential equations in one shot as opposed to existing solutions, which are based on costly iterative computations. This is achieved by leveraging physical properties of a mesh of optical components that behave analogously to lumped electrical components. However, virtualization is required to combat shortfalls of the accelerator hardware. Namely, (1) the infeasibility of building large photonic arrays to accommodate arbitrarily large problems and (2) underutilization brought about by mismatches in problem and accelerator mesh sizes due to future advances in manufacturing technology. In this work, we introduce an architecture and methodology for lightweight virtualization of ROC that exploits advantages borne from optical computing technology. Specifically, we apply temporal and spatial virtualization to ROC and then extend the accelerator scheduling tradespace with the introduction of spectral virtualization. Additionally, we investigate multiple resource scheduling strategies for a system-on-chip (SoC)-based PDE acceleration architecture and show that virtual configuration management offers a speedup of approximately 2\u00d7. Finally, we show that overhead from virtualization is minimal, and our experimental results show two orders of magnitude increased speed as compared to microprocessor execution while keeping errors due to virtualization under 10%.<\/jats:p>","DOI":"10.1145\/3544971","type":"journal-article","created":{"date-parts":[[2022,6,22]],"date-time":"2022-06-22T13:25:25Z","timestamp":1655904325000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["Virtualizing a Post-Moore\u2019s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator"],"prefix":"10.1145","volume":"22","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6210-1056","authenticated-orcid":false,"given":"Jeff","family":"Anderson","sequence":"first","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4966-3812","authenticated-orcid":false,"given":"Engin","family":"Kayraklioglu","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8938-3284","authenticated-orcid":false,"given":"Hamid","family":"Reza Imani","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1081-0405","authenticated-orcid":false,"given":"Chen","family":"Shen","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5953-8452","authenticated-orcid":false,"given":"Mario","family":"Miscuglio","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5152-4766","authenticated-orcid":false,"given":"Volker J.","family":"Sorger","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9687-7939","authenticated-orcid":false,"given":"Tarek","family":"El-Ghazawi","sequence":"additional","affiliation":[{"name":"The George Washington University, Washington, D.C., USA"}]}],"member":"320","published-online":{"date-parts":[[2023,1,24]]},"reference":[{"key":"e_1_3_2_2_2","unstructured":"Anant Agarwal and Jeffrey Lang. 2007. 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