{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,2]],"date-time":"2025-07-02T12:47:52Z","timestamp":1751460472068,"version":"3.41.0"},"reference-count":89,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2022,10,7]],"date-time":"2022-10-07T00:00:00Z","timestamp":1665100800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2022,12,31]]},"abstract":"<jats:p>\n            Dynamic graph traversals (DGTs) currently are widely used in many important application domains, especially in this big-data era that urgently demands high-performance graph processing and analysis. Unlike static graph traversals, DGTs in real-world application scenarios require not only fast traversal acceleration itself but also, more importantly, a runtime strategy that can effectively accommodate the\n            <jats:italic>ever-evolving nature of the graph structure updates followed by a diverse range of graph traversal algorithms<\/jats:italic>\n            . Because of these special features, state-of-the-art designs on conventional compute-centric architectures (e.g., CPU and GPU) struggle to provide sufficient acceleration for DGT processing due to the dominating irregular memory access patterns in graph traversal algorithms and inefficient platform-specific update mechanisms. In this article, we explore the algorithmic features and runtime requirements of real-world DGTs and identify their unique opportunities of acceleration on the recent Micron Automata Processor (AP), an in-situ memory-centric pattern-matching architecture. These features include the natural mapping between traversal algorithms\u2019 path exploration pattern to classic non-deterministic finite automata processing, AP\u2019s architectural and compilation support for DGTs\u2019 evolving traversal operations, and its inherent hardware fitness. However, despite these benefits, enabling highly efficient DGT execution on AP is non-trivial and faces several major challenges. To tackle them, we propose\n            <jats:italic>DynamAP<\/jats:italic>\n            , the first AP framework design that enables fast processing for general DGTs. DynamAP is oblivious to periodical traversal algorithm changes and can address the significant overhead caused by frequent graph updates and AP recompilation through our novel hybrid macro designs and associated efficient updating strategies. We evaluate DynamAP against the current DGT designs on a CPU, GPU, and AP with a range of widely adopted DGT algorithms and real-world graphs.\n            <jats:italic>For a single update request<\/jats:italic>\n            , our DynamAP achieves an average speedup of\n            <jats:italic>21.3x<\/jats:italic>\n            (up to\n            <jats:italic>39.2x<\/jats:italic>\n            ) over the state-of-the-art implementation on host-AP architecture; an average speedup of\n            <jats:italic>9.2x<\/jats:italic>\n            (up to\n            <jats:italic>14.7x<\/jats:italic>\n            ) and\n            <jats:italic>1.7x<\/jats:italic>\n            (up to\n            <jats:italic>2.8x<\/jats:italic>\n            ) over two highly optimized DGT design frameworks on a 64-GB Intel(R) Xeon CPU and a 32-GB NVIDIA Tesla V100 GPU. DynamAP also maintains high performance and resource utilization for high graph update ratios, and can significantly benefit natural graphs that present a high average vertex degree.\n          <\/jats:p>","DOI":"10.1145\/3556976","type":"journal-article","created":{"date-parts":[[2022,8,13]],"date-time":"2022-08-13T10:55:44Z","timestamp":1660388144000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["DynamAP: Architectural Support for Dynamic Graph Traversal on the Automata Processor"],"prefix":"10.1145","volume":"19","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1520-1441","authenticated-orcid":false,"given":"Yiding","family":"Liu","sequence":"first","affiliation":[{"name":"University of Houston, Houston, Texas, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8874-9520","authenticated-orcid":false,"given":"Xingyao","family":"Zhang","sequence":"additional","affiliation":[{"name":"University of Houston, Houston, Texas, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3355-407X","authenticated-orcid":false,"given":"Donglin","family":"Zhuang","sequence":"additional","affiliation":[{"name":"The University of Sydney, NSW, Australia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9458-4769","authenticated-orcid":false,"given":"Xin","family":"Fu","sequence":"additional","affiliation":[{"name":"University of Houston, Houston, Texas, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8402-1436","authenticated-orcid":false,"given":"Shuaiwen","family":"Song","sequence":"additional","affiliation":[{"name":"The University of Sydney, NSW, Australia"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2022,10,7]]},"reference":[{"key":"e_1_3_1_2_2","unstructured":"https:\/\/www.darpa.mil\/program\/hierarchical-identify-verify-exploit Hierarchical Identify Verify Exploit (HIVE)"},{"key":"e_1_3_1_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/BDCloud.2018.00148"},{"key":"e_1_3_1_4_2","doi-asserted-by":"publisher","DOI":"10.1093\/bib\/bbl022"},{"key":"e_1_3_1_5_2","doi-asserted-by":"crossref","first-page":"373","DOI":"10.1109\/HPCA.2019.00051","volume-title":"2019 IEEE International Symposium on High Performance Computer Architecture (HPCA\u201919)","author":"Basak Abanti","year":"2019","unstructured":"Abanti Basak, Shuangchen Li, Xing Hu, Sang Min Oh, Xinfeng Xie, Li Zhao, Xiaowei Jiang, and Yuan Xie. 2019. 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