{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,11]],"date-time":"2026-01-11T01:47:48Z","timestamp":1768096068275,"version":"3.49.0"},"reference-count":32,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2023,7,31]],"date-time":"2023-07-31T00:00:00Z","timestamp":1690761600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"ACHILLES","award":["PID2019-104207RB-I00"],"award-info":[{"award-number":["PID2019-104207RB-I00"]}]},{"name":"Go2Edge network","award":["RED2018-102585-T"],"award-info":[{"award-number":["RED2018-102585-T"]}]},{"DOI":"10.13039\/501100011033","name":"Spanish Agencia Estatal de Investigaci\u00f3n","doi-asserted-by":"crossref","award":["10.13039\/501100011033"],"award-info":[{"award-number":["10.13039\/501100011033"]}],"id":[{"id":"10.13039\/501100011033","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2023,7,31]]},"abstract":"<jats:p>Domain-specific accelerators for signal processing, image processing, and machine learning are increasingly being implemented on SRAM-based field-programmable gate arrays (FPGAs). Owing to the inherent error tolerance of such applications, approximate arithmetic operations, in particular, the design of approximate multipliers, have become an important research problem. Truncation of lower bits is a widely used approximation approach; however, analyzing and limiting the effects of carry-propagation due to this approximation has not been explored in detail yet. In this article, an optimized carry-aware approximate radix-4 Booth multiplier design is presented that leverages the built-in slice look-up tables (LUTs) and carry-chain resources in a novel configuration. The proposed multiplier simplifies the computation of the upper and lower bits and provides significant benefits in terms of FPGA resource usage (LUTs saving 38.5%\u201342.9%), Power Delay Product (PDP saving 49.4%\u201353%), performance metric (LUTs \u00d7 critical path delay (CPD) \u00d7 PDP saving 68.9%\u201373.1%) and errors (70% improvement in mean relative error distance) compared to the latest state-of-the-art designs. Therefore, the proposed designs are an attractive choice to implement multiplication on FPGA-based accelerators.<\/jats:p>","DOI":"10.1145\/3564243","type":"journal-article","created":{"date-parts":[[2022,9,21]],"date-time":"2022-09-21T11:56:26Z","timestamp":1663761386000},"page":"1-19","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs"],"prefix":"10.1145","volume":"22","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7348-6548","authenticated-orcid":false,"given":"Muhammad","family":"Awais","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, COMSATS University Islamabad, Pakistan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4657-4475","authenticated-orcid":false,"given":"Ali","family":"Zahir","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, COMSATS University Islamabad, Pakistan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3242-8066","authenticated-orcid":false,"given":"Syed Ayaz Ali","family":"Shah","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, COMSATS University Islamabad, Pakistan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2540-5234","authenticated-orcid":false,"given":"Pedro","family":"Reviriego","sequence":"additional","affiliation":[{"name":"Department of Telematic Systems Engineering, Universidad Polit\u00e9cnica of Madrid, Madrid, Spain"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4770-4967","authenticated-orcid":false,"given":"Anees","family":"Ullah","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering, University of Engineering and Technology, Peshawar, Pakistan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7208-6374","authenticated-orcid":false,"given":"Nasim","family":"Ullah","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, College of Engineering, Taif University KSA, Saudi Arabia"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6490-8809","authenticated-orcid":false,"given":"Adam","family":"Khan","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering, University of Engineering and Technology, Peshawar, Pakistan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3058-5794","authenticated-orcid":false,"given":"Hazrat","family":"Ali","sequence":"additional","affiliation":[{"name":"College of Science and Engineering, Hamad Bin Khalifa University, Doha, Qatar"}]}],"member":"320","published-online":{"date-parts":[[2023,8,3]]},"reference":[{"key":"e_1_3_2_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.2975695"},{"key":"e_1_3_2_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2856245"},{"issue":"4","key":"e_1_3_2_4_2","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/2893356","article-title":"A survey of techniques for approximate computing","volume":"48","author":"Mittal Sparsh","year":"2016","unstructured":"Sparsh Mittal. 2016. A survey of techniques for approximate computing. ACM Comput. Surveys 48, 4 (2016), 1\u201333.","journal-title":"ACM Comput. Surveys"},{"key":"e_1_3_2_5_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2885044"},{"key":"e_1_3_2_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2988404"},{"key":"e_1_3_2_7_2","first-page":"1","volume-title":"Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE\u201914)","author":"Liu Cong","year":"2014","unstructured":"Cong Liu, Jie Han, and Fabrizio Lombardi. 2014. A low-power, high-performance approximate multiplier with configurable partial error recovery. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE\u201914). IEEE, 1\u20134."},{"key":"e_1_3_2_8_2","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7926950"},{"key":"e_1_3_2_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.22"},{"key":"e_1_3_2_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2672976"},{"key":"e_1_3_2_11_2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657022"},{"key":"e_1_3_2_12_2","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967005"},{"key":"e_1_3_2_13_2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2011.51"},{"key":"e_1_3_2_14_2","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3195996"},{"key":"e_1_3_2_15_2","first-page":"258","volume-title":"Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE\u201917)","author":"Mrazek Vojtech","year":"2017","unstructured":"Vojtech Mrazek, Radek Hrbacek, Zdenek Vasicek, and Lukas Sekanina. 2017. EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE\u201917). IEEE, 258\u2013261."},{"key":"e_1_3_2_16_2","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3196115"},{"key":"e_1_3_2_17_2","unstructured":"Xilinx. 2020. Vivado design suite user guide. Retrieved from https:\/\/www.xilinx.com\/content\/dam\/xilinx\/support\/documentation\/sw_manuals\/xilinx2020_1\/ug973-vivado-release-notes-install-license.pdf."},{"key":"e_1_3_2_18_2","doi-asserted-by":"publisher","DOI":"10.1201\/9781315275567"},{"key":"e_1_3_2_19_2","volume-title":"Computer Arithmetic","author":"Parhami Behrooz","year":"2010","unstructured":"Behrooz Parhami. 2010. Computer Arithmetic. Vol. 20. Oxford University Press, Oxford, UK."},{"key":"e_1_3_2_20_2","first-page":"349","article-title":"Some schemes for parallel multipliers","volume":"34","author":"Dadda Luigi","year":"1965","unstructured":"Luigi Dadda. 1965. Some schemes for parallel multipliers. Alta Frequenza 34 (1965), 349\u2013356.","journal-title":"Alta Frequenza"},{"key":"e_1_3_2_21_2","doi-asserted-by":"publisher","DOI":"10.3390\/computers5040020"},{"key":"e_1_3_2_22_2","unstructured":"Xilinx. 2018. 7 Series FPGAs configuration user guide; UG470. Retrieved from https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug470_7Series_Config.pdf."},{"key":"e_1_3_2_23_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3065333"},{"key":"e_1_3_2_24_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3056337"},{"key":"e_1_3_2_25_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2988353"},{"key":"e_1_3_2_26_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2918241"},{"key":"e_1_3_2_27_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2019.152859"},{"key":"e_1_3_2_28_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.2975094"},{"key":"e_1_3_2_29_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2926275"},{"key":"e_1_3_2_30_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2493547"},{"key":"e_1_3_2_31_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2992113"},{"key":"e_1_3_2_32_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3069168"},{"key":"e_1_3_2_33_2","doi-asserted-by":"publisher","DOI":"10.3390\/electronics10101175"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3564243","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3564243","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:10:33Z","timestamp":1750295433000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3564243"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,31]]},"references-count":32,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2023,7,31]]}},"alternative-id":["10.1145\/3564243"],"URL":"https:\/\/doi.org\/10.1145\/3564243","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"value":"1539-9087","type":"print"},{"value":"1558-3465","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,7,31]]},"assertion":[{"value":"2022-04-11","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2022-09-09","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2023-08-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}