{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:13:48Z","timestamp":1750220028128,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":14,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,3,26]],"date-time":"2023-03-26T00:00:00Z","timestamp":1679788800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,3,26]]},"DOI":"10.1145\/3569052.3578905","type":"proceedings-article","created":{"date-parts":[[2023,3,22]],"date-time":"2023-03-22T17:51:55Z","timestamp":1679507515000},"page":"208-209","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["A Case for Open EDA Verticals"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0778-0308","authenticated-orcid":false,"given":"Zhiru","family":"Zhang","sequence":"first","affiliation":[{"name":"Cornell University, Ithaca, NY, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4204-6675","authenticated-orcid":false,"given":"Matthew","family":"Hofmann","sequence":"additional","affiliation":[{"name":"Cornell University, Ithaca, NY, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6528-4281","authenticated-orcid":false,"given":"Andrew","family":"Butt","sequence":"additional","affiliation":[{"name":"Cornell University, Ithaca, NY, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2023,3,26]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Design Automation Conference (DAC)","author":"Ajayi T.","year":"2019","unstructured":"T. Ajayi, V. Chhabria, M. Foga\u00e7a, S. Hashemi, A. Hosny, A. Kahng, M. Kim, J. Lee, U. Mallappa, M. Neseem, G. Pradipta, S. Reda, M. Saligane, S. Sapatnekar, C. Sechen, M. Shalan, W. Swartz, L. Wang, Z. Wang, M. Woo, and B. Xu. 2019. Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project. Design Automation Conference (DAC) (2019)."},{"key":"e_1_3_2_1_2_1","volume-title":"Retrieved","author":"CIRCT","year":"2020","unstructured":"CIRCT 2020. CIRCT Charter. Retrieved January 28, 2023 from https:\/\/circt.llvm. org\/docs\/Charter\/"},{"key":"e_1_3_2_1_3_1","volume":"202","author":"Guo L.","unstructured":"L. Guo, Y. Chi, J. Wang, J Lau, W. Qiao, E. Ustun, Z. Zhang, and J. Cong. 2021. \"AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs\". Int'l Symp. on Field-Programmable Gate Arrays (FPGA) (2021).","journal-title":"J. Cong."},{"key":"e_1_3_2_1_4_1","volume":"202","author":"Guo L.","unstructured":"L. Guo, P. Maidee, Y. Zhou, C. Lavin, J. Wang, Y. Chi, W. Qiao, A. Kaviani, Z. Zhang, and J. Cong. 2022. \"RapidStream: Parallel Physical Implementation of FPGA HLS Designs\". Int'l Symp. on Field-Programmable Gate Arrays (FPGA) (2022).","journal-title":"J. Cong."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.48550\/ARXIV.2005.02506"},{"volume-title":"Retrieved","year":"2006","key":"e_1_3_2_1_6_1","unstructured":"KLayout 2006. KLayout. Retrieved January 28, 2023 from https:\/\/www.klayout.de"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","unstructured":"Y. Lai Y. Chi Y. Hu J. Wang C. Yu Y. Zhou J. Cong and Z. Zhang. 2019. \"HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing\". Int'l Symp. on Field-Programmable Gate Arrays (FPGA) (2019).","DOI":"10.1145\/3289602.3293910"},{"key":"e_1_3_2_1_8_1","volume-title":"LLVM: A compilation framework for lifelong program analysis and transformation. Int'l Symp. on Code Generation and Optimization","author":"Lattner C.","year":"2004","unstructured":"C. Lattner and V. Adve. 2004. LLVM: A compilation framework for lifelong program analysis and transformation. Int'l Symp. on Code Generation and Optimization (2004)."},{"key":"e_1_3_2_1_9_1","unstructured":"C. Lattner J. A. Pienaar M. Amini U. Bondhugula R. Riddle A. Cohen T. Shpeisman A. Davis N. Vasilache and O. Zinenko. 2020. \"MLIR: A Compiler Infrastructure for the End of Moore's Law\". CoRR (2020). [arXiv]2002.11054"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"crossref","unstructured":"C. Lavin and A. Kaviani. 2018. \"RapidWright: Enabling Custom Crafted Implementations for FPGAs\". Int'l Symp. on Field-Programmable Custom Computing Machines (FCCM) (2018).","DOI":"10.1109\/FCCM.2018.00030"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","unstructured":"K. Murray M. Elgammal V. Betz T. Ansell K. Rothman and A. Comodi. 2020a. \"SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs\". IEEE Micro (2020).","DOI":"10.1109\/MM.2020.2998435"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"crossref","unstructured":"K. E. Murray O. Petelin S. Zhong J. M. Wang M. ElDafrawy J.-P. Legault E. Sha A. G. Graham J. Wu M. J. P. Walker H. Zeng P. Patros J. Luu K. B. Kent and V. Betz. 2020b. \"VTR 8: High Performance CAD and Customizable FPGA Architecture Modelling\". ACM Transactions on Reconfigurable Technology and Systems (TRETS) (2020).","DOI":"10.1145\/3388617"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","unstructured":"R. Nigam S. Thomas Z. Li and A. Sampson. 2021. \"A Compiler Infrastructure for Accelerator Generators\". Int'l Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (2021).","DOI":"10.1145\/3445814.3446712"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"crossref","unstructured":"D. Shah E. Hung C. Wolf S. Bazanski D. Gisselquist and M. Milanovic. 2019. \"Yosysnextpnr: An Open Source Framework from Verilog to Bitstream for Commercial FPGAs\". Int'l Symp. on Field-Programmable Custom Computing Machines (FCCM) (2019).","DOI":"10.1109\/FCCM.2019.00010"}],"event":{"name":"ISPD '23: International Symposium on Physical Design","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Virtual Event USA","acronym":"ISPD '23"},"container-title":["Proceedings of the 2023 International Symposium on Physical Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3569052.3578905","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3569052.3578905","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T17:51:41Z","timestamp":1750182701000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3569052.3578905"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,3,26]]},"references-count":14,"alternative-id":["10.1145\/3569052.3578905","10.1145\/3569052"],"URL":"https:\/\/doi.org\/10.1145\/3569052.3578905","relation":{},"subject":[],"published":{"date-parts":[[2023,3,26]]},"assertion":[{"value":"2023-03-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}