{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:13:10Z","timestamp":1750219990961,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2022,10,21]],"date-time":"2022-10-21T00:00:00Z","timestamp":1666310400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,10,21]]},"DOI":"10.1145\/3573428.3573648","type":"proceedings-article","created":{"date-parts":[[2023,3,15]],"date-time":"2023-03-15T10:43:09Z","timestamp":1678876989000},"page":"1241-1246","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Implementation and Debugging Method of a High-end Controller Chip Safety Debugging System"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-9910-3242","authenticated-orcid":false,"given":"Yanxin","family":"Zhang","sequence":"first","affiliation":[{"name":"Beijing Smart-Chip Microelectronics Technology Co., Ltd., China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6822-4068","authenticated-orcid":false,"given":"Longlong","family":"He","sequence":"additional","affiliation":[{"name":"Beijing Smart-Chip Microelectronics Technology Co., Ltd., China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7436-2977","authenticated-orcid":false,"given":"Zhenhai","family":"Ning","sequence":"additional","affiliation":[{"name":"Beijing Smart-Chip Microelectronics Technology Co., Ltd., China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4930-3219","authenticated-orcid":false,"given":"Jinwang","family":"Li","sequence":"additional","affiliation":[{"name":"Beijing Smart-Chip Microelectronics Technology Co., Ltd., China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6265-0306","authenticated-orcid":false,"given":"Lang","family":"Tan","sequence":"additional","affiliation":[{"name":"Beijing Smart-Chip Microelectronics Technology Co., Ltd., China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7500-567X","authenticated-orcid":false,"given":"Lixin","family":"Yang","sequence":"additional","affiliation":[{"name":"Beijing Smart-Chip Microelectronics Technology Co., Ltd., China"}]}],"member":"320","published-online":{"date-parts":[[2023,3,15]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"The Institute of Electrical and Electronics Engineers Inc. IEEE Standard Test Access Port and Boundary-Scan Architecture 2001."},{"key":"e_1_3_2_1_2_1","volume-title":"ARM Debug Interface v5 Architecture Specification","author":"Ltd ARM","year":"2006","unstructured":"ARM Ltd. ARM Debug Interface v5 Architecture Specification, 2006."},{"key":"e_1_3_2_1_3_1","volume-title":"ARM Debug Interface Architecture Specification ADIv6.0","author":"Ltd ARM","year":"2020","unstructured":"ARM Ltd. ARM Debug Interface Architecture Specification ADIv6.0, 2020."},{"key":"e_1_3_2_1_4_1","volume-title":"General Commands Reference Guide - TRACE32 CMM","author":"BACH","year":"2021","unstructured":"LAUTERBACH GmbH, LAUTERBACH GmbH, General Commands Reference Guide - TRACE32 CMM, 2021."},{"key":"e_1_3_2_1_5_1","volume-title":"Training JTAG Interface \u2013 LAUTERBACH Development Tools","author":"BACH","year":"2021","unstructured":"LAUTERBACH GmbH, Training JTAG Interface \u2013 LAUTERBACH Development Tools, 2021."},{"key":"e_1_3_2_1_6_1","volume-title":"ARM DS Debugger Command Reference v2020.0","author":"Ltd ARM","year":"2020","unstructured":"ARM Ltd. ARM DS Debugger Command Reference v2020.0, 2020."},{"key":"e_1_3_2_1_7_1","volume-title":"ARM DS User Guide v2020.0","author":"Ltd ARM","year":"2020","unstructured":"ARM Ltd. ARM DS User Guide v2020.0, 2020."},{"key":"e_1_3_2_1_8_1","volume-title":"ARM DS5 version 5.29 ARM DSTREAM System and Interface Design Reference Guide","author":"Ltd ARM","year":"2018","unstructured":"ARM Ltd. ARM DS5 version 5.29 ARM DSTREAM System and Interface Design Reference Guide, 2018."},{"key":"e_1_3_2_1_9_1","volume-title":"JLINK commander help","author":"GGER","year":"2019","unstructured":"SEGGER MICROCONTROLLER. JLINK commander help, 2019."}],"event":{"name":"EITCE 2022: 2022 6th International Conference on Electronic Information Technology and Computer Engineering","acronym":"EITCE 2022","location":"Xiamen China"},"container-title":["Proceedings of the 2022 6th International Conference on Electronic Information Technology and Computer Engineering"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3573428.3573648","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3573428.3573648","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T17:49:33Z","timestamp":1750182573000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3573428.3573648"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,21]]},"references-count":9,"alternative-id":["10.1145\/3573428.3573648","10.1145\/3573428"],"URL":"https:\/\/doi.org\/10.1145\/3573428.3573648","relation":{},"subject":[],"published":{"date-parts":[[2022,10,21]]},"assertion":[{"value":"2023-03-15","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}