{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T04:28:52Z","timestamp":1781756932716,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":49,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,2,17]],"date-time":"2023-02-17T00:00:00Z","timestamp":1676592000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,2,17]]},"DOI":"10.1145\/3578360.3580254","type":"proceedings-article","created":{"date-parts":[[2023,2,17]],"date-time":"2023-02-17T20:20:06Z","timestamp":1676665206000},"page":"25-36","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["A Multi-threaded Fast Hardware Compiler for HDLs"],"prefix":"10.1145","author":[{"given":"Sheng-Hong","family":"Wang","sequence":"first","affiliation":[{"name":"University of California, Santa Cruz, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hunter James","family":"Coffman","sequence":"additional","affiliation":[{"name":"University of California, Santa Cruz, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kenneth","family":"Mayer","sequence":"additional","affiliation":[{"name":"University of California, Santa Cruz, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sakshi","family":"Garg","sequence":"additional","affiliation":[{"name":"University of California, Santa Cruz, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jose","family":"Renau","sequence":"additional","affiliation":[{"name":"University of California, Santa Cruz, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2023,2,17]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"d.]. Database and Tool Framework for EDA. https:\/\/github.com\/The-OpenROAD-Project\/OpenDB Online","year":"2020","unstructured":"[n. d.]. Database and Tool Framework for EDA. https:\/\/github.com\/The-OpenROAD-Project\/OpenDB Online ; accessed on 10 April 2020 . [n. d.]. Database and Tool Framework for EDA. https:\/\/github.com\/The-OpenROAD-Project\/OpenDB Online; accessed on 10 April 2020."},{"key":"e_1_3_2_1_2_1","volume-title":"d.]. Protocol Buffers - Google\u2019s data interchange format. https:\/\/github.com\/protocolbuffers\/protobuf Online","year":"2021","unstructured":"[n. d.]. Protocol Buffers - Google\u2019s data interchange format. https:\/\/github.com\/protocolbuffers\/protobuf Online ; accessed on 10 August 2021 . [n. d.]. Protocol Buffers - Google\u2019s data interchange format. https:\/\/github.com\/protocolbuffers\/protobuf Online; accessed on 10 August 2021."},{"key":"e_1_3_2_1_3_1","volume-title":"d.]. slang - SystemVerilog Language Services. https:\/\/github.com\/MikePopoloski\/slang Online","year":"2021","unstructured":"[n. d.]. slang - SystemVerilog Language Services. https:\/\/github.com\/MikePopoloski\/slang Online ; accessed on 5 August 2021 . [n. d.]. slang - SystemVerilog Language Services. https:\/\/github.com\/MikePopoloski\/slang Online; accessed on 5 August 2021."},{"key":"e_1_3_2_1_4_1","volume-title":"XLS: Accelerated HW Synthesis. https:\/\/github.com\/google\/xls Online","year":"2021","unstructured":"2021. XLS: Accelerated HW Synthesis. https:\/\/github.com\/google\/xls Online ; accessed on 9 August 2021 . 2021. XLS: Accelerated HW Synthesis. https:\/\/github.com\/google\/xls Online; accessed on 9 August 2021."},{"key":"e_1_3_2_1_5_1","volume-title":"CIRCT: Circuit IR Compilers and Tools. https:\/\/github.com\/llvm\/circt Online","year":"2022","unstructured":"2022. CIRCT: Circuit IR Compilers and Tools. https:\/\/github.com\/llvm\/circt Online ; accessed on 12 August 2022 . 2022. CIRCT: Circuit IR Compilers and Tools. https:\/\/github.com\/llvm\/circt Online; accessed on 12 August 2022."},{"key":"e_1_3_2_1_6_1","volume-title":"Guide to Rustc Development. https:\/\/rustc-dev-guide.rust-lang.org\/ Online","year":"2022","unstructured":"2022. Guide to Rustc Development. https:\/\/rustc-dev-guide.rust-lang.org\/ Online ; accessed on 12 August 2022 . 2022. Guide to Rustc Development. https:\/\/rustc-dev-guide.rust-lang.org\/ Online; accessed on 12 August 2022."},{"key":"e_1_3_2_1_7_1","volume-title":"Rapid Open Hardware Development (ROHD) Framework. https:\/\/github.com\/intel\/rohd Online","year":"2022","unstructured":"2022. Rapid Open Hardware Development (ROHD) Framework. https:\/\/github.com\/intel\/rohd Online ; accessed on 9 August 2022 . 2022. Rapid Open Hardware Development (ROHD) Framework. https:\/\/github.com\/intel\/rohd Online; accessed on 9 August 2022."},{"key":"e_1_3_2_1_8_1","volume-title":"DAC Design Automation Conference","author":"Bachrach Jonathan","year":"2012","unstructured":"Jonathan Bachrach , Huy Vo , Brian Richards , Yunsup Lee , Andrew Waterman , Rimas Avi\u017eienis , John Wawrzynek , and Krste Asanovi\u0107 . 2012 . Chisel: constructing hardware in a scala embedded language . In DAC Design Automation Conference 2012. 1212\u20131221. Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup Lee, Andrew Waterman, Rimas Avi\u017eienis, John Wawrzynek, and Krste Asanovi\u0107. 2012. Chisel: constructing hardware in a scala embedded language. In DAC Design Automation Conference 2012. 1212\u20131221."},{"key":"e_1_3_2_1_9_1","volume-title":"The Parallel GCC. https:\/\/gcc.gnu.org\/wiki\/ParallelGcc Online","author":"Belinassi Giuliano","year":"2021","unstructured":"Giuliano Belinassi . 2021. The Parallel GCC. https:\/\/gcc.gnu.org\/wiki\/ParallelGcc Online ; accessed on 28 July 2021 . Giuliano Belinassi. 2021. The Parallel GCC. https:\/\/gcc.gnu.org\/wiki\/ParallelGcc Online; accessed on 28 July 2021."},{"key":"e_1_3_2_1_10_1","volume-title":"Eduardo Martins Guerra, and Alfredo Goldman","author":"Bernardino Matheus Tavares","year":"2020","unstructured":"Matheus Tavares Bernardino , Giuliano Belinassi , Paulo Meirelles , Eduardo Martins Guerra, and Alfredo Goldman . 2020 . Improving Parallelism in Git and GCC: Strategies, Difficulties, and Lessons Learned. IEEE Software . Matheus Tavares Bernardino, Giuliano Belinassi, Paulo Meirelles, Eduardo Martins Guerra, and Alfredo Goldman. 2020. Improving Parallelism in Git and GCC: Strategies, Difficulties, and Lessons Learned. IEEE Software."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/2514740","article-title":"LegUp: An open-source high-level synthesis tool for FPGA-based processor\/accelerator systems","volume":"13","author":"Canis Andrew","year":"2013","unstructured":"Andrew Canis , Jongsok Choi , Mark Aldham , Victor Zhang , Ahmed Kammoona , Tomasz Czajkowski , Stephen D Brown , and Jason H Anderson . 2013 . LegUp: An open-source high-level synthesis tool for FPGA-based processor\/accelerator systems . ACM Transactions on Embedded Computing Systems (TECS) , 13 , 2 (2013), 1 \u2013 27 . Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Tomasz Czajkowski, Stephen D Brown, and Jason H Anderson. 2013. LegUp: An open-source high-level synthesis tool for FPGA-based processor\/accelerator systems. ACM Transactions on Embedded Computing Systems (TECS), 13, 2 (2013), 1\u201327.","journal-title":"ACM Transactions on Embedded Computing Systems (TECS)"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"crossref","first-page":"35","DOI":"10.1145\/202530.202534","article-title":"A simple graph-based intermediate representation","volume":"30","author":"Click Cliff","year":"1995","unstructured":"Cliff Click and Michael Paleczny . 1995 . A simple graph-based intermediate representation . ACM Sigplan Notices , 30 , 3 (1995), 35 \u2013 49 . Cliff Click and Michael Paleczny. 1995. A simple graph-based intermediate representation. ACM Sigplan Notices, 30, 3 (1995), 35\u201349.","journal-title":"ACM Sigplan Notices"},{"key":"e_1_3_2_1_13_1","volume-title":"Field Programmable Logic and Applications (FPL), 2017 27th International Conference on. 1\u20137.","author":"Clow John","year":"2017","unstructured":"John Clow , Georgios Tzimpragos , Deeksha Dangwal , Sammy Guo , Joseph McMahan , and Timothy Sherwood . 2017 . A pythonic approach for rapid hardware prototyping and instrumentation . In Field Programmable Logic and Applications (FPL), 2017 27th International Conference on. 1\u20137. John Clow, Georgios Tzimpragos, Deeksha Dangwal, Sammy Guo, Joseph McMahan, and Timothy Sherwood. 2017. A pythonic approach for rapid hardware prototyping and instrumentation. In Field Programmable Logic and Applications (FPL), 2017 27th International Conference on. 1\u20137."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"crossref","first-page":"451","DOI":"10.1145\/115372.115320","article-title":"Efficiently computing static single assignment form and the control dependence graph","volume":"13","author":"Cytron Ron","year":"1991","unstructured":"Ron Cytron , Jeanne Ferrante , Barry K Rosen , Mark N Wegman , and F Kenneth Zadeck . 1991 . Efficiently computing static single assignment form and the control dependence graph . ACM Transactions on Programming Languages and Systems (TOPLAS) , 13 , 4 (1991), 451 \u2013 490 . Ron Cytron, Jeanne Ferrante, Barry K Rosen, Mark N Wegman, and F Kenneth Zadeck. 1991. Efficiently computing static single assignment form and the control dependence graph. ACM Transactions on Programming Languages and Systems (TOPLAS), 13, 4 (1991), 451\u2013490.","journal-title":"ACM Transactions on Programming Languages and Systems (TOPLAS)"},{"key":"e_1_3_2_1_15_1","volume-title":"Perfetto: System profiling, app tracing and trace analysis. https:\/\/perfetto.dev\/ Online","author":"Developers Google","year":"2022","unstructured":"Google Developers . 2022 . Perfetto: System profiling, app tracing and trace analysis. https:\/\/perfetto.dev\/ Online ; accessed on 10 August 2022. Google Developers. 2022. Perfetto: System profiling, app tracing and trace analysis. https:\/\/perfetto.dev\/ Online; accessed on 10 August 2022."},{"key":"e_1_3_2_1_16_1","volume-title":"Proceedings of the 7th ACM workshop on Virtual machines and intermediate languages. 1\u201310","author":"Duboscq Gilles","year":"2013","unstructured":"Gilles Duboscq , Thomas W\u00fcrthinger , Lukas Stadler , Christian Wimmer , Doug Simon , and Hanspeter M\u00f6ssenb\u00f6ck . 2013 . An intermediate representation for speculative optimizations in a dynamic compiler . In Proceedings of the 7th ACM workshop on Virtual machines and intermediate languages. 1\u201310 . Gilles Duboscq, Thomas W\u00fcrthinger, Lukas Stadler, Christian Wimmer, Doug Simon, and Hanspeter M\u00f6ssenb\u00f6ck. 2013. An intermediate representation for speculative optimizations in a dynamic compiler. In Proceedings of the 7th ACM workshop on Virtual machines and intermediate languages. 1\u201310."},{"key":"e_1_3_2_1_17_1","volume-title":"Workshop on Open-Source EDA Technology (WOSET).","author":"Eldridge Schuyler","year":"2021","unstructured":"Schuyler Eldridge , Prithayan Barua , Aliaksei Chapyzhenka , Adam Izraelevitz , Jack Koenig , Chris Lattner , Andrew Lenharth , George Leontiev , Fabian Schuiki , and Ram Sunder . 2021 . MLIR as hardware compiler infrastructure . In Workshop on Open-Source EDA Technology (WOSET). Schuyler Eldridge, Prithayan Barua, Aliaksei Chapyzhenka, Adam Izraelevitz, Jack Koenig, Chris Lattner, Andrew Lenharth, George Leontiev, Fabian Schuiki, and Ram Sunder. 2021. MLIR as hardware compiler infrastructure. In Workshop on Open-Source EDA Technology (WOSET)."},{"key":"e_1_3_2_1_18_1","volume-title":"2016 IEEE International Symposium on Consumer Electronics (ISCE). 105\u2013106","author":"Fedrecheski Geovane","year":"2016","unstructured":"Geovane Fedrecheski , Laisa CP Costa , and Marcelo K Zuffo . 2016 . Elixir programming language evaluation for IoT . In 2016 IEEE International Symposium on Consumer Electronics (ISCE). 105\u2013106 . Geovane Fedrecheski, Laisa CP Costa, and Marcelo K Zuffo. 2016. Elixir programming language evaluation for IoT. In 2016 IEEE International Symposium on Consumer Electronics (ISCE). 105\u2013106."},{"key":"e_1_3_2_1_19_1","unstructured":"Taras Glek and Jan Hubicka. 2010. Optimizing real world applications with GCC link time optimization. arXiv preprint arXiv:1010.2196. \t\t\t\t  Taras Glek and Jan Hubicka. 2010. Optimizing real world applications with GCC link time optimization. arXiv preprint arXiv:1010.2196."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"crossref","first-page":"78","DOI":"10.1145\/2936313.2816714","article-title":"High-performance cross-language interoperability in a multi-language runtime","volume":"51","author":"Grimmer Matthias","year":"2015","unstructured":"Matthias Grimmer , Chris Seaton , Roland Schatz , Thomas W\u00fcrthinger , and Hanspeter M\u00f6ssenb\u00f6ck . 2015 . High-performance cross-language interoperability in a multi-language runtime . In ACM SIGPLAN Notices. 51 , 78 \u2013 90 . Matthias Grimmer, Chris Seaton, Roland Schatz, Thomas W\u00fcrthinger, and Hanspeter M\u00f6ssenb\u00f6ck. 2015. High-performance cross-language interoperability in a multi-language runtime. In ACM SIGPLAN Notices. 51, 78\u201390.","journal-title":"ACM SIGPLAN Notices."},{"key":"e_1_3_2_1_21_1","unstructured":"Michael T Heath. 1986. Hypercube Multiprocessors 1986. Siam. \t\t\t\t  Michael T Heath. 1986. Hypercube Multiprocessors 1986. Siam."},{"key":"e_1_3_2_1_22_1","volume-title":"Proceedings of the 36th International Conference on Computer-Aided Design. 209\u2013216","author":"Izraelevitz Adam","year":"2017","unstructured":"Adam Izraelevitz , Jack Koenig , Patrick Li , Richard Lin , Angie Wang , Albert Magyar , Donggyu Kim , Colin Schmidt , Chick Markley , and Jim Lawson . 2017 . Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations . In Proceedings of the 36th International Conference on Computer-Aided Design. 209\u2013216 . Adam Izraelevitz, Jack Koenig, Patrick Li, Richard Lin, Angie Wang, Albert Magyar, Donggyu Kim, Colin Schmidt, Chick Markley, and Jim Lawson. 2017. Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations. In Proceedings of the 36th International Conference on Computer-Aided Design. 209\u2013216."},{"key":"e_1_3_2_1_23_1","volume-title":"2018 55th ACM\/ESDA\/IEEE Design Automation Conference (DAC). 1\u20136.","author":"Jiang Shunning","year":"2018","unstructured":"Shunning Jiang , Berkin Ilbeyi , and Christopher Batten . 2018 . Mamba: closing the performance gap in productive hardware development frameworks . In 2018 55th ACM\/ESDA\/IEEE Design Automation Conference (DAC). 1\u20136. Shunning Jiang, Berkin Ilbeyi, and Christopher Batten. 2018. Mamba: closing the performance gap in productive hardware development frameworks. In 2018 55th ACM\/ESDA\/IEEE Design Automation Conference (DAC). 1\u20136."},{"key":"e_1_3_2_1_24_1","volume-title":"2017 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO). 111\u2013121","author":"Johnson Teresa","year":"2017","unstructured":"Teresa Johnson , Mehdi Amini , and Xinliang David Li . 2017 . ThinLTO: scalable and incremental LTO . In 2017 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO). 111\u2013121 . Teresa Johnson, Mehdi Amini, and Xinliang David Li. 2017. ThinLTO: scalable and incremental LTO. In 2017 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO). 111\u2013121."},{"key":"e_1_3_2_1_25_1","volume-title":"Proceedings of the 18th ACM SIGPLAN international conference on Functional programming. 343\u2013350","author":"Keep Andrew W","year":"2013","unstructured":"Andrew W Keep and R Kent Dybvig . 2013 . A nanopass framework for commercial compiler development . In Proceedings of the 18th ACM SIGPLAN international conference on Functional programming. 343\u2013350 . Andrew W Keep and R Kent Dybvig. 2013. A nanopass framework for commercial compiler development. In Proceedings of the 18th ACM SIGPLAN international conference on Functional programming. 343\u2013350."},{"key":"e_1_3_2_1_26_1","volume-title":"Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation. 296\u2013311","author":"Koeplinger David","year":"2018","unstructured":"David Koeplinger , Matthew Feldman , Raghu Prabhakar , Yaqi Zhang , Stefan Hadjis , Ruben Fiszel , Tian Zhao , Luigi Nardi , Ardavan Pedram , and Christos Kozyrakis . 2018 . Spatial: A language and compiler for application accelerators . In Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation. 296\u2013311 . David Koeplinger, Matthew Feldman, Raghu Prabhakar, Yaqi Zhang, Stefan Hadjis, Ruben Fiszel, Tian Zhao, Luigi Nardi, Ardavan Pedram, and Christos Kozyrakis. 2018. Spatial: A language and compiler for application accelerators. In Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation. 296\u2013311."},{"key":"e_1_3_2_1_27_1","volume-title":"Code Generation and Optimization, 2004. CGO 2004. International Symposium on. 75\u201386","author":"Lattner Chris","year":"2004","unstructured":"Chris Lattner and Vikram Adve . 2004 . LLVM: A compilation framework for lifelong program analysis & transformation . In Code Generation and Optimization, 2004. CGO 2004. International Symposium on. 75\u201386 . Chris Lattner and Vikram Adve. 2004. LLVM: A compilation framework for lifelong program analysis & transformation. In Code Generation and Optimization, 2004. CGO 2004. International Symposium on. 75\u201386."},{"key":"e_1_3_2_1_28_1","volume-title":"2021 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO). 2\u201314","author":"Lattner Chris","year":"2021","unstructured":"Chris Lattner , Mehdi Amini , Uday Bondhugula , Albert Cohen , Andy Davis , Jacques Pienaar , River Riddle , Tatiana Shpeisman , Nicolas Vasilache , and Oleksandr Zinenko . 2021 . MLIR: Scaling compiler infrastructure for domain specific computation . In 2021 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO). 2\u201314 . Chris Lattner, Mehdi Amini, Uday Bondhugula, Albert Cohen, Andy Davis, Jacques Pienaar, River Riddle, Tatiana Shpeisman, Nicolas Vasilache, and Oleksandr Zinenko. 2021. MLIR: Scaling compiler infrastructure for domain specific computation. In 2021 IEEE\/ACM International Symposium on Code Generation and Optimization (CGO). 2\u201314."},{"key":"e_1_3_2_1_29_1","volume-title":"Proceedings of the 47th Annual IEEE\/ACM International Symposium on (MICRO\u201914)","author":"Lockhart Derek","year":"2014","unstructured":"Derek Lockhart and Christopher Zibrat , Garyd Batten . 2014 . PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research. In Microarchitecture , Proceedings of the 47th Annual IEEE\/ACM International Symposium on (MICRO\u201914) . IEEE Computer Society, Washington, DC, USA. 280\u2013292. issn:1072-4451 https:\/\/doi.org\/10.1109\/MICRO. 2014.50 10.1109\/MICRO.2014.50 10.1109\/MICRO.2014.50 Derek Lockhart and Christopher Zibrat, Garyd Batten. 2014. PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research. In Microarchitecture, Proceedings of the 47th Annual IEEE\/ACM International Symposium on (MICRO\u201914). IEEE Computer Society, Washington, DC, USA. 280\u2013292. issn:1072-4451 https:\/\/doi.org\/10.1109\/MICRO.2014.50 10.1109\/MICRO.2014.50"},{"key":"e_1_3_2_1_30_1","volume-title":"HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description. arXiv preprint arXiv:2103.00194.","author":"Majumder Kingshuk","year":"2021","unstructured":"Kingshuk Majumder and Uday Bondhugula . 2021 . HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description. arXiv preprint arXiv:2103.00194. Kingshuk Majumder and Uday Bondhugula. 2021. HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description. arXiv preprint arXiv:2103.00194."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"crossref","unstructured":"Cristian Mattarei Makai Mann Clark Barrett Ross G Daly Dillon Huff and Pat Hanrahan. 2018. CoSA: Integrated Verification for Agile Hardware Design. In 2018 Formal Methods in Computer Aided Design (FMCAD). 2\u20135. \t\t\t\t  Cristian Mattarei Makai Mann Clark Barrett Ross G Daly Dillon Huff and Pat Hanrahan. 2018. CoSA: Integrated Verification for Agile Hardware Design. In 2018 Formal Methods in Computer Aided Design (FMCAD). 2\u20135.","DOI":"10.23919\/FMCAD.2018.8603014"},{"key":"e_1_3_2_1_32_1","volume-title":"International Conference on Compiler Construction. 213\u2013228","author":"Necula George C","year":"2002","unstructured":"George C Necula , Scott McPeak , Shree P Rahul , and Westley Weimer . 2002 . CIL: Intermediate language and tools for analysis and transformation of C programs . In International Conference on Compiler Construction. 213\u2013228 . George C Necula, Scott McPeak, Shree P Rahul, and Westley Weimer. 2002. CIL: Intermediate language and tools for analysis and transformation of C programs. In International Conference on Compiler Construction. 213\u2013228."},{"key":"e_1_3_2_1_33_1","volume-title":"Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation. 393\u2013407","author":"Nigam Rachit","year":"2020","unstructured":"Rachit Nigam , Sachille Atapattu , Samuel Thomas , Zhijing Li , Theodore Bauer , Yuwei Ye , Apurva Koti , Adrian Sampson , and Zhiru Zhang . 2020 . Predictable accelerator design with time-sensitive affine types . In Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation. 393\u2013407 . Rachit Nigam, Sachille Atapattu, Samuel Thomas, Zhijing Li, Theodore Bauer, Yuwei Ye, Apurva Koti, Adrian Sampson, and Zhiru Zhang. 2020. Predictable accelerator design with time-sensitive affine types. In Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation. 393\u2013407."},{"key":"e_1_3_2_1_34_1","volume-title":"Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems. 804\u2013817","author":"Nigam Rachit","year":"2021","unstructured":"Rachit Nigam , Samuel Thomas , Zhijing Li , and Adrian Sampson . 2021 . A compiler infrastructure for accelerator generators . In Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems. 804\u2013817 . Rachit Nigam, Samuel Thomas, Zhijing Li, and Adrian Sampson. 2021. A compiler infrastructure for accelerator generators. In Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems. 804\u2013817."},{"key":"e_1_3_2_1_35_1","volume-title":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design","author":"Nikhil Rishiyur","year":"2004","unstructured":"Rishiyur Nikhil . 2004 . Bluespec System Verilog: efficient, correct RTL from high level specifications . In Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design , 2004. MEMOCODE\u201904.. 69\u201370. Rishiyur Nikhil. 2004. Bluespec System Verilog: efficient, correct RTL from high level specifications. In Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE\u201904.. 69\u201370."},{"key":"e_1_3_2_1_36_1","unstructured":"Martin Odersky Philippe Altherr Vincent Cremet Burak Emir Sebastian Maneth St\u00e9phane Micheloud Nikolay Mihaylov Michel Schinz Erik Stenman and Matthias Zenger. 2004. An overview of the Scala programming language. \t\t\t\t  Martin Odersky Philippe Altherr Vincent Cremet Burak Emir Sebastian Maneth St\u00e9phane Micheloud Nikolay Mihaylov Michel Schinz Erik Stenman and Matthias Zenger. 2004. An overview of the Scala programming language."},{"key":"e_1_3_2_1_37_1","volume-title":"Proceedings of the 30th ACM SIGPLAN International Conference on Compiler Construction. 119\u2013130","author":"Panchenko Maksim","year":"2021","unstructured":"Maksim Panchenko , Rafael Auler , Laith Sakka , and Guilherme Ottoni . 2021 . Lightning bolt: powerful, fast, and scalable binary optimization . In Proceedings of the 30th ACM SIGPLAN International Conference on Compiler Construction. 119\u2013130 . Maksim Panchenko, Rafael Auler, Laith Sakka, and Guilherme Ottoni. 2021. Lightning bolt: powerful, fast, and scalable binary optimization. In Proceedings of the 30th ACM SIGPLAN International Conference on Compiler Construction. 119\u2013130."},{"key":"e_1_3_2_1_38_1","first-page":"1","article-title":"Programming heterogeneous systems from an image processing DSL","volume":"14","author":"Pu Jing","year":"2017","unstructured":"Jing Pu , Steven Bell , Xuan Yang , Jeff Setter , Stephen Richardson , Jonathan Ragan-Kelley , and Mark Horowitz . 2017 . Programming heterogeneous systems from an image processing DSL . ACM Transactions on Architecture and Code Optimization (TACO) , 14 , 3 (2017), 1 \u2013 25 . Jing Pu, Steven Bell, Xuan Yang, Jeff Setter, Stephen Richardson, Jonathan Ragan-Kelley, and Mark Horowitz. 2017. Programming heterogeneous systems from an image processing DSL. ACM Transactions on Architecture and Code Optimization (TACO), 14, 3 (2017), 1\u201325.","journal-title":"ACM Transactions on Architecture and Code Optimization (TACO)"},{"key":"e_1_3_2_1_39_1","volume-title":"Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation. 258\u2013271","author":"Schuiki Fabian","year":"2020","unstructured":"Fabian Schuiki , Andreas Kurth , Tobias Grosser , and Luca Benini . 2020 . LLHD: A multi-level intermediate representation for hardware description languages . In Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation. 258\u2013271 . Fabian Schuiki, Andreas Kurth, Tobias Grosser, and Luca Benini. 2020. LLHD: A multi-level intermediate representation for hardware description languages. In Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation. 258\u2013271."},{"key":"e_1_3_2_1_40_1","volume-title":"Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture. 940\u2013953","author":"Sharifian Amirali","year":"2019","unstructured":"Amirali Sharifian , Reza Hojabr , Navid Rahimi , Sihao Liu , Apala Guha , Tony Nowatzki , and Arrvindh Shriraman . 2019 . \u03bc ir-an intermediate representation for transforming and optimizing the microarchitecture of application accelerators . In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture. 940\u2013953 . Amirali Sharifian, Reza Hojabr, Navid Rahimi, Sihao Liu, Apala Guha, Tony Nowatzki, and Arrvindh Shriraman. 2019. \u03bc ir-an intermediate representation for transforming and optimizing the microarchitecture of application accelerators. In Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture. 940\u2013953."},{"key":"e_1_3_2_1_41_1","unstructured":"Sheng-Hong Wang Haven Skinner Sakshi Garg Hunter Coffman Kenneth Mayer Akash Sridhar Rafael T. Possignolo and Jose Renau. [n. d.]. Pyrope. http:\/\/masc.soe.ucsc.edu\/livehd\/pyrope\/ Online; accessed on 16 August 2021. \t\t\t\t  Sheng-Hong Wang Haven Skinner Sakshi Garg Hunter Coffman Kenneth Mayer Akash Sridhar Rafael T. Possignolo and Jose Renau. [n. d.]. Pyrope. http:\/\/masc.soe.ucsc.edu\/livehd\/pyrope\/ Online; accessed on 16 August 2021."},{"key":"e_1_3_2_1_42_1","unstructured":"Richard M Stallman. 2009. Using the gnu compiler collection: a gnu manual for gcc version 4.3. 3. CreateSpace. \t\t\t\t  Richard M Stallman. 2009. Using the gnu compiler collection: a gnu manual for gcc version 4.3. 3. CreateSpace."},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"crossref","first-page":"108","DOI":"10.1145\/358438.349317","article-title":"Bidwidth analysis with application to silicon compilation","volume":"35","author":"Stephenson Mark","year":"2000","unstructured":"Mark Stephenson , Jonathan Babb , and Saman Amarasinghe . 2000 . Bidwidth analysis with application to silicon compilation . ACM SIGPLAN Notices , 35 , 5 (2000), 108 \u2013 120 . Mark Stephenson, Jonathan Babb, and Saman Amarasinghe. 2000. Bidwidth analysis with application to silicon compilation. ACM SIGPLAN Notices, 35, 5 (2000), 108\u2013120.","journal-title":"ACM SIGPLAN Notices"},{"key":"e_1_3_2_1_44_1","unstructured":"Synopsys Inc.. [n. d.]. Formality User Guide. \t\t\t\t  Synopsys Inc.. [n. d.]. Formality User Guide."},{"key":"e_1_3_2_1_45_1","volume-title":"2011 VII Southern Conference on Programmable Logic (SPL). 117\u2013122","author":"Villar Jose I.","year":"2011","unstructured":"Jose I. Villar , Jorge Juan , Manual J. Bellido , Julian Viejo , David Guerrero , and J. Decaluwe . 2011. Python as a hardware description language: A case study . In 2011 VII Southern Conference on Programmable Logic (SPL). 117\u2013122 . https:\/\/doi.org\/10.1109\/SPL. 2011 .5782635 10.1109\/SPL.2011.5782635 10.1109\/SPL.2011.5782635 Jose I. Villar, Jorge Juan, Manual J. Bellido, Julian Viejo, David Guerrero, and J. Decaluwe. 2011. Python as a hardware description language: A case study. In 2011 VII Southern Conference on Programmable Logic (SPL). 117\u2013122. https:\/\/doi.org\/10.1109\/SPL.2011.5782635 10.1109\/SPL.2011.5782635"},{"key":"e_1_3_2_1_46_1","volume-title":"Proceedings of the Second Workshop on (WOSET\u201919)","author":"Wang Sheng-Hong","year":"2019","unstructured":"Sheng-Hong Wang , Rafael Trapani Possignolo , Qian Chen , Rohan Ganpati , and Jose Renau . 2019 . LGraph: A Unified Data Model and API for Productive Open-Source Hardware Design. In Open-Source EDA Technology , Proceedings of the Second Workshop on (WOSET\u201919) . Sheng-Hong Wang, Rafael Trapani Possignolo, Qian Chen, Rohan Ganpati, and Jose Renau. 2019. LGraph: A Unified Data Model and API for Productive Open-Source Hardware Design. In Open-Source EDA Technology, Proceedings of the Second Workshop on (WOSET\u201919)."},{"key":"e_1_3_2_1_47_1","volume-title":"Proceedings of the Second Workshop on (WOSET\u201919)","author":"Wang Sheng-Hong","year":"2019","unstructured":"Sheng-Hong Wang , Akash Sridhar , and Jose Renau . 2019 . LNAST: A Language Neutral Intermediate Representation for Hardware Description Languages. In Open-Source EDA Technology , Proceedings of the Second Workshop on (WOSET\u201919) . Sheng-Hong Wang, Akash Sridhar, and Jose Renau. 2019. LNAST: A Language Neutral Intermediate Representation for Hardware Description Languages. In Open-Source EDA Technology, Proceedings of the Second Workshop on (WOSET\u201919)."},{"key":"e_1_3_2_1_48_1","volume-title":"Proceedings of the ACM on Programming Languages, 3, OOPSLA","author":"Wimmer Christian","year":"2019","unstructured":"Christian Wimmer , Codrut Stancu , Peter Hofer , Vojin Jovanovic , Paul W\u00f6gerer , Peter B Kessler , Oleg Pliss , and Thomas W\u00fcrthinger . 2019 . Initialize once, start fast: application initialization at build time . Proceedings of the ACM on Programming Languages, 3, OOPSLA (2019), 1\u201329. Christian Wimmer, Codrut Stancu, Peter Hofer, Vojin Jovanovic, Paul W\u00f6gerer, Peter B Kessler, Oleg Pliss, and Thomas W\u00fcrthinger. 2019. Initialize once, start fast: application initialization at build time. Proceedings of the ACM on Programming Languages, 3, OOPSLA (2019), 1\u201329."},{"key":"e_1_3_2_1_49_1","volume-title":"Yosys Open SYnthesis Suite. https:\/\/yosyshq.net\/yosys\/ Online","author":"Wolf Clifford","year":"2022","unstructured":"Clifford Wolf . 2022. Yosys Open SYnthesis Suite. https:\/\/yosyshq.net\/yosys\/ Online ; accessed on 5 August 2022 . Clifford Wolf. 2022. Yosys Open SYnthesis Suite. https:\/\/yosyshq.net\/yosys\/ Online; accessed on 5 August 2022."}],"event":{"name":"CC '23: 32nd ACM SIGPLAN International Conference on Compiler Construction","location":"Montr\u00e9al QC Canada","acronym":"CC '23","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages"]},"container-title":["Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3578360.3580254","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3578360.3580254","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T16:46:52Z","timestamp":1750178812000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3578360.3580254"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,2,17]]},"references-count":49,"alternative-id":["10.1145\/3578360.3580254","10.1145\/3578360"],"URL":"https:\/\/doi.org\/10.1145\/3578360.3580254","relation":{},"subject":[],"published":{"date-parts":[[2023,2,17]]},"assertion":[{"value":"2023-02-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}