{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:13:04Z","timestamp":1750219984703,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":28,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,1,17]],"date-time":"2023-01-17T00:00:00Z","timestamp":1673913600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"German Federal Ministry of Education and Research (BMBF)","award":["16ME0717"],"award-info":[{"award-number":["16ME0717"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,1,17]]},"DOI":"10.1145\/3579170.3579259","type":"proceedings-article","created":{"date-parts":[[2023,4,13]],"date-time":"2023-04-13T16:35:54Z","timestamp":1681403754000},"page":"66-72","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Automatic DRAM Subsystem Configuration with irace"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2677-6475","authenticated-orcid":false,"given":"Lukas","family":"Steiner","sequence":"first","affiliation":[{"name":"RPTU Kaiserslautern-Landau, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9439-3113","authenticated-orcid":false,"given":"Gustavo","family":"Delazeri","sequence":"additional","affiliation":[{"name":"RPTU Kaiserslautern-Landau, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6397-9848","authenticated-orcid":false,"given":"Iron","family":"Prando da Silva","sequence":"additional","affiliation":[{"name":"Fraunhofer Institute for Experimental Software Engineering, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0036-2143","authenticated-orcid":false,"given":"Matthias","family":"Jung","sequence":"additional","affiliation":[{"name":"Fraunhofer Institute for Experimental Software Engineering, Germany and HTW Saar, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9010-086X","authenticated-orcid":false,"given":"Norbert","family":"Wehn","sequence":"additional","affiliation":[{"name":"RPTU Kaiserslautern-Landau, Germany"}]}],"member":"320","published-online":{"date-parts":[[2023,4,13]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors. 248\u2013255","author":"Ak\u0131n Berkin","year":"2014","unstructured":"Berkin Ak\u0131n , Franz Franchetti , and James\u00a0 C. Hoe . 2014 . Understanding the design space of DRAM-optimized hardware FFT accelerators . In 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors. 248\u2013255 . https:\/\/doi.org\/10.1109\/ASAP.2014.6868669 10.1109\/ASAP.2014.6868669 Berkin Ak\u0131n, Franz Franchetti, and James\u00a0C. Hoe. 2014. Understanding the design space of DRAM-optimized hardware FFT accelerators. In 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors. 248\u2013255. https:\/\/doi.org\/10.1109\/ASAP.2014.6868669"},{"key":"e_1_3_2_1_2_1","volume-title":"Exploring Pareto-optimal Hybrid Main Memory Configurations using different Emerging Memories. (7","author":"Alinezhad Saeideh","year":"2022","unstructured":"Saeideh Alinezhad . 2022. Exploring Pareto-optimal Hybrid Main Memory Configurations using different Emerging Memories. (7 2022 ). https:\/\/doi.org\/10.36227\/techrxiv.20326149.v1 10.36227\/techrxiv.20326149.v1 Saeideh Alinezhad. 2022. Exploring Pareto-optimal Hybrid Main Memory Configurations using different Emerging Memories. (7 2022). https:\/\/doi.org\/10.36227\/techrxiv.20326149.v1"},{"volume-title":"Improvement Strategies for the F-Race Algorithm: Sampling Design and Iterative Refinement","author":"Balaprakash Prasanna","key":"e_1_3_2_1_3_1","unstructured":"Prasanna Balaprakash , Mauro Birattari , and Thomas St\u00fctzle . 2007. Improvement Strategies for the F-Race Algorithm: Sampling Design and Iterative Refinement . In Hybrid Metaheuristics, Thomas Bartz-Beielstein, Mar\u00eda\u00a0Jos\u00e9 Blesa\u00a0Aguilera, Christian Blum, Boris Naujoks, Andrea Roli, G\u00fcnter Rudolph, and Michael Sampels (Eds.). Springer Berlin Heidelberg , Berlin, Heidelberg , 108\u2013122. Prasanna Balaprakash, Mauro Birattari, and Thomas St\u00fctzle. 2007. Improvement Strategies for the F-Race Algorithm: Sampling Design and Iterative Refinement. In Hybrid Metaheuristics, Thomas Bartz-Beielstein, Mar\u00eda\u00a0Jos\u00e9 Blesa\u00a0Aguilera, Christian Blum, Boris Naujoks, Andrea Roli, G\u00fcnter Rudolph, and Michael Sampels (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg, 108\u2013122."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-00483-4"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.5555\/2955491.2955494"},{"volume-title":"Practical nonparametric statistics","author":"Conover W.J.","key":"e_1_3_2_1_6_1","unstructured":"W.J. Conover . 1999. Practical nonparametric statistics , third edition. John Wiley & Sons , New York, NY . W.J. Conover. 1999. Practical nonparametric statistics, third edition. John Wiley & Sons, New York, NY."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3203217.3203280"},{"key":"e_1_3_2_1_8_1","first-page":"1","article-title":"Pitfalls and Best Practices in Algorithm Configuration","volume":"64","author":"Eggensperger Katharina","year":"2019","unstructured":"Katharina Eggensperger , Marius Lindauer , and Frank Hutter . 2019 . Pitfalls and Best Practices in Algorithm Configuration . J. Artif. Int. Res. 64 , 1 (jan 2019), 861\u2013893. https:\/\/doi.org\/10.1613\/jair.1.11420 10.1613\/jair.1.11420 Katharina Eggensperger, Marius Lindauer, and Frank Hutter. 2019. Pitfalls and Best Practices in Algorithm Configuration. J. Artif. Int. Res. 64, 1 (jan 2019), 861\u2013893. https:\/\/doi.org\/10.1613\/jair.1.11420","journal-title":"J. Artif. Int. Res."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"crossref","unstructured":"Saugata Ghose Tianshi Li Nastaran Hajinazar Damla Senol\u00a0Cali and Onur Mutlu. 2019. Demystifying Complex Workload-DRAM Interactions: An Experimental Study. 93\u201393.  Saugata Ghose Tianshi Li Nastaran Hajinazar Damla Senol\u00a0Cali and Onur Mutlu. 2019. Demystifying Complex Workload-DRAM Interactions: An Experimental Study. 93\u201393.","DOI":"10.1145\/3309697.3331482"},{"key":"e_1_3_2_1_10_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). 51\u201356","author":"Gomony Manil\u00a0Dev","year":"2012","unstructured":"Manil\u00a0Dev Gomony , Christian Weis , Benny Akesson , Norbert Wehn , and Kees Goossens . 2012 . DRAM selection and configuration for real-time mobile systems. In 2012 Design , Automation & Test in Europe Conference & Exhibition (DATE). 51\u201356 . https:\/\/doi.org\/10.1109\/DATE.2012.6176432 10.1109\/DATE.2012.6176432 Manil\u00a0Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, and Kees Goossens. 2012. DRAM selection and configuration for real-time mobile systems. In 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE). 51\u201356. https:\/\/doi.org\/10.1109\/DATE.2012.6176432"},{"key":"e_1_3_2_1_11_1","volume-title":"2008 45th ACM\/IEEE Design Automation Conference. 580\u2013585","author":"Haubelt Christian","year":"2008","unstructured":"Christian Haubelt , Thomas Schlichter , Joachim Keinert , and Mike Meredith . 2008 . SystemCoDesigner: Automatic design space exploration and rapid prototyping from behavioral models . In 2008 45th ACM\/IEEE Design Automation Conference. 580\u2013585 . https:\/\/doi.org\/10.1145\/1391469.1391616 10.1145\/1391469.1391616 Christian Haubelt, Thomas Schlichter, Joachim Keinert, and Mike Meredith. 2008. SystemCoDesigner: Automatic design space exploration and rapid prototyping from behavioral models. In 2008 45th ACM\/IEEE Design Automation Conference. 580\u2013585. https:\/\/doi.org\/10.1145\/1391469.1391616"},{"volume-title":"Proceedings of the 44th Annual International Symposium on Computer Architecture","author":"P.","key":"e_1_3_2_1_12_1","unstructured":"Norman\u00a0 P. Jouppi\u00a0et al.2017. In-Datacenter Performance Analysis of a Tensor Processing Unit . In Proceedings of the 44th Annual International Symposium on Computer Architecture ( Toronto, ON, Canada) (ISCA \u201917). Association for Computing Machinery, New York, NY, USA, 1\u201312. https:\/\/doi.org\/10.1145\/3079856.3080246 10.1145\/3079856.3080246 Norman\u00a0P. Jouppi\u00a0et al.2017. In-Datacenter Performance Analysis of a Tensor Processing Unit. In Proceedings of the 44th Annual International Symposium on Computer Architecture (Toronto, ON, Canada) (ISCA \u201917). Association for Computing Machinery, New York, NY, USA, 1\u201312. https:\/\/doi.org\/10.1145\/3079856.3080246"},{"key":"e_1_3_2_1_13_1","volume-title":"Proceedings of the Second International Symposium on Memory Systems","author":"Jung Matthias","year":"2016","unstructured":"Matthias Jung , Deepak\u00a0 M. Mathew , Christian Weis , Norbert Wehn , Irene Heinrich , Marco\u00a0 V. Natale , and Sven\u00a0 O. Krumke . 2016 . ConGen: An Application Specific DRAM Memory Controller Generator . In Proceedings of the Second International Symposium on Memory Systems ( Alexandria, VA, USA) (MEMSYS \u201916). Association for Computing Machinery, New York, NY, USA, 257\u2013267. https:\/\/doi.org\/10.1145\/2989081.2989131 10.1145\/2989081.2989131 Matthias Jung, Deepak\u00a0M. Mathew, Christian Weis, Norbert Wehn, Irene Heinrich, Marco\u00a0V. Natale, and Sven\u00a0O. Krumke. 2016. ConGen: An Application Specific DRAM Memory Controller Generator. In Proceedings of the Second International Symposium on Memory Systems (Alexandria, VA, USA) (MEMSYS \u201916). Association for Computing Machinery, New York, NY, USA, 257\u2013267. https:\/\/doi.org\/10.1145\/2989081.2989131"},{"key":"e_1_3_2_1_14_1","volume-title":"2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 613\u2013618","author":"Kansakar Prasanna","year":"2016","unstructured":"Prasanna Kansakar and Arslan Munir . 2016 . A Design Space Exploration Methodology for Parameter Optimization in Multicore Processors . In 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 613\u2013618 . https:\/\/doi.org\/10.1109\/ISVLSI.2016.92 10.1109\/ISVLSI.2016.92 Prasanna Kansakar and Arslan Munir. 2016. A Design Space Exploration Methodology for Parameter Optimization in Multicore Processors. In 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 613\u2013618. https:\/\/doi.org\/10.1109\/ISVLSI.2016.92"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.asoc.2013.05.009"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.orp.2016.09.002"},{"key":"e_1_3_2_1_17_1","unstructured":"M. L\u00f3pez-Ib\u00e1\u00f1ez L. P\u00e9rez\u00a0C\u00e1ceres J. Dubois-Lacoste T. St\u00fctzle and M. Birattari. 2022. The irace package: user guide. Technical Report. IRIDIA CoDE Universit\u00e9 Libre de Bruxelles.  M. L\u00f3pez-Ib\u00e1\u00f1ez L. P\u00e9rez\u00a0C\u00e1ceres J. Dubois-Lacoste T. St\u00fctzle and M. Birattari. 2022. The irace package: user guide. Technical Report. IRIDIA CoDE Universit\u00e9 Libre de Bruxelles."},{"key":"e_1_3_2_1_18_1","volume-title":"System Level Design Space Exploration for Multiprocessor System on Chip. In 2008 IEEE Computer Society Annual Symposium on VLSI. 93\u201398","author":"Maalej Issam","year":"2008","unstructured":"Issam Maalej , Guy Gogniat , Jean\u00a0Luc Philippe , and Mohamed Abid . 2008 . System Level Design Space Exploration for Multiprocessor System on Chip. In 2008 IEEE Computer Society Annual Symposium on VLSI. 93\u201398 . https:\/\/doi.org\/10.1109\/ISVLSI.2008.34 10.1109\/ISVLSI.2008.34 Issam Maalej, Guy Gogniat, Jean\u00a0Luc Philippe, and Mohamed Abid. 2008. System Level Design Space Exploration for Multiprocessor System on Chip. In 2008 IEEE Computer Society Annual Symposium on VLSI. 93\u201398. https:\/\/doi.org\/10.1109\/ISVLSI.2008.34"},{"key":"e_1_3_2_1_19_1","unstructured":"Xilinx. 2021. AXI High Bandwidth Memory Controller v1.0 (v1.0 ed.).  Xilinx. 2021. AXI High Bandwidth Memory Controller v1.0 (v1.0 ed.)."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.eswa.2014.10.039"},{"key":"e_1_3_2_1_21_1","volume-title":"Efficient Generation of Application Specific Memory Controllers. In The International Symposium on Memory Systems","author":"Natale V.","year":"2021","unstructured":"Marco\u00a0 V. Natale , Matthias Jung , Kira Kraft , Frederik Lauer , Johannes Feldmann , Chirag Sudarshan , Christian Weis , Sven Krumke , and Norbert Wehn . 2021 . Efficient Generation of Application Specific Memory Controllers. In The International Symposium on Memory Systems ( Washington, DC, USA) (MEMSYS 2020). Association for Computing Machinery, New York, NY, USA, 233\u2013247. https:\/\/doi.org\/10.1145\/3422575.3422796 10.1145\/3422575.3422796 Marco\u00a0V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Krumke, and Norbert Wehn. 2021. Efficient Generation of Application Specific Memory Controllers. In The International Symposium on Memory Systems (Washington, DC, USA) (MEMSYS 2020). Association for Computing Machinery, New York, NY, USA, 233\u2013247. https:\/\/doi.org\/10.1145\/3422575.3422796"},{"key":"e_1_3_2_1_22_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). 257\u2013260","author":"Neubauer Kai","year":"2018","unstructured":"Kai Neubauer , Philipp Wanko , Torsten Schaub , and Christian Haubelt . 2018 . Exact multi-objective design space exploration using ASPmT. In 2018 Design , Automation & Test in Europe Conference & Exhibition (DATE). 257\u2013260 . https:\/\/doi.org\/10.23919\/DATE.2018.8342014 10.23919\/DATE.2018.8342014 Kai Neubauer, Philipp Wanko, Torsten Schaub, and Christian Haubelt. 2018. Exact multi-objective design space exploration using ASPmT. In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE). 257\u2013260. https:\/\/doi.org\/10.23919\/DATE.2018.8342014"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.trb.2016.01.005"},{"key":"e_1_3_2_1_24_1","volume-title":"Architecture of Computing Systems \u2013 ARCS","author":"Scrbak Marko","year":"2015","unstructured":"Marko Scrbak , Mahzabeen Islam , Krishna\u00a0 M. Kavi , Mike Ignatowski , and Nuwan Jayasena . 2015. Processing-in-Memory: Exploring the Design Space . In Architecture of Computing Systems \u2013 ARCS 2015 , Lu\u00eds Miguel\u00a0Pinho Pinho, Wolfgang Karl , Albert Cohen, and Uwe Brinkschulte (Eds.). Springer International Publishing , Cham, 43\u201354. Marko Scrbak, Mahzabeen Islam, Krishna\u00a0M. Kavi, Mike Ignatowski, and Nuwan Jayasena. 2015. Processing-in-Memory: Exploring the Design Space. In Architecture of Computing Systems \u2013 ARCS 2015, Lu\u00eds Miguel\u00a0Pinho Pinho, Wolfgang Karl, Albert Cohen, and Uwe Brinkschulte (Eds.). Springer International Publishing, Cham, 43\u201354."},{"key":"e_1_3_2_1_25_1","volume-title":"2015 25th International Conference on Field Programmable Logic and Applications (FPL). 1\u20132. https:\/\/doi.org\/10","author":"Sotiriou-Xanthopoulos Efstathios","year":"2015","unstructured":"Efstathios Sotiriou-Xanthopoulos , Sotirios Xydis , Kostas Siozios , George Economakos , and Dimitrios Soudris . 2015 . Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems . In 2015 25th International Conference on Field Programmable Logic and Applications (FPL). 1\u20132. https:\/\/doi.org\/10 .1109\/FPL.2015.7293990 10.1109\/FPL.2015.7293990 Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, Kostas Siozios, George Economakos, and Dimitrios Soudris. 2015. Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems. In 2015 25th International Conference on Field Programmable Logic and Applications (FPL). 1\u20132. https:\/\/doi.org\/10.1109\/FPL.2015.7293990"},{"volume-title":"Embedded Computer Systems: Architectures","author":"Steiner Lukas","key":"e_1_3_2_1_26_1","unstructured":"Lukas Steiner , Matthias Jung , Felipe\u00a0 S. Prado , Kirill Bykov , and Norbert Wehn . 2020. DRAMSys4.0 : A Fast and Cycle-Accurate SystemC\/TLM-Based DRAM Simulator . In Embedded Computer Systems: Architectures , Modeling, and Simulation, Alex Orailoglu, Matthias Jung, and Marc Reichenbach (Eds.). Springer International Publishing , Cham , 110\u2013126. Lukas Steiner, Matthias Jung, Felipe\u00a0S. Prado, Kirill Bykov, and Norbert Wehn. 2020. DRAMSys4.0: A Fast and Cycle-Accurate SystemC\/TLM-Based DRAM Simulator. In Embedded Computer Systems: Architectures, Modeling, and Simulation, Alex Orailoglu, Matthias Jung, and Marc Reichenbach (Eds.). Springer International Publishing, Cham, 110\u2013126."},{"key":"#cr-split#-e_1_3_2_1_27_1.1","doi-asserted-by":"crossref","unstructured":"Christian Weis Norbert Wehn Loi Igor and Luca Benini. 2011. Design space exploration for 3D-stacked DRAMs. In 2011 Design Automation & Test in Europe. 1-6. https:\/\/doi.org\/10.1109\/DATE.2011.5763068 10.1109\/DATE.2011.5763068","DOI":"10.1109\/DATE.2011.5763068"},{"key":"#cr-split#-e_1_3_2_1_27_1.2","doi-asserted-by":"crossref","unstructured":"Christian Weis Norbert Wehn Loi Igor and Luca Benini. 2011. Design space exploration for 3D-stacked DRAMs. In 2011 Design Automation & Test in Europe. 1-6. https:\/\/doi.org\/10.1109\/DATE.2011.5763068","DOI":"10.1109\/DATE.2011.5763068"}],"event":{"name":"DroneSE and RAPIDO 2023: System Engineering for constrained embedded systems","acronym":"DroneSE and RAPIDO 2023","location":"Toulouse France"},"container-title":["DroneSE and RAPIDO: System Engineering for constrained embedded systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3579170.3579259","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3579170.3579259","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T17:49:27Z","timestamp":1750182567000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3579170.3579259"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,1,17]]},"references-count":28,"alternative-id":["10.1145\/3579170.3579259","10.1145\/3579170"],"URL":"https:\/\/doi.org\/10.1145\/3579170.3579259","relation":{},"subject":[],"published":{"date-parts":[[2023,1,17]]},"assertion":[{"value":"2023-04-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}