{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,10]],"date-time":"2026-01-10T07:56:44Z","timestamp":1768031804257,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":75,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,6,17]],"date-time":"2023-06-17T00:00:00Z","timestamp":1686960000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,6,17]]},"DOI":"10.1145\/3579371.3589102","type":"proceedings-article","created":{"date-parts":[[2023,6,16]],"date-time":"2023-06-16T20:25:28Z","timestamp":1686947128000},"page":"1-13","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["Implicit Memory Tagging: No-Overhead Memory Safety Using Alias-Free Tagged ECC"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6537-2065","authenticated-orcid":false,"given":"Michael B.","family":"Sullivan","sequence":"first","affiliation":[{"name":"NVIDIA, Austin, TX, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6971-6996","authenticated-orcid":false,"given":"Mohamed Tarek Ibn","family":"Ziad","sequence":"additional","affiliation":[{"name":"NVIDIA, Westford, MA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5709-2992","authenticated-orcid":false,"given":"Aamer","family":"Jaleel","sequence":"additional","affiliation":[{"name":"NVIDIA, Westford, MA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6701-6099","authenticated-orcid":false,"given":"Stephen W.","family":"Keckler","sequence":"additional","affiliation":[{"name":"NVIDIA, Austin, TX, USA"}]}],"member":"320","published-online":{"date-parts":[[2023,6,17]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"crossref","unstructured":"Advanced Micro Devices (AMD) Inc. 2012. AMD Graphics Cores Next (GCN) Architecture. Advanced Micro Devices (AMD) Inc. https:\/\/www.techpowerup.com\/gpu-specs\/docs\/amd-gcn1-architecture.pdf Advanced Micro Devices (AMD) Inc. 2012. AMD Graphics Cores Next (GCN) Architecture. Advanced Micro Devices (AMD) Inc. https:\/\/www.techpowerup.com\/gpu-specs\/docs\/amd-gcn1-architecture.pdf","DOI":"10.1109\/HOTCHIPS.2012.7476485"},{"key":"e_1_3_2_1_2_1","unstructured":"Advanced Micro Devices (AMD) Inc. 2015. BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h Models 30h-3Fh Processors. Advanced Micro Devices (AMD) Inc. Publication #49125 Rev 3.06. Advanced Micro Devices (AMD) Inc. 2015. BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h Models 30h-3Fh Processors. Advanced Micro Devices (AMD) Inc. Publication #49125 Rev 3.06."},{"key":"e_1_3_2_1_3_1","unstructured":"Advanced Micro Devices (AMD) Inc. 2022. AMD EPYC 9004 Series Architecture Overview. https:\/\/www.amd.com\/system\/files\/documents\/58015-epyc-9004-tg-architecture-overview.pdf Publication #58015. Advanced Micro Devices (AMD) Inc. 2022. AMD EPYC 9004 Series Architecture Overview. https:\/\/www.amd.com\/system\/files\/documents\/58015-epyc-9004-tg-architecture-overview.pdf Publication #58015."},{"key":"e_1_3_2_1_4_1","unstructured":"Arm Ltd. 2021. Armv8.5-A Memory Tagging Extension. Arm Ltd. https:\/\/developer.arm.com\/-\/media\/Arm%20Developer%20Community\/PDF\/Arm_Memory_Tagging_Extension_Whitepaper.pdf Arm Ltd. 2021. Armv8.5-A Memory Tagging Extension. Arm Ltd. https:\/\/developer.arm.com\/-\/media\/Arm%20Developer%20Community\/PDF\/Arm_Memory_Tagging_Extension_Whitepaper.pdf"},{"key":"e_1_3_2_1_5_1","volume-title":"Arm Architecture Reference Manual: For A-Profile Architecture","author":"Ltd Arm","unstructured":"Arm Ltd . 2022. Arm Architecture Reference Manual: For A-Profile Architecture . Arm Ltd . https:\/\/developer.arm.com\/documentation\/ddi0487\/ia Version I.A, pp. 5219--5230. Arm Ltd. 2022. Arm Architecture Reference Manual: For A-Profile Architecture. Arm Ltd. https:\/\/developer.arm.com\/documentation\/ddi0487\/ia Version I.A, pp. 5219--5230."},{"key":"e_1_3_2_1_6_1","unstructured":"Joe Bialek Ken Johnson Matt Miller and Tony Chen. 2020. Security Analysis of Memory Tagging. https:\/\/github.com\/microsoft\/MSRC-Security-Research\/raw\/master\/papers\/2020\/Security%20analysis%20of%20memory%20tagging.pdf Joe Bialek Ken Johnson Matt Miller and Tony Chen. 2020. Security Analysis of Memory Tagging. https:\/\/github.com\/microsoft\/MSRC-Security-Research\/raw\/master\/papers\/2020\/Security%20analysis%20of%20memory%20tagging.pdf"},{"key":"e_1_3_2_1_7_1","volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA). 926--939","author":"Choukse Esha","unstructured":"Esha Choukse , Michael B. Sullivan , Mike O'Connor , Mattan Erez , Jeff Pool , David Nellans , and Stephen W. Keckler . 2020. Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs . In Proceedings of the International Symposium on Computer Architecture (ISCA). 926--939 . Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David Nellans, and Stephen W. Keckler. 2020. Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs. In Proceedings of the International Symposium on Computer Architecture (ISCA). 926--939."},{"key":"e_1_3_2_1_8_1","volume-title":"Proceedings of the International Conference on Network and Parallel Computing (NPC). 103--115","author":"Di Bang","year":"2016","unstructured":"Bang Di , Jianhua Sun , and Hao Chen . 2016 . A Study of Overflow Vulnerabilities on GPUs . In Proceedings of the International Conference on Network and Parallel Computing (NPC). 103--115 . Bang Di, Jianhua Sun, and Hao Chen. 2016. A Study of Overflow Vulnerabilities on GPUs. In Proceedings of the International Conference on Network and Parallel Computing (NPC). 103--115."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2020.3042965"},{"key":"e_1_3_2_1_10_1","unstructured":"Richard Earnshaw. 2020. Add AARCH64-Specific Files for Memory Tagging Support. https:\/\/sourceware.org\/git\/?p=glibc.git;a=commit;h=d27f0e5d889f4bf4a796fe2a883b2f264bf40c12 Richard Earnshaw. 2020. Add AARCH64-Specific Files for Memory Tagging Support. https:\/\/sourceware.org\/git\/?p=glibc.git;a=commit;h=d27f0e5d889f4bf4a796fe2a883b2f264bf40c12"},{"key":"e_1_3_2_1_11_1","volume-title":"Proceedings of the International Workshop on OpenCL (IWOCL). 1--2.","author":"Erb Christopher","unstructured":"Christopher Erb and Joseph L. Greathouse . 2018. ClARMOR: A Dynamic Buffer Overflow Detector for OpenCL Kernels . In Proceedings of the International Workshop on OpenCL (IWOCL). 1--2. Christopher Erb and Joseph L. Greathouse. 2018. ClARMOR: A Dynamic Buffer Overflow Detector for OpenCL Kernels. In Proceedings of the International Workshop on OpenCL (IWOCL). 1--2."},{"key":"e_1_3_2_1_12_1","volume-title":"Code Design for Dependable Systems: Theory and Practical Application","author":"Fujiwara Eiji","unstructured":"Eiji Fujiwara . 2006. Code Design for Dependable Systems: Theory and Practical Application . Wiley-Interscience . Eiji Fujiwara. 2006. Code Design for Dependable Systems: Theory and Practical Application. Wiley-Interscience."},{"key":"e_1_3_2_1_14_1","volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA). 160--165","author":"Gumpertz Richard Henry","year":"1983","unstructured":"Richard Henry Gumpertz . 1983 . Combining Tags with Error Codes . In Proceedings of the International Symposium on Computer Architecture (ISCA). 160--165 . Richard Henry Gumpertz. 1983. Combining Tags with Error Codes. In Proceedings of the International Symposium on Computer Architecture (ISCA). 160--165."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.144.0395"},{"key":"e_1_3_2_1_16_1","volume-title":"GPU Technology Conference (GTC). http:\/\/on-demand.gputechconf.com\/gtc\/2017\/presentation\/s7764_john-hubbardgpus-using-hmm-blur-the-lines-between-cpu-and-gpu.pdf","author":"Hubbard John","year":"2017","unstructured":"John Hubbard . 2017 . Using HMM to Blur the Lines between CPU and GPU Programming . GPU Technology Conference (GTC). http:\/\/on-demand.gputechconf.com\/gtc\/2017\/presentation\/s7764_john-hubbardgpus-using-hmm-blur-the-lines-between-cpu-and-gpu.pdf John Hubbard. 2017. Using HMM to Blur the Lines between CPU and GPU Programming. GPU Technology Conference (GTC). http:\/\/on-demand.gputechconf.com\/gtc\/2017\/presentation\/s7764_john-hubbardgpus-using-hmm-blur-the-lines-between-cpu-and-gpu.pdf"},{"key":"e_1_3_2_1_17_1","unstructured":"Free Software Foundation Inc. 2023. The GNU C Library Reference Manual for version 2.37. https:\/\/www.gnu.org\/software\/libc\/manual\/html_node\/The-GNU-Allocator.html Free Software Foundation Inc. 2023. The GNU C Library Reference Manual for version 2.37. https:\/\/www.gnu.org\/software\/libc\/manual\/html_node\/The-GNU-Allocator.html"},{"key":"e_1_3_2_1_18_1","unstructured":"Intel Corp. 2017. 5-Level Paging and 5-Level EPT. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/download\/5-level-paging-and-5-level-ept-white-paper.html Document Number: 335252-002 Revision 1.1. Intel Corp. 2017. 5-Level Paging and 5-Level EPT. https:\/\/software.intel.com\/content\/www\/us\/en\/develop\/download\/5-level-paging-and-5-level-ept-white-paper.html Document Number: 335252-002 Revision 1.1."},{"key":"e_1_3_2_1_19_1","volume-title":"JESD212B","author":"JEDEC Solid State Technology Association 2013.","unstructured":"JEDEC Solid State Technology Association 2013. Graphics Double Data Rate (GDDR5) SGRAM Standard , JESD212B . JEDEC Solid State Technology Association . JEDEC Solid State Technology Association 2013. Graphics Double Data Rate (GDDR5) SGRAM Standard, JESD212B. JEDEC Solid State Technology Association."},{"key":"e_1_3_2_1_20_1","volume-title":"JESD232","author":"JEDEC Solid State Technology Association 2015.","unstructured":"JEDEC Solid State Technology Association 2015. Graphics Double Data Rate (GDDR5X) SGRAM Standard , JESD232 . JEDEC Solid State Technology Association . JEDEC Solid State Technology Association 2015. Graphics Double Data Rate (GDDR5X) SGRAM Standard, JESD232. JEDEC Solid State Technology Association."},{"key":"e_1_3_2_1_21_1","volume-title":"JESD256A","author":"JEDEC Solid State Technology Association 2015.","unstructured":"JEDEC Solid State Technology Association 2015. High Bandwidth Memory (HBM) DRAM , JESD256A . JEDEC Solid State Technology Association . JEDEC Solid State Technology Association 2015. High Bandwidth Memory (HBM) DRAM, JESD256A. JEDEC Solid State Technology Association."},{"key":"e_1_3_2_1_22_1","volume-title":"JESD250C","author":"JEDEC Solid State Technology Association 2021.","unstructured":"JEDEC Solid State Technology Association 2021. Graphics Double Data Rate 6 (GDDR6) SGRAM Standard , JESD250C . JEDEC Solid State Technology Association . JEDEC Solid State Technology Association 2021. Graphics Double Data Rate 6 (GDDR6) SGRAM Standard, JESD250C. JEDEC Solid State Technology Association."},{"key":"e_1_3_2_1_23_1","volume-title":"JESD238","author":"JEDEC Solid State Technology Association 2022.","unstructured":"JEDEC Solid State Technology Association 2022. High Bandwidth Memory DRAM (HBM3) , JESD238 . JEDEC Solid State Technology Association . JEDEC Solid State Technology Association 2022. High Bandwidth Memory DRAM (HBM3), JESD238. JEDEC Solid State Technology Association."},{"key":"e_1_3_2_1_24_1","volume-title":"TAG: Tagged Architecture Guide. Comput. Surveys (May","author":"Jero Samuel","year":"2022","unstructured":"Samuel Jero , Nathan Burow , Bryan Ward , Richard Skowyra , Roger Khazan , Howard Shrobe , and Hamed Okhravi . 2022 . TAG: Tagged Architecture Guide. Comput. Surveys (May 2022). Samuel Jero, Nathan Burow, Bryan Ward, Richard Skowyra, Roger Khazan, Howard Shrobe, and Hamed Okhravi. 2022. TAG: Tagged Architecture Guide. Comput. Surveys (May 2022)."},{"key":"e_1_3_2_1_25_1","volume-title":"Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking. arXiv preprint arXiv:1804.06826 (April","author":"Jia Zhe","year":"2018","unstructured":"Zhe Jia , Marco Maggioni , Benjamin Staiger , and Daniele P Scarpazza . 2018. Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking. arXiv preprint arXiv:1804.06826 (April 2018 ), 17--24. Zhe Jia, Marco Maggioni, Benjamin Staiger, and Daniele P Scarpazza. 2018. Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking. arXiv preprint arXiv:1804.06826 (April 2018), 17--24."},{"key":"e_1_3_2_1_26_1","volume-title":"Proceedings of the International Conference on Computer Design (ICCD). 641--648","author":"Joannou Alexandre","unstructured":"Alexandre Joannou , Jonathan Woodruff , Robert Kovacsics , Simon W. Moore , Alex Bradbury , Hongyan Xia , Robert N.M. Watson , David Chisnall , Michael Roe , Brooks Davis , Edward Napierala , John Baldwin , Khilan Gudka , Peter G. Neumann , Alfredo Mazzinghi , Alex Richardson , Stacey Son , and A. Theodore Markettos . 2017. Efficient Tagged Memory . In Proceedings of the International Conference on Computer Design (ICCD). 641--648 . Alexandre Joannou, Jonathan Woodruff, Robert Kovacsics, Simon W. Moore, Alex Bradbury, Hongyan Xia, Robert N.M. Watson, David Chisnall, Michael Roe, Brooks Davis, Edward Napierala, John Baldwin, Khilan Gudka, Peter G. Neumann, Alfredo Mazzinghi, Alex Richardson, Stacey Son, and A. Theodore Markettos. 2017. Efficient Tagged Memory. In Proceedings of the International Conference on Computer Design (ICCD). 641--648."},{"key":"e_1_3_2_1_27_1","volume-title":"Proceedings of the International Symposium on High Performance Computer Architecture (HPCA). 101--112","author":"Kim Jungrae","year":"2015","unstructured":"Jungrae Kim , Michael B Sullivan , and Mattan Erez . 2015 . Bamboo ECC: Strong, Safe, and Flexible Codes for Reliable Computer Memory . In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA). 101--112 . Jungrae Kim, Michael B Sullivan, and Mattan Erez. 2015. Bamboo ECC: Strong, Safe, and Flexible Codes for Reliable Computer Memory. In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA). 101--112."},{"key":"e_1_3_2_1_28_1","volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA). 622--633","author":"Kim Jungrae","year":"2016","unstructured":"Jungrae Kim , Michael B. Sullivan , Sangkug Lym , and Mattan Erez . 2016 . All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory . In Proceedings of the International Symposium on Computer Architecture (ISCA). 622--633 . Jungrae Kim, Michael B. Sullivan, Sangkug Lym, and Mattan Erez. 2016. All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory. In Proceedings of the International Symposium on Computer Architecture (ISCA). 622--633."},{"key":"e_1_3_2_1_29_1","volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA). 361--372","author":"Kim Yoongu","year":"2014","unstructured":"Yoongu Kim , Ross Daly , Jeremie Kim , Chris Fallin , Ji Hye Lee , Donghyuk Lee , Chris Wilkerson , Konrad Lai , and Onur Mutlu . 2014 . Flipping Bits in Memory without Accessing Them: An Experimental Study of DRAM Disturbance Errors . In Proceedings of the International Symposium on Computer Architecture (ISCA). 361--372 . Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, and Onur Mutlu. 2014. Flipping Bits in Memory without Accessing Them: An Experimental Study of DRAM Disturbance Errors. In Proceedings of the International Symposium on Computer Architecture (ISCA). 361--372."},{"key":"e_1_3_2_1_30_1","unstructured":"KTH Royal Institute of Technology. 2023. GROMACS. NVIDIA GPU Cloud. https:\/\/catalog.ngc.nvidia.com\/orgs\/hpc\/containers\/gromacs KTH Royal Institute of Technology. 2023. GROMACS. NVIDIA GPU Cloud. https:\/\/catalog.ngc.nvidia.com\/orgs\/hpc\/containers\/gromacs"},{"key":"e_1_3_2_1_31_1","volume-title":"Proceedings of the SIGSAC Conference on Computer and Communications Security. 721--732","author":"Kwon Albert","year":"2013","unstructured":"Albert Kwon , Udit Dhawan , Jonathan M. Smith , Thomas F. Knight , and Andre DeHon . 2013 . Low-Fat Pointers: Compact Encoding and Efficient Gate-Level Implementation of Fat Pointers for Spatial Safety and Capability-Based Security . In Proceedings of the SIGSAC Conference on Computer and Communications Security. 721--732 . Albert Kwon, Udit Dhawan, Jonathan M. Smith, Thomas F. Knight, and Andre DeHon. 2013. Low-Fat Pointers: Compact Encoding and Efficient Gate-Level Implementation of Fat Pointers for Spatial Safety and Capability-Based Security. In Proceedings of the SIGSAC Conference on Computer and Communications Security. 721--732."},{"key":"e_1_3_2_1_32_1","unstructured":"Hugo Landau. 2022. The Talos II Blackbird POWER9 Systems Support Tagged Memory. https:\/\/www.devever.net\/~hl\/power9tags Hugo Landau. 2022. The Talos II Blackbird POWER9 Systems Support Tagged Memory. https:\/\/www.devever.net\/~hl\/power9tags"},{"key":"e_1_3_2_1_33_1","volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA). 27--41","author":"Lee Jaewon","year":"2022","unstructured":"Jaewon Lee , Yonghae Kim , Jiashen Cao , Euna Kim , Jaekyu Lee , and Hyesoon Kim . 2022 . Securing GPU via Region-Based Bounds Checking . In Proceedings of the International Symposium on Computer Architecture (ISCA). 27--41 . Jaewon Lee, Yonghae Kim, Jiashen Cao, Euna Kim, Jaekyu Lee, and Hyesoon Kim. 2022. Securing GPU via Region-Based Bounds Checking. In Proceedings of the International Symposium on Computer Architecture (ISCA). 27--41."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"crossref","first-page":"2043","DOI":"10.1021\/acs.jcim.8b00462","article-title":"GPU-Accelerated Molecular Dynamics and Free Energy Methods in Amber18: Performance Enhancements and New Features","volume":"58","author":"Lee Tai-Sung","year":"2018","unstructured":"Tai-Sung Lee , David S Cerutti , Dan Mermelstein , Charles Lin , Scott LeGrand , Timothy J Giese , Adrian Roitberg , David A Case , Ross C Walker , and Darrin M York . 2018 . GPU-Accelerated Molecular Dynamics and Free Energy Methods in Amber18: Performance Enhancements and New Features . Journal of Chemical Information and Modeling 58 , 10 (2018), 2043 -- 2050 . Tai-Sung Lee, David S Cerutti, Dan Mermelstein, Charles Lin, Scott LeGrand, Timothy J Giese, Adrian Roitberg, David A Case, Ross C Walker, and Darrin M York. 2018. GPU-Accelerated Molecular Dynamics and Free Energy Methods in Amber18: Performance Enhancements and New Features. Journal of Chemical Information and Modeling 58, 10 (2018), 2043--2050.","journal-title":"Journal of Chemical Information and Modeling"},{"key":"e_1_3_2_1_35_1","volume-title":"Application Data Integrity (ADI)","author":"Linux Kernel Organization 2019.","unstructured":"Linux Kernel Organization 2019. Application Data Integrity (ADI) . Linux Kernel Organization . https:\/\/www.kernel.org\/doc\/Documentation\/sparc\/adi.rst Linux Kernel Organization 2019. Application Data Integrity (ADI). Linux Kernel Organization. https:\/\/www.kernel.org\/doc\/Documentation\/sparc\/adi.rst"},{"key":"e_1_3_2_1_36_1","unstructured":"LLVM Project. 2023. Scudo Hardened Allocator. https:\/\/llvm.org\/docs\/ScudoHardenedAllocator.html LLVM Project. 2023. Scudo Hardened Allocator. https:\/\/llvm.org\/docs\/ScudoHardenedAllocator.html"},{"key":"e_1_3_2_1_37_1","volume-title":"Proceedings of the International Symposium on Microarchitecture (MICRO). 73--90","author":"Manzhosov Evgeny","year":"2022","unstructured":"Evgeny Manzhosov , Adam Hastings , Meghna Pancholi , Ryan Piersma , Mohamed Tarek Ibn Ziad , and Simha Sethumadhavan . 2022 . Revisiting Residue Codes for Modern Memories . In Proceedings of the International Symposium on Microarchitecture (MICRO). 73--90 . Evgeny Manzhosov, Adam Hastings, Meghna Pancholi, Ryan Piersma, Mohamed Tarek Ibn Ziad, and Simha Sethumadhavan. 2022. Revisiting Residue Codes for Modern Memories. In Proceedings of the International Symposium on Microarchitecture (MICRO). 73--90."},{"key":"e_1_3_2_1_38_1","first-page":"336","article-title":"MLPerf Training Benchmark","volume":"2","author":"Mattson Peter","year":"2020","unstructured":"Peter Mattson , Christine Cheng , Gregory Diamos , Cody Coleman , Paulius Micikevicius , David Patterson , Hanlin Tang , Gu-Yeon Wei , Peter Bailis , Victor Bittorf , 2020 . MLPerf Training Benchmark . Proceedings of Machine Learning and Systems 2 (2020), 336 -- 349 . Peter Mattson, Christine Cheng, Gregory Diamos, Cody Coleman, Paulius Micikevicius, David Patterson, Hanlin Tang, Gu-Yeon Wei, Peter Bailis, Victor Bittorf, et al. 2020. MLPerf Training Benchmark. Proceedings of Machine Learning and Systems 2 (2020), 336--349.","journal-title":"Proceedings of Machine Learning and Systems"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11416-015-0251-1"},{"key":"e_1_3_2_1_40_1","unstructured":"M Miller. 2019. Trends Challenges and Strategic Shifts in the Software Vulnerability Mitigation Landscape. Blue Hat IL. https:\/\/github.com\/microsoft\/MSRC-Security-Research\/blob\/master\/presentations\/2019_02_BlueHatIL\/2019_01%20-%20BlueHatIL%20-%20Trends%2C%20challenge%2C%20and%20shifts%20in%20software%20vulnerability%20mitigation.pdf M Miller. 2019. Trends Challenges and Strategic Shifts in the Software Vulnerability Mitigation Landscape. Blue Hat IL. https:\/\/github.com\/microsoft\/MSRC-Security-Research\/blob\/master\/presentations\/2019_02_BlueHatIL\/2019_01%20-%20BlueHatIL%20-%20Trends%2C%20challenge%2C%20and%20shifts%20in%20software%20vulnerability%20mitigation.pdf"},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"crossref","first-page":"3","DOI":"10.1109\/TNS.2016.2547963","article-title":"Neutron Radiation Induced Soft Error Rates for an Adjacent-ECC Protected SRAM in 28nm CMOS","volume":"63","author":"Neale A.","year":"2016","unstructured":"A. Neale and M. Sachdev . 2016 . Neutron Radiation Induced Soft Error Rates for an Adjacent-ECC Protected SRAM in 28nm CMOS . IEEE Transactions on Nuclear Science 63 , 3 (June 2016), 1912--1917. A. Neale and M. Sachdev. 2016. Neutron Radiation Induced Soft Error Rates for an Adjacent-ECC Protected SRAM in 28nm CMOS. IEEE Transactions on Nuclear Science 63, 3 (June 2016), 1912--1917.","journal-title":"IEEE Transactions on Nuclear Science"},{"key":"e_1_3_2_1_42_1","volume-title":"NVIDIA Tesla P100---The Most Advanced Data Center Accelerator Ever Built Featuring Pascal GP100, the World's Fastest GPU","author":"NVIDIA Corp. 2016.","unstructured":"NVIDIA Corp. 2016. NVIDIA Tesla P100---The Most Advanced Data Center Accelerator Ever Built Featuring Pascal GP100, the World's Fastest GPU . NVIDIA Corp . http:\/\/www.nvidia.com\/object\/pascal-architecture-whitepaper.html NVIDIA Corp. 2016. NVIDIA Tesla P100---The Most Advanced Data Center Accelerator Ever Built Featuring Pascal GP100, the World's Fastest GPU. NVIDIA Corp. http:\/\/www.nvidia.com\/object\/pascal-architecture-whitepaper.html"},{"key":"e_1_3_2_1_43_1","volume-title":"NVIDIA T4 Tensor Core GPU","author":"NVIDIA Corp. 2019.","unstructured":"NVIDIA Corp. 2019. NVIDIA T4 Tensor Core GPU . NVIDIA Corp . https:\/\/www.nvidia.com\/content\/dam\/en-zz\/Solutions\/Data-Center\/tesla-t4\/t4-tensor-core-datasheet-951643.pdf NVIDIA Corp. 2019. NVIDIA T4 Tensor Core GPU. NVIDIA Corp. https:\/\/www.nvidia.com\/content\/dam\/en-zz\/Solutions\/Data-Center\/tesla-t4\/t4-tensor-core-datasheet-951643.pdf"},{"key":"e_1_3_2_1_44_1","volume-title":"NVIDIA A100 GPU Memory Error Management","author":"NVIDIA Corp. 2021.","unstructured":"NVIDIA Corp. 2021. NVIDIA A100 GPU Memory Error Management . NVIDIA Corp . https:\/\/docs.nvidia.com\/deploy\/a100-gpu-mem-error-mgmt\/index.html NVIDIA Corp. 2021. NVIDIA A100 GPU Memory Error Management. NVIDIA Corp. https:\/\/docs.nvidia.com\/deploy\/a100-gpu-mem-error-mgmt\/index.html"},{"key":"e_1_3_2_1_45_1","volume-title":"Dynamic Page Retirement","author":"NVIDIA Corp. 2022.","unstructured":"NVIDIA Corp. 2022. Dynamic Page Retirement . NVIDIA Corp . https:\/\/docs.nvidia.com\/deploy\/dynamic-page-retirement\/index.html NVIDIA Corp. 2022. Dynamic Page Retirement. NVIDIA Corp. https:\/\/docs.nvidia.com\/deploy\/dynamic-page-retirement\/index.html"},{"key":"e_1_3_2_1_46_1","first-page":"228","volume-title":"Section 10.34: Dynamic Global Memory Allocation and Operations. NVIDIA Developer Zone. https:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_C_Programming_Guide.pdf Release 12.1","author":"NVIDIA Corp. 2023.","unstructured":"NVIDIA Corp. 2023. CUDA C Programming Guide , Section 10.34: Dynamic Global Memory Allocation and Operations. NVIDIA Developer Zone. https:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_C_Programming_Guide.pdf Release 12.1 , pages 228 -- 231 . NVIDIA Corp. 2023. CUDA C Programming Guide, Section 10.34: Dynamic Global Memory Allocation and Operations. NVIDIA Developer Zone. https:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_C_Programming_Guide.pdf Release 12.1, pages 228--231."},{"key":"e_1_3_2_1_47_1","volume-title":"adi_memset Documentation","author":"Oracle Corp. 2015.","unstructured":"Oracle Corp. 2015. adi_memset Documentation . Oracle Corp . https:\/\/docs.oracle.com\/cd\/E86824_01\/html\/E54766\/adi-memset-3c.html Oracle Corp. 2015. adi_memset Documentation. Oracle Corp. https:\/\/docs.oracle.com\/cd\/E86824_01\/html\/E54766\/adi-memset-3c.html"},{"key":"e_1_3_2_1_48_1","volume-title":"Hardware-Assisted Checking Using Silicon Secured Memory (SSM)","author":"Oracle Corp. 2015.","unstructured":"Oracle Corp. 2015. Hardware-Assisted Checking Using Silicon Secured Memory (SSM) . Oracle Corp . https:\/\/docs.oracle.com\/cd\/E37069_01\/html\/E37085\/gphwb.html Oracle Corp. 2015. Hardware-Assisted Checking Using Silicon Secured Memory (SSM). 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