{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,28]],"date-time":"2026-10-28T20:51:03Z","timestamp":1793220663445,"version":"4.5.0"},"publisher-location":"New York, NY, USA","reference-count":79,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,7,10]],"date-time":"2023-07-10T00:00:00Z","timestamp":1688947200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,7,10]]},"DOI":"10.1145\/3579856.3590332","type":"proceedings-article","created":{"date-parts":[[2023,7,5]],"date-time":"2023-07-05T14:52:13Z","timestamp":1688568733000},"page":"205-217","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":15,"title":["ShowTime: Amplifying Arbitrary CPU Timing Side Channels"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1426-0853","authenticated-orcid":false,"given":"Antoon","family":"Purnal","sequence":"first","affiliation":[{"name":"imec-COSIC, KU Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8641-7549","authenticated-orcid":false,"given":"Marton","family":"Bognar","sequence":"additional","affiliation":[{"name":"imec-DistriNet, KU Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5438-153X","authenticated-orcid":false,"given":"Frank","family":"Piessens","sequence":"additional","affiliation":[{"name":"imec-DistriNet, KU Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0879-076X","authenticated-orcid":false,"given":"Ingrid","family":"Verbauwhede","sequence":"additional","affiliation":[{"name":"imec-COSIC, KU Leuven, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2023,7,10]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS48437.2020.00014"},{"key":"e_1_3_2_1_2_1","volume-title":"IEEE Symposium on Security and Privacy (S&P).","author":"Agarwal Ayush","year":"2022","unstructured":"Ayush Agarwal , Sioli O\u2019Connell , Jason Kim , Shaked Yehezkel , Daniel Genkin , Eyal Ronen , and Yuval Yarom . 2022 . Spook.js: Attacking chrome strict site isolation via speculative execution . In IEEE Symposium on Security and Privacy (S&P). Ayush Agarwal, Sioli O\u2019Connell, Jason Kim, Shaked Yehezkel, Daniel Genkin, Eyal Ronen, and Yuval Yarom. 2022. Spook.js: Attacking chrome strict site isolation via speculative execution. In IEEE Symposium on Security and Privacy (S&P)."},{"key":"e_1_3_2_1_3_1","volume-title":"Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions","author":"Aimoniotis Pavlos","unstructured":"Pavlos Aimoniotis , Christos Sakalis , Magnus Sj\u00e4lander , and Stefanos Kaxiras . 2021. Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions . In IEEE Computer Architecture Letters . Pavlos Aimoniotis, Christos Sakalis, Magnus Sj\u00e4lander, and Stefanos Kaxiras. 2021. Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions. In IEEE Computer Architecture Letters."},{"key":"e_1_3_2_1_4_1","volume-title":"IEEE Symposium on Security and Privacy (S&P).","author":"Aldaya Alejandro\u00a0Cabrera","year":"2019","unstructured":"Alejandro\u00a0Cabrera Aldaya , Billy\u00a0Bob Brumley , Sohaib ul Hassan , Cesar\u00a0Pereida Garc\u00eda , and Nicola Tuveri . 2019 . Port contention for fun and profit . In IEEE Symposium on Security and Privacy (S&P). Alejandro\u00a0Cabrera Aldaya, Billy\u00a0Bob Brumley, Sohaib ul Hassan, Cesar\u00a0Pereida Garc\u00eda, and Nicola Tuveri. 2019. Port contention for fun and profit. In IEEE Symposium on Security and Privacy (S&P)."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"crossref","unstructured":"Mohammad Behnia Prateek Sahu Riccardo Paccagnella Jiyong Yu Zirui Zhao Xiang Zou Thomas Unterluggauer Josep Torrellas Carlos Rozas Adam Morrison Frank Mckeen Fangfei Liu Ron Gabor Christopher\u00a0W. Fletcher Abhishek Basak and Alaa Alameldeen. 2021. Speculative Interference Attacks: Breaking Invisible Speculation Schemes. In ASPLOS.  Mohammad Behnia Prateek Sahu Riccardo Paccagnella Jiyong Yu Zirui Zhao Xiang Zou Thomas Unterluggauer Josep Torrellas Carlos Rozas Adam Morrison Frank Mckeen Fangfei Liu Ron Gabor Christopher\u00a0W. Fletcher Abhishek Basak and Alaa Alameldeen. 2021. Speculative Interference Attacks: Breaking Invisible Speculation Schemes. In ASPLOS.","DOI":"10.1145\/3445814.3446708"},{"key":"e_1_3_2_1_6_1","volume":"200","author":"Daniel\u00a0","unstructured":"Daniel\u00a0 J Bernstein. 200 5. Cache-timing attacks on AES. Daniel\u00a0J Bernstein. 2005. Cache-timing attacks on AES.","journal-title":"J Bernstein."},{"key":"e_1_3_2_1_7_1","volume-title":"ACM SIGSAC Conference on Computer and Communications Security (CCS).","author":"Bhattacharyya Atri","year":"2019","unstructured":"Atri Bhattacharyya , Alexandra Sandulescu , Matthias Neugschwandtner , Alessandro Sorniotti , Babak Falsafi , Mathias Payer , and Anil Kurmus . 2019 . SMoTherSpectre: Exploiting Speculative Execution through Port Contention . In ACM SIGSAC Conference on Computer and Communications Security (CCS). Atri Bhattacharyya, Alexandra Sandulescu, Matthias Neugschwandtner, Alessandro Sorniotti, Babak Falsafi, Mathias Payer, and Anil Kurmus. 2019. SMoTherSpectre: Exploiting Speculative Execution through Port Contention. In ACM SIGSAC Conference on Computer and Communications Security (CCS)."},{"key":"e_1_3_2_1_8_1","volume-title":"IEEE Symposium on Security and Privacy (S&P).","author":"Bosman Erik","year":"2016","unstructured":"Erik Bosman , Kaveh Razavi , Herbert Bos , and Cristiano Giuffrida . 2016 . Dedup Est Machina: Memory Deduplication as an Advanced Exploitation Vector . In IEEE Symposium on Security and Privacy (S&P). Erik Bosman, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida. 2016. Dedup Est Machina: Memory Deduplication as an Advanced Exploitation Vector. In IEEE Symposium on Security and Privacy (S&P)."},{"key":"e_1_3_2_1_9_1","volume-title":"Shoot: How the CACHESNIPER Technique Improves Unprivileged Cache Attacks. In IEEE European Symposium on Security and Privacy (EuroS&P).","author":"Briongos Samira","year":"2021","unstructured":"Samira Briongos , Ida Bruhns , Pedro Malag\u00f3n , Thomas Eisenbarth , and Jos\u00e9\u00a0 M. Moya . 2021 . Aim, Wait , Shoot: How the CACHESNIPER Technique Improves Unprivileged Cache Attacks. In IEEE European Symposium on Security and Privacy (EuroS&P). Samira Briongos, Ida Bruhns, Pedro Malag\u00f3n, Thomas Eisenbarth, and Jos\u00e9\u00a0M. Moya. 2021. Aim, Wait, Shoot: How the CACHESNIPER Technique Improves Unprivileged Cache Attacks. In IEEE European Symposium on Security and Privacy (EuroS&P)."},{"key":"e_1_3_2_1_10_1","volume-title":"USENIX Security Symposium.","author":"Briongos Samira","year":"2020","unstructured":"Samira Briongos , Pedro Malagon , Jose\u00a0 M. Moya , and Thomas Eisenbarth . 2020 . RELOAD+REFRESH: Abusing Cache Replacement Policies to Perform Stealthy Cache Attacks . In USENIX Security Symposium. Samira Briongos, Pedro Malagon, Jose\u00a0M. Moya, and Thomas Eisenbarth. 2020. RELOAD+REFRESH: Abusing Cache Replacement Policies to Perform Stealthy Cache Attacks. In USENIX Security Symposium."},{"key":"e_1_3_2_1_11_1","volume-title":"Sanctum: Minimal Hardware Extensions for Strong Software Isolation. In USENIX Security Symposium.","author":"Costan Victor","year":"2016","unstructured":"Victor Costan , Ilia Lebedev , and Srinivas Devadas . 2016 . Sanctum: Minimal Hardware Extensions for Strong Software Isolation. In USENIX Security Symposium. Victor Costan, Ilia Lebedev, and Srinivas Devadas. 2016. Sanctum: Minimal Hardware Extensions for Strong Software Isolation. In USENIX Security Symposium."},{"key":"e_1_3_2_1_12_1","volume-title":"Don\u2019t Mesh Around: Side-Channel Attacks and Mitigations on Mesh Interconnects. In USENIX Security Symposium.","author":"Dai Miles","year":"2022","unstructured":"Miles Dai , Riccardo Paccagnella , Miguel Gomez-Garcia , John McCalpin , and Mengjia Yan . 2022 . Don\u2019t Mesh Around: Side-Channel Attacks and Mitigations on Mesh Interconnects. In USENIX Security Symposium. Miles Dai, Riccardo Paccagnella, Miguel Gomez-Garcia, John McCalpin, and Mengjia Yan. 2022. Don\u2019t Mesh Around: Side-Channel Attacks and Mitigations on Mesh Interconnects. In USENIX Security Symposium."},{"key":"e_1_3_2_1_13_1","volume-title":"USENIX Security Symposium.","author":"de Ridder Finn","year":"2021","unstructured":"Finn de Ridder , Pietro Frigo , Emanuele Vannacci , Herbert Bos , Cristiano Giuffrida , and Kaveh Razavi . 2021 . SMASH: Synchronized Many-sided Rowhammer Attacks from JavaScript . In USENIX Security Symposium. Finn de Ridder, Pietro Frigo, Emanuele Vannacci, Herbert Bos, Cristiano Giuffrida, and Kaveh Razavi. 2021. SMASH: Synchronized Many-sided Rowhammer Attacks from JavaScript. In USENIX Security Symposium."},{"key":"e_1_3_2_1_14_1","volume-title":"USENIX Security Symposium.","author":"Disselkoen Craig","year":"2017","unstructured":"Craig Disselkoen , David Kohlbrenner , Leo Porter , and Dean\u00a0 M. Tullsen . 2017 . Prime+Abort: A Timer-Free High-Precision L3 Cache Attack using Intel TSX . In USENIX Security Symposium. Craig Disselkoen, David Kohlbrenner, Leo Porter, and Dean\u00a0M. Tullsen. 2017. Prime+Abort: A Timer-Free High-Precision L3 Cache Attack using Intel TSX. In USENIX Security Symposium."},{"key":"e_1_3_2_1_15_1","volume-title":"BranchScope: A new side-channel attack on directional branch predictor. ACM SIGPLAN Notices","author":"Evtyushkin Dmitry","year":"2018","unstructured":"Dmitry Evtyushkin , Ryan Riley , Nael Abu-Ghazaleh , and Dmitry Ponomarev . 2018. BranchScope: A new side-channel attack on directional branch predictor. ACM SIGPLAN Notices ( 2018 ). Dmitry Evtyushkin, Ryan Riley, Nael Abu-Ghazaleh, and Dmitry Ponomarev. 2018. BranchScope: A new side-channel attack on directional branch predictor. ACM SIGPLAN Notices (2018)."},{"key":"e_1_3_2_1_16_1","volume-title":"\u201ccross-origin isolated","author":"Making","unstructured":"Google. 2020. Making your website \u201ccross-origin isolated \u201d using COOP and COEP. https:\/\/web.dev\/coop-coep\/. Google. 2020. Making your website \u201ccross-origin isolated\u201d using COOP and COEP. https:\/\/web.dev\/coop-coep\/."},{"key":"e_1_3_2_1_17_1","unstructured":"Google. 2021. Align performance API timer resolution to cross-origin isolated capability - Chrome Platform Status. https:\/\/chromestatus.com\/feature\/6497206758539264.  Google. 2021. Align performance API timer resolution to cross-origin isolated capability - Chrome Platform Status. https:\/\/chromestatus.com\/feature\/6497206758539264."},{"key":"e_1_3_2_1_18_1","volume-title":"Translation Leak-aside Buffer: Defeating Cache Side-channel Protections with TLB Attacks. In USENIX Security Symposium.","author":"Gras Ben","year":"2018","unstructured":"Ben Gras , Kaveh Razavi , Herbert Bos , and Cristiano Giuffrida . 2018 . Translation Leak-aside Buffer: Defeating Cache Side-channel Protections with TLB Attacks. In USENIX Security Symposium. Ben Gras, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida. 2018. Translation Leak-aside Buffer: Defeating Cache Side-channel Protections with TLB Attacks. In USENIX Security Symposium."},{"key":"e_1_3_2_1_19_1","volume-title":"ASLR on the Line: Practical Cache Attacks on the MMU. In Network and Distributed System Security Symposium (NDSS).","author":"Gras Ben","year":"2017","unstructured":"Ben Gras , Kaveh Razavi , Erik Bosman , Herbert Bos , and Cristiano Giuffrida . 2017 . ASLR on the Line: Practical Cache Attacks on the MMU. In Network and Distributed System Security Symposium (NDSS). Ben Gras, Kaveh Razavi, Erik Bosman, Herbert Bos, and Cristiano Giuffrida. 2017. ASLR on the Line: Practical Cache Attacks on the MMU. In Network and Distributed System Security Symposium (NDSS)."},{"key":"e_1_3_2_1_20_1","volume-title":"Strong and Efficient Cache Side-channel Protection Using Hardware Transactional Memory. In USENIX Security Symposium.","author":"Gruss Daniel","year":"2017","unstructured":"Daniel Gruss , Julian Lettner , Felix Schuster , Olga Ohrimenko , Istvan Haller , and Manuel Costa . 2017 . Strong and Efficient Cache Side-channel Protection Using Hardware Transactional Memory. In USENIX Security Symposium. Daniel Gruss, Julian Lettner, Felix Schuster, Olga Ohrimenko, Istvan Haller, and Manuel Costa. 2017. Strong and Efficient Cache Side-channel Protection Using Hardware Transactional Memory. In USENIX Security Symposium."},{"key":"e_1_3_2_1_21_1","volume-title":"Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR. In ACM SIGSAC Conference on Computer and Communications Security (CCS).","author":"Gruss Daniel","year":"2016","unstructured":"Daniel Gruss , Cl\u00e9mentine Maurice , Anders Fogh , Moritz Lipp , and Stefan Mangard . 2016 . Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR. In ACM SIGSAC Conference on Computer and Communications Security (CCS). Daniel Gruss, Cl\u00e9mentine Maurice, Anders Fogh, Moritz Lipp, and Stefan Mangard. 2016. Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR. In ACM SIGSAC Conference on Computer and Communications Security (CCS)."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"crossref","unstructured":"Daniel Gruss Cl\u00e9mentine Maurice and Stefan Mangard. 2016. Rowhammer.js: A Remote Software-Induced Fault Attack in JavaScript. In Detection of Intrusions and Malware and Vulnerability Assessment (DIMVA).  Daniel Gruss Cl\u00e9mentine Maurice and Stefan Mangard. 2016. Rowhammer.js: A Remote Software-Induced Fault Attack in JavaScript. In Detection of Intrusions and Malware and Vulnerability Assessment (DIMVA).","DOI":"10.1007\/978-3-319-40667-1_15"},{"key":"e_1_3_2_1_23_1","volume-title":"Cache Template Attacks: Automating Attacks on Inclusive Last-level Caches. In USENIX Security Symposium.","author":"Gruss Daniel","year":"2015","unstructured":"Daniel Gruss , Raphael Spreitzer , and Stefan Mangard . 2015 . Cache Template Attacks: Automating Attacks on Inclusive Last-level Caches. In USENIX Security Symposium. Daniel Gruss, Raphael Spreitzer, and Stefan Mangard. 2015. Cache Template Attacks: Automating Attacks on Inclusive Last-level Caches. In USENIX Security Symposium."},{"key":"e_1_3_2_1_24_1","volume-title":"Leaky Way: A Conflict-Based Cache Covert Channel Bypassing Set Associativity. In IEEE\/ACM International Symposium on Microarchitecture (MICRO).","author":"Guo Yanan","year":"2022","unstructured":"Yanan Guo , Xin Xin , Youtao Zhang , and Jun Yang . 2022 . Leaky Way: A Conflict-Based Cache Covert Channel Bypassing Set Associativity. In IEEE\/ACM International Symposium on Microarchitecture (MICRO). Yanan Guo, Xin Xin, Youtao Zhang, and Jun Yang. 2022. Leaky Way: A Conflict-Based Cache Covert Channel Bypassing Set Associativity. In IEEE\/ACM International Symposium on Microarchitecture (MICRO)."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2013.23"},{"key":"e_1_3_2_1_26_1","unstructured":"Mehmet\u00a0Sinan Inci Berk Gulmezoglu Gorka Irazoqui Thomas Eisenbarth and Berk Sunar. 2016. Cache Attacks Enable Bulk Key Recovery on the Cloud. In Cryptographic Hardware and Embedded Systems (CHES).  Mehmet\u00a0Sinan Inci Berk Gulmezoglu Gorka Irazoqui Thomas Eisenbarth and Berk Sunar. 2016. Cache Attacks Enable Bulk Key Recovery on the Cloud. In Cryptographic Hardware and Embedded Systems (CHES)."},{"key":"e_1_3_2_1_27_1","unstructured":"Intel. 2019. Intel Transactional Synchronization Extensions (Intel TSX) Asynchronous Abort. https:\/\/software.intel.com\/security-software-guidance\/deep-dives\/deep-dive-intel-transactional-synchronization-extensions-intel-tsx-asynchronous-abort.  Intel. 2019. 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Kemerlis, Simha Sethumadhavan, and Angelos\u00a0D. Keromytis. 2015. The Spy in the Sandbox: Practical Cache Attacks in JavaScript and Their Implications. In ACM SIGSAC Conference on Computer and Communications Security (CCS)."},{"key":"e_1_3_2_1_46_1","volume-title":"RSA Conference on Topics in Cryptology (CT-RSA).","author":"Osvik Dag\u00a0Arne","year":"2006","unstructured":"Dag\u00a0Arne Osvik , Adi Shamir , and Eran Tromer . 2006 . Cache Attacks and Countermeasures: The Case of AES. In Cryptographers\u2019 Track at the RSA Conference on Topics in Cryptology (CT-RSA). Dag\u00a0Arne Osvik, Adi Shamir, and Eran Tromer. 2006. Cache Attacks and Countermeasures: The Case of AES. In Cryptographers\u2019 Track at the RSA Conference on Topics in Cryptology (CT-RSA)."},{"key":"e_1_3_2_1_47_1","volume-title":"USENIX Security Symposium.","author":"Paccagnella Riccardo","year":"2021","unstructured":"Riccardo Paccagnella , Licheng Luo , and Christopher\u00a0 W. Fletcher . 2021 . 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Peter Pessl, Daniel Gruss, Cl\u00e9mentine Maurice, Michael Schwarz, and Stefan Mangard. 2016. DRAMA: Exploiting DRAM Addressing for Cross-cpu Attacks. In USENIX Security Symposium."},{"key":"e_1_3_2_1_50_1","volume-title":"Systematic Analysis of Randomization-based Protected Cache Architectures. In IEEE Symposium on Security and Privacy (S&P).","author":"Purnal Antoon","year":"2021","unstructured":"Antoon Purnal , Lukas Giner , Daniel Gruss , and Ingrid Verbauwhede . 2021 . Systematic Analysis of Randomization-based Protected Cache Architectures. In IEEE Symposium on Security and Privacy (S&P). Antoon Purnal, Lukas Giner, Daniel Gruss, and Ingrid Verbauwhede. 2021. Systematic Analysis of Randomization-based Protected Cache Architectures. In IEEE Symposium on Security and Privacy (S&P)."},{"key":"e_1_3_2_1_51_1","volume-title":"ACM SIGSAC Conference on Computer and Communications Security (CCS).","author":"Purnal Antoon","year":"2021","unstructured":"Antoon Purnal , Furkan Turan , and Ingrid Verbauwhede . 2021 . Prime+Scope: Overcoming the Observer Effect for High-Precision Cache Contention Attacks . In ACM SIGSAC Conference on Computer and Communications Security (CCS). Antoon Purnal, Furkan Turan, and Ingrid Verbauwhede. 2021. Prime+Scope: Overcoming the Observer Effect for High-Precision Cache Contention Attacks. In ACM SIGSAC Conference on Computer and Communications Security (CCS)."},{"key":"e_1_3_2_1_52_1","volume-title":"Double Trouble: Combined Heterogeneous Attacks on Non-inclusive Cache Hierarchies. In USENIX Security Symposium.","author":"Purnal Antoon","year":"2022","unstructured":"Antoon Purnal , Furkan Turan , and Ingrid Verbauwhede . 2022 . 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Port Contention Goes Portable: Port Contention Side Channels in Web Browsers. In ACM SIGSAC Asia Conference on Computer and Communications Security (AsiaCCS)."},{"key":"e_1_3_2_1_55_1","volume-title":"Sok: In Search of Lost Time: A Review of JavaScript Timers in Browsers. In IEEE European Symposium on Security and Privacy (EuroS&P).","author":"Rokicki Thomas","year":"2021","unstructured":"Thomas Rokicki , Cl\u00e9mentine Maurice , and Pierre Laperdrix . 2021 . Sok: In Search of Lost Time: A Review of JavaScript Timers in Browsers. In IEEE European Symposium on Security and Privacy (EuroS&P). Thomas Rokicki, Cl\u00e9mentine Maurice, and Pierre Laperdrix. 2021. Sok: In Search of Lost Time: A Review of JavaScript Timers in Browsers. In IEEE European Symposium on Security and Privacy (EuroS&P)."},{"key":"e_1_3_2_1_56_1","unstructured":"Stephen R\u00f6ttger and Artur Janc. 2021. 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In Financial Cryptography and Data Security.","DOI":"10.1007\/978-3-319-70972-7_13"},{"key":"e_1_3_2_1_58_1","doi-asserted-by":"crossref","unstructured":"Michael Schwarz Samuel Weiser Daniel Gruss Cl\u00e9mentine Maurice and Stefan Mangard. 2017. Malware Guard Extension: Using SGX to Conceal Cache Attacks. In Detection of Intrusions and Malware and Vulnerability Assessment (DIMVA).  Michael Schwarz Samuel Weiser Daniel Gruss Cl\u00e9mentine Maurice and Stefan Mangard. 2017. Malware Guard Extension: Using SGX to Conceal Cache Attacks. In Detection of Intrusions and Malware and Vulnerability Assessment (DIMVA).","DOI":"10.1007\/978-3-319-60876-1_1"},{"key":"e_1_3_2_1_59_1","volume-title":"Robust and Scalable Process Isolation Against Spectre in the Cloud. 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In USENIX Security Symposium."}],"event":{"name":"ASIA CCS '23: ACM ASIA Conference on Computer and Communications Security","location":"Melbourne VIC Australia","acronym":"ASIA CCS '23","sponsor":["SIGSAC ACM Special Interest Group on Security, Audit, and Control"]},"container-title":["Proceedings of the ACM Asia Conference on Computer and Communications Security"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3579856.3590332","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T18:08:16Z","timestamp":1750183696000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3579856.3590332"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,10]]},"references-count":79,"alternative-id":["10.1145\/3579856.3590332","10.1145\/3579856"],"URL":"https:\/\/doi.org\/10.1145\/3579856.3590332","relation":{},"subject":[],"published":{"date-parts":[[2023,7,10]]},"assertion":[{"value":"2023-07-10","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}