{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:14:12Z","timestamp":1750220052174,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":87,"publisher":"ACM","license":[{"start":{"date-parts":[[2023,7,10]],"date-time":"2023-07-10T00:00:00Z","timestamp":1688947200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"Shenzhen Science and Technology Program","award":["SGDX20201103095408029"],"award-info":[{"award-number":["SGDX20201103095408029"]}]},{"name":"National Science Foundation of China","award":["62002151"],"award-info":[{"award-number":["62002151"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2023,7,10]]},"DOI":"10.1145\/3579856.3595803","type":"proceedings-article","created":{"date-parts":[[2023,7,5]],"date-time":"2023-07-05T14:52:13Z","timestamp":1688568733000},"page":"190-204","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["FlushTime: Towards Mitigating Flush-based Cache Attacks via Collaborating Flush Instructions and Timers on ARMv8-A"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9879-0260","authenticated-orcid":false,"given":"Jingquan","family":"Ge","sequence":"first","affiliation":[{"name":"Research Institute of Trustworthy Autonomous Systems, Southern University of Science and Technology, China and Department of Computer Science and Engineering, Southern University of Science and Technology, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3365-2526","authenticated-orcid":false,"given":"Fengwei","family":"Zhang","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, Southern University of Science and Technology, China and Research Institute of Trustworthy Autonomous Systems, Southern University of Science and Technology, China"}]}],"member":"320","published-online":{"date-parts":[[2023,7,10]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"[\n  1\n  ]  2016. https:\/\/github.com\/openssl\/openssl\/blob\/OpenSSL_1_1_0\/crypto\/aes\/aes_core.c. (2016).  [1] 2016. https:\/\/github.com\/openssl\/openssl\/blob\/OpenSSL_1_1_0\/crypto\/aes\/aes_core.c. (2016)."},{"volume-title":"RSA Conference 2007, San Francisco, CA, USA, February 5-9, 2007, Proceedings.","author":"Acii\u00e7mez Onur","key":"e_1_3_2_1_2_1","unstructured":"Onur Acii\u00e7mez , Werner Schindler , and \u00c7etin\u00a0Kaya Ko\u00e7 . Cache Based Remote Timing Attack on the AES. In Topics in Cryptology - CT-RSA 2007, The Cryptographers\u2019 Track at the RSA Conference 2007, San Francisco, CA, USA, February 5-9, 2007, Proceedings. Onur Acii\u00e7mez, Werner Schindler, and \u00c7etin\u00a0Kaya Ko\u00e7. Cache Based Remote Timing Attack on the AES. In Topics in Cryptology - CT-RSA 2007, The Cryptographers\u2019 Track at the RSA Conference 2007, San Francisco, CA, USA, February 5-9, 2007, Proceedings."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480074"},{"key":"e_1_3_2_1_4_1","volume-title":"47th ACM\/IEEE Annual International Symposium on Computer Architecture, ISCA 2020","author":"Ainsworth Sam","year":"2020","unstructured":"Sam Ainsworth and Timothy\u00a0 M. Jones . 2020 . MuonTrap: Preventing Cross-Domain Spectre-Like Attacks by Capturing Speculative State . In 47th ACM\/IEEE Annual International Symposium on Computer Architecture, ISCA 2020 , Valencia, Spain, May 30 - June 3, 2020. IEEE, 132\u2013144. Sam Ainsworth and Timothy\u00a0M. Jones. 2020. MuonTrap: Preventing Cross-Domain Spectre-Like Attacks by Capturing Speculative State. In 47th ACM\/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, Valencia, Spain, May 30 - June 3, 2020. IEEE, 132\u2013144."},{"key":"e_1_3_2_1_5_1","unstructured":"ARM. 2021. Arm Architecture Reference Manual Armv8 for A-profile architecture. https:\/\/developer.arm.com\/documentation\/ddi0487\/gb. (2021).  ARM. 2021. Arm Architecture Reference Manual Armv8 for A-profile architecture. https:\/\/developer.arm.com\/documentation\/ddi0487\/gb. (2021)."},{"key":"e_1_3_2_1_6_1","unstructured":"ARM. 2021. Vulnerability of Speculative Processors to Cache Timing Side-Channel Mechanism. https:\/\/developer.arm.com\/support\/security-updates\/speculative-processor-vulnerability. (2021).  ARM. 2021. Vulnerability of Speculative Processors to Cache Timing Side-Channel Mechanism. https:\/\/developer.arm.com\/support\/security-updates\/speculative-processor-vulnerability. (2021)."},{"key":"e_1_3_2_1_7_1","unstructured":"Daniel\u00a0J. Bernstein. 2005. Cache-Timing Attacks on AES. https:\/\/cr.yp.to\/antiforgery\/cachetiming-20050414.pdf. (2005).  Daniel\u00a0J. Bernstein. 2005. Cache-Timing Attacks on AES. https:\/\/cr.yp.to\/antiforgery\/cachetiming-20050414.pdf. (2005)."},{"key":"e_1_3_2_1_8_1","first-page":"235","article-title":"Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs","volume":"2010","author":"Bogdanov Andrey","year":"2010","unstructured":"Andrey Bogdanov , Thomas Eisenbarth , Christof Paar , and Malte Wienecke . 2010 . Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs . In CT-RSA 2010. 235 \u2013 251 . Andrey Bogdanov, Thomas Eisenbarth, Christof Paar, and Malte Wienecke. 2010. Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs. In CT-RSA 2010. 235\u2013251.","journal-title":"CT-RSA"},{"key":"e_1_3_2_1_9_1","volume-title":"27th USENIX Security Symposium, USENIX Security 2018","author":"Bulck Jo\u00a0Van","year":"2018","unstructured":"Jo\u00a0Van Bulck , Marina Minkin , Ofir Weisse , Daniel Genkin , Baris Kasikci , Frank Piessens , Mark Silberstein , Thomas\u00a0 F. Wenisch , Yuval Yarom , and Raoul Strackx . Foreshadow : Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution . In 27th USENIX Security Symposium, USENIX Security 2018 , Baltimore, MD, USA , August 15-17, 2018 . Jo\u00a0Van Bulck, Marina Minkin, Ofir Weisse, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Thomas\u00a0F. Wenisch, Yuval Yarom, and Raoul Strackx. Foreshadow: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution. In 27th USENIX Security Symposium, USENIX Security 2018, Baltimore, MD, USA, August 15-17, 2018."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.asoc.2016.09.014"},{"key":"e_1_3_2_1_11_1","unstructured":"Chromium. 2015. window.performance.now does not support sub-millisecond precision on Windows. https:\/\/bugs.chromium.org\/p\/chromium\/issues\/detail?id=158234#c110. (2015).  Chromium. 2015. window.performance.now does not support sub-millisecond precision on Windows. https:\/\/bugs.chromium.org\/p\/chromium\/issues\/detail?id=158234#c110. (2015)."},{"key":"e_1_3_2_1_12_1","unstructured":"The Linux\u00a0Kernel community. 2023. Kernel-based Virtual Machine. https:\/\/en.wikipedia.org\/wiki\/Kernel-based_Virtual_Machine. (2023).  The Linux\u00a0Kernel community. 2023. Kernel-based Virtual Machine. https:\/\/en.wikipedia.org\/wiki\/Kernel-based_Virtual_Machine. (2023)."},{"key":"e_1_3_2_1_13_1","unstructured":"Oracle Corporation. 2023. VirtualBox. https:\/\/en.wikipedia.org\/wiki\/VirtualBox. (2023).  Oracle Corporation. 2023. VirtualBox. https:\/\/en.wikipedia.org\/wiki\/VirtualBox. (2023)."},{"key":"e_1_3_2_1_14_1","unstructured":"Will Deacon. 2018. arm64: Add skeleton to harden the branch predictor against aliasing attacks. https:\/\/patchwork.kernel.org\/project\/linux-arm-kernel\/patch\/4349161f0ed572bbc6bff64bad94aa96d07b27ff.1562908075.git.viresh.kumar@linaro.org\/. (2018).  Will Deacon. 2018. arm64: Add skeleton to harden the branch predictor against aliasing attacks. https:\/\/patchwork.kernel.org\/project\/linux-arm-kernel\/patch\/4349161f0ed572bbc6bff64bad94aa96d07b27ff.1562908075.git.viresh.kumar@linaro.org\/. (2018)."},{"key":"e_1_3_2_1_15_1","unstructured":"Inc. Docker. 2023. Docker (software). https:\/\/en.wikipedia.org\/wiki\/Docker_(software). (2023).  Inc. Docker. 2023. Docker (software). https:\/\/en.wikipedia.org\/wiki\/Docker_(software). (2023)."},{"key":"e_1_3_2_1_16_1","volume-title":"57th ACM\/IEEE Design Automation Conference, DAC 2020","author":"Fang Hongyu","year":"2020","unstructured":"Hongyu Fang , Milos Doroslovacki , and Guru Venkataramani . Reuse-trap : Re-purposing Cache Reuse Distance to Defend against Side Channel Leakage . In 57th ACM\/IEEE Design Automation Conference, DAC 2020 , San Francisco, CA, USA , July 20-24, 2020 . Hongyu Fang, Milos Doroslovacki, and Guru Venkataramani. Reuse-trap: Re-purposing Cache Reuse Distance to Defend against Side Channel Leakage. In 57th ACM\/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020."},{"key":"e_1_3_2_1_17_1","unstructured":"Linux Foundation. 2023. Xen. https:\/\/en.wikipedia.org\/wiki\/Xen. (2023).  Linux Foundation. 2023. Xen. https:\/\/en.wikipedia.org\/wiki\/Xen. (2023)."},{"key":"e_1_3_2_1_18_1","unstructured":"Raspberry\u00a0Pi Foundation. 2023. Raspberry Pi 4: Your tiny dual-display desktop computer. https:\/\/www.raspberrypi.com\/products\/raspberry-pi-4-model-b\/. (2023).  Raspberry\u00a0Pi Foundation. 2023. Raspberry Pi 4: Your tiny dual-display desktop computer. https:\/\/www.raspberrypi.com\/products\/raspberry-pi-4-model-b\/. (2023)."},{"key":"e_1_3_2_1_19_1","volume-title":"Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019","author":"Fustos Jacob","year":"2019","unstructured":"Jacob Fustos , Farzad Farshchi , and Heechul Yun . SpectreGuard : An Efficient Data-centric Defense Mechanism against Spectre Attacks . In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019 , Las Vegas, NV, USA , June 02-06, 2019 . Jacob Fustos, Farzad Farshchi, and Heechul Yun. SpectreGuard: An Efficient Data-centric Defense Mechanism against Spectre Attacks. In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019."},{"key":"e_1_3_2_1_20_1","volume-title":"26th Asia-Pacific Software Engineering Conference, APSEC 2019","author":"Ge Jingquan","year":"2019","unstructured":"Jingquan Ge , Neng Gao , Chenyang Tu , Ji Xiang , and Zeyi Liu . More Secure Collaborative APIs Resistant to Flush+Reload and Flush+Flush Attacks on ARMv8-A . In 26th Asia-Pacific Software Engineering Conference, APSEC 2019 , Putrajaya, Malaysia , December 2-5, 2019 . Jingquan Ge, Neng Gao, Chenyang Tu, Ji Xiang, and Zeyi Liu. More Secure Collaborative APIs Resistant to Flush+Reload and Flush+Flush Attacks on ARMv8-A. In 26th Asia-Pacific Software Engineering Conference, APSEC 2019, Putrajaya, Malaysia, December 2-5, 2019."},{"key":"e_1_3_2_1_21_1","volume-title":"Computer Security - 23rd European Symposium on Research in Computer Security, ESORICS","author":"Ge Jingquan","year":"2018","unstructured":"Jingquan Ge , Neng Gao , Chenyang Tu , Ji Xiang , Zeyi Liu , and Jun Yuan . Combination of Hardware and Software: An Efficient AES Implementation Resistant to Side-Channel Attacks on All Programmable SoC . In Computer Security - 23rd European Symposium on Research in Computer Security, ESORICS 2018 , Barcelona, Spain, September 3-7, 2018, Proceedings, Part I. Jingquan Ge, Neng Gao, Chenyang Tu, Ji Xiang, Zeyi Liu, and Jun Yuan. Combination of Hardware and Software: An Efficient AES Implementation Resistant to Side-Channel Attacks on All Programmable SoC. In Computer Security - 23rd European Symposium on Research in Computer Security, ESORICS 2018, Barcelona, Spain, September 3-7, 2018, Proceedings, Part I."},{"key":"e_1_3_2_1_22_1","volume-title":"Cristiano Giuffrida. ASLR on the Line: Practical Cache Attacks on the MMU. In 24th Annual Network and Distributed System Security Symposium, NDSS 2017","author":"Gras Ben","year":"2017","unstructured":"Ben Gras , Kaveh Razavi , Erik Bosman , Herbert Bos , and Cristiano Giuffrida. ASLR on the Line: Practical Cache Attacks on the MMU. In 24th Annual Network and Distributed System Security Symposium, NDSS 2017 , San Diego, California, USA, February 26 - March 1, 2017 . Ben Gras, Kaveh Razavi, Erik Bosman, Herbert Bos, and Cristiano Giuffrida. ASLR on the Line: Practical Cache Attacks on the MMU. In 24th Annual Network and Distributed System Security Symposium, NDSS 2017, San Diego, California, USA, February 26 - March 1, 2017."},{"volume-title":"ESSoS 2017, Bonn, Germany, July 3-5, 2017, Proceedings.","author":"Gruss Daniel","key":"e_1_3_2_1_23_1","unstructured":"Daniel Gruss , Moritz Lipp , Michael Schwarz , Richard Fellner , Cl\u00e9mentine Maurice , and Stefan Mangard . KASLR is Dead: Long Live KASLR. In Engineering Secure Software and Systems - 9th International Symposium , ESSoS 2017, Bonn, Germany, July 3-5, 2017, Proceedings. Daniel Gruss, Moritz Lipp, Michael Schwarz, Richard Fellner, Cl\u00e9mentine Maurice, and Stefan Mangard. KASLR is Dead: Long Live KASLR. In Engineering Secure Software and Systems - 9th International Symposium, ESSoS 2017, Bonn, Germany, July 3-5, 2017, Proceedings."},{"key":"e_1_3_2_1_24_1","volume-title":"Stefan Mangard. Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR. In Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security","author":"Gruss Daniel","year":"2016","unstructured":"Daniel Gruss , Cl\u00e9mentine Maurice , Anders Fogh , Moritz Lipp , and Stefan Mangard. Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR. In Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security , Vienna, Austria , October 24-28, 2016 . Daniel Gruss, Cl\u00e9mentine Maurice, Anders Fogh, Moritz Lipp, and Stefan Mangard. Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR. In Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security, Vienna, Austria, October 24-28, 2016."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-40667-1_14"},{"key":"e_1_3_2_1_26_1","first-page":"897","article-title":"Cache Template Attacks","volume":"15","author":"Gruss Daniel","year":"2015","unstructured":"Daniel Gruss , Raphael Spreitzer , and Stefan Mangard . 2015 . Cache Template Attacks : Automating Attacks on Inclusive Last-Level Caches. In USENIX Security 15 . 897 \u2013 912 . Daniel Gruss, Raphael Spreitzer, and Stefan Mangard. 2015. Cache Template Attacks: Automating Attacks on Inclusive Last-Level Caches. In USENIX Security 15.897\u2013912.","journal-title":"Automating Attacks on Inclusive Last-Level Caches. In USENIX Security"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2011.22"},{"key":"e_1_3_2_1_28_1","unstructured":"Red Hat. 2022. kpatch. https:\/\/en.wikipedia.org\/wiki\/Kpatch. (2022).  Red Hat. 2022. kpatch. https:\/\/en.wikipedia.org\/wiki\/Kpatch. (2022)."},{"key":"e_1_3_2_1_29_1","unstructured":"HiSilicon. 2020. Kunpeng 920-4826 - HiSilicon. https:\/\/en.wikichip.org\/wiki\/hisilicon\/kunpeng\/920-4826. (2020).  HiSilicon. 2020. Kunpeng 920-4826 - HiSilicon. https:\/\/en.wikichip.org\/wiki\/hisilicon\/kunpeng\/920-4826. (2020)."},{"key":"e_1_3_2_1_30_1","unstructured":"Jann Horn. 2018. speculative execution variant 4: speculative store bypass. https:\/\/bugs.chromium.org\/p\/project-zero\/issues\/detail?id=1528. (2018).  Jann Horn. 2018. speculative execution variant 4: speculative store bypass. https:\/\/bugs.chromium.org\/p\/project-zero\/issues\/detail?id=1528. (2018)."},{"key":"e_1_3_2_1_31_1","volume-title":"2018 USENIX Annual Technical Conference, USENIX ATC 2018","author":"Hua Zhichao","year":"2018","unstructured":"Zhichao Hua , Dong Du , Yubin Xia , Haibo Chen , and Binyu Zang . EPTI : Efficient Defence against Meltdown Attack for Unpatched VMs . In 2018 USENIX Annual Technical Conference, USENIX ATC 2018 , Boston, MA, USA , July 11-13, 2018 . Zhichao Hua, Dong Du, Yubin Xia, Haibo Chen, and Binyu Zang. EPTI: Efficient Defence against Meltdown Attack for Unpatched VMs. In 2018 USENIX Annual Technical Conference, USENIX ATC 2018, Boston, MA, USA, July 11-13, 2018."},{"key":"e_1_3_2_1_32_1","unstructured":"Huawei. 2021. Select the Best Servers for Your Business. https:\/\/e.huawei.com\/en\/products\/servers\/taishan-server. (2021).  Huawei. 2021. Select the Best Servers for Your Business. https:\/\/e.huawei.com\/en\/products\/servers\/taishan-server. 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In Proceedings of the Eighth ACM Conference on Data and Application Security and Privacy, CODASPY 2018 , Tempe, AZ, USA , March 19-21, 2018 . Gorka Irazoqui, Thomas Eisenbarth, and Berk Sunar. MASCAT: Preventing Microarchitectural Attacks Before Distribution. In Proceedings of the Eighth ACM Conference on Data and Application Security and Privacy, CODASPY 2018, Tempe, AZ, USA, March 19-21, 2018."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"crossref","unstructured":"John Kelsey Bruce Schneier David\u00a0A. Wagner and Chris Hall. 1998. Side Channel Cryptanalysis of Product Ciphers. In ESORICS 98. 97\u2013110.  John Kelsey Bruce Schneier David\u00a0A. Wagner and Chris Hall. 1998. Side Channel Cryptanalysis of Product Ciphers. In ESORICS 98. 97\u2013110.","DOI":"10.1007\/BFb0055858"},{"key":"e_1_3_2_1_37_1","volume-title":"Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019","author":"Khasawneh N.","year":"2019","unstructured":"Khaled\u00a0 N. Khasawneh , Esmaeil\u00a0Mohammadian Koruyeh , Chengyu Song , Dmitry Evtyushkin , Dmitry Ponomarev , and Nael\u00a0 B. Abu-Ghazaleh . SafeSpec : Banishing the Spectre of a Meltdown with Leakage-Free Speculation . In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019 , Las Vegas, NV, USA , June 02-06, 2019 . Khaled\u00a0N. Khasawneh, Esmaeil\u00a0Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, and Nael\u00a0B. Abu-Ghazaleh. SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation. In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019."},{"key":"e_1_3_2_1_38_1","unstructured":"Konstantin Khlebnikov. 2015. pagemap: update documentation. https:\/\/www.kernel.org\/doc\/Documentation\/vm\/pagemap.txt. (2015).  Konstantin Khlebnikov. 2015. pagemap: update documentation. https:\/\/www.kernel.org\/doc\/Documentation\/vm\/pagemap.txt. (2015)."},{"key":"e_1_3_2_1_39_1","volume-title":"Speculative Buffer Overflows: Attacks and Defenses. CoRR abs\/1807.03757","author":"Kiriansky Vladimir","year":"2018","unstructured":"Vladimir Kiriansky and Carl\u00a0 A. Waldspurger . 2018. Speculative Buffer Overflows: Attacks and Defenses. CoRR abs\/1807.03757 ( 2018 ). arXiv:1807.03757http:\/\/arxiv.org\/abs\/1807.03757 Vladimir Kiriansky and Carl\u00a0A. Waldspurger. 2018. Speculative Buffer Overflows: Attacks and Defenses. CoRR abs\/1807.03757 (2018). arXiv:1807.03757http:\/\/arxiv.org\/abs\/1807.03757"},{"key":"e_1_3_2_1_40_1","volume-title":"Spectre Attacks: Exploiting Speculative Execution. In (S&P\u201919).","author":"Kocher Paul","year":"2019","unstructured":"Paul Kocher , Jann Horn , Anders Fogh , Daniel Genkin , Daniel Gruss , Werner Haas , Mike Hamburg , Moritz Lipp , Stefan Mangard , Thomas Prescher , Michael Schwarz , and Yuval Yarom . 2019 . Spectre Attacks: Exploiting Speculative Execution. In (S&P\u201919). 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Speculation Attacks using the Return Stack Buffer . In 12th USENIX Workshop on Offensive Technologies, WOOT 2018 , Baltimore, MD, USA , August 13-14, 2018 . Esmaeil\u00a0Mohammadian Koruyeh, Khaled\u00a0N. Khasawneh, Chengyu Song, and Nael\u00a0B. Abu-Ghazaleh. Spectre Returns! Speculation Attacks using the Return Stack Buffer. In 12th USENIX Workshop on Offensive Technologies, WOOT 2018, Baltimore, MD, USA, August 13-14, 2018."},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00033"},{"key":"e_1_3_2_1_44_1","volume-title":"25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019","author":"Li Peinan","year":"2019","unstructured":"Peinan Li , Lutan Zhao , Rui Hou , Lixin Zhang , and Dan Meng . Conditional Speculation : An Effective Approach to Safeguard Out-of-Order Execution Against Spectre Attacks . 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In USENIX Security"},{"key":"e_1_3_2_1_46_1","volume-title":"Meltdown: Reading Kernel Memory from User Space. In USENIX Security 18.","author":"Lipp Moritz","year":"2018","unstructured":"Moritz Lipp , Michael Schwarz , Daniel Gruss , Thomas Prescher , Werner Haas , Anders Fogh , Jann Horn , Stefan Mangard , Paul Kocher , Daniel Genkin , Yuval Yarom , and Mike Hamburg . 2018 . Meltdown: Reading Kernel Memory from User Space. In USENIX Security 18. Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Anders Fogh, Jann Horn, Stefan Mangard, Paul Kocher, Daniel Genkin, Yuval Yarom, and Mike Hamburg. 2018. Meltdown: Reading Kernel Memory from User Space. In USENIX Security 18."},{"key":"e_1_3_2_1_47_1","unstructured":"H.J. Lu. 2018. [PATCH 0\/5] x86: CVE-2017-5715 aka Spectre. https:\/\/gcc.gnu.org\/ml\/gcc-patches\/2018-01\/msg00422.html. (2018).  H.J. Lu. 2018. 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In IEEE European Symposium on Security and Privacy, EuroS&P 2021","author":"Rokicki Thomas","year":"2021","unstructured":"Thomas Rokicki , Cl\u00e9mentine Maurice , and Pierre Laperdrix. SoK: In Search of Lost Time: A Review of JavaScript Timers in Browsers. In IEEE European Symposium on Security and Privacy, EuroS&P 2021 , Vienna, Austria , September 6-10, 2021 . Thomas Rokicki, Cl\u00e9mentine Maurice, and Pierre Laperdrix. SoK: In Search of Lost Time: A Review of JavaScript Timers in Browsers. In IEEE European Symposium on Security and Privacy, EuroS&P 2021, Vienna, Austria, September 6-10, 2021."},{"key":"e_1_3_2_1_59_1","volume-title":"30th USENIX Security Symposium, USENIX Security 2021","author":"Saileshwar Gururaj","year":"2021","unstructured":"Gururaj Saileshwar and Moinuddin\u00a0 K. Qureshi . MIRAGE : Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design . In 30th USENIX Security Symposium, USENIX Security 2021 , August 11-13, 2021 . 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(2020)."}],"event":{"name":"ASIA CCS '23: ACM ASIA Conference on Computer and Communications Security","sponsor":["SIGSAC ACM Special Interest Group on Security, Audit, and Control"],"location":"Melbourne VIC Australia","acronym":"ASIA CCS '23"},"container-title":["Proceedings of the ACM Asia Conference on Computer and Communications Security"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3579856.3595803","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T18:08:17Z","timestamp":1750183697000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3579856.3595803"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7,10]]},"references-count":87,"alternative-id":["10.1145\/3579856.3595803","10.1145\/3579856"],"URL":"https:\/\/doi.org\/10.1145\/3579856.3595803","relation":{},"subject":[],"published":{"date-parts":[[2023,7,10]]},"assertion":[{"value":"2023-07-10","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}