{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,17]],"date-time":"2026-02-17T15:01:55Z","timestamp":1771340515616,"version":"3.50.1"},"reference-count":34,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2023,6,21]],"date-time":"2023-06-21T00:00:00Z","timestamp":1687305600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2023,7,31]]},"abstract":"<jats:p>System-on-chip (SoC) developers increasingly rely on pre-verified hardware intellectual property (IP) blocks often acquired from untrusted third-party vendors. These IPs might contain hidden malicious functionalities or hardware Trojans that may compromise the security of the fabricated SoCs. Lack of golden or reference models and vast possible Trojan attack space form some of the major barriers in detecting hardware Trojans in these third-party IP (3PIP) blocks. Recently, supervised machine learning (ML) techniques have shown promising capability in identifying nets of potential Trojans in 3PIPs without the need for golden models. However, they bring several major challenges. First, they do not guide us to an optimal choice of features that reliably covers diverse classes of Trojans. Second, they require multiple Trojan-free\/trusted designs to insert known Trojans and generate a trained model. Even if a set of trusted designs are available for training, the suspect IP can have an inherently very different structure from the set of trusted designs, which may negatively impact the verification outcome. Third, these techniques only identify a set of suspect Trojan nets that require manual intervention to understand the potential threat. In this article, we present VIPR, a systematic machine learning (ML)-based trust verification solution for 3PIPs that eliminates the need for trusted designs for training. We present a comprehensive framework, associated algorithms, and a tool flow for obtaining an optimal set of features, training a targeted machine learning model, detecting suspect nets, and identifying Trojan circuitry from the suspect nets. We evaluate the framework on several Trust-Hub Trojan benchmarks and provide a comparative analysis of detection performance across different trained models, selection of features, and post-processing techniques. We demonstrate promising Trojan detection accuracy for VIPR with up to 92.85% reduction in false positives by the proposed post-processing algorithm.<\/jats:p>","DOI":"10.1145\/3592795","type":"journal-article","created":{"date-parts":[[2023,4,18]],"date-time":"2023-04-18T12:38:06Z","timestamp":1681821486000},"page":"1-23","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["Hardware IP Assurance against Trojan Attacks with Machine Learning and Post-processing"],"prefix":"10.1145","volume":"19","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0127-0902","authenticated-orcid":false,"given":"Pravin","family":"Gaikwad","sequence":"first","affiliation":[{"name":"University of Florida, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7404-9259","authenticated-orcid":false,"given":"Jonathan","family":"Cruz","sequence":"additional","affiliation":[{"name":"University of Florida, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5102-4200","authenticated-orcid":false,"given":"Prabuddha","family":"Chakraborty","sequence":"additional","affiliation":[{"name":"University of Florida, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6082-6961","authenticated-orcid":false,"given":"Swarup","family":"Bhunia","sequence":"additional","affiliation":[{"name":"University of Florida, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6845-0361","authenticated-orcid":false,"given":"Tamzidul","family":"Hoque","sequence":"additional","affiliation":[{"name":"University of Kansas, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2023,6,21]]},"reference":[{"key":"e_1_3_1_2_2","unstructured":"David Kanter. 2016. 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MERO: A statistical approach for hardware Trojan detection. In International Workshop on Cryptographic Hardware and Embedded Systems. Springer, 396\u2013410."},{"key":"e_1_3_1_7_2","first-page":"396","volume-title":"Cryptographic Hardware and Embedded Systems (CHES\u201909)","author":"Chakraborty Rajat Subhra","year":"2009","unstructured":"Rajat Subhra Chakraborty, Francis Wolff, Somnath Paul, Christos Papachristou, and Swarup Bhunia. 2009. MERO: A statistical approach for hardware Trojan detection. In Cryptographic Hardware and Embedded Systems (CHES\u201909), Christophe Clavier and Kris Gaj (Eds.). Springer, Berlin,396\u2013410."},{"key":"e_1_3_1_8_2","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342270"},{"key":"e_1_3_1_9_2","first-page":"173","volume-title":"International Workshop on Cryptographic Hardware and Embedded Systems","author":"Du Dongdong","year":"2010","unstructured":"Dongdong Du, Seetharam Narasimhan, Rajat Subhra Chakraborty, and Swarup Bhunia. 2010. Self-referencing: A scalable side-channel approach for hardware Trojan detection. In International Workshop on Cryptographic Hardware and Embedded Systems. Springer, 173\u2013187."},{"key":"e_1_3_1_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2018.2812183"},{"key":"e_1_3_1_11_2","doi-asserted-by":"publisher","DOI":"10.1145\/800139.804528"},{"key":"e_1_3_1_12_2","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2747939"},{"key":"e_1_3_1_13_2","doi-asserted-by":"crossref","first-page":"203","DOI":"10.1109\/IOLTS.2016.7604700","volume-title":"2016 IEEE 22nd International Symposium on On-line Testing and Robust System Design (IOLTS\u201916)","author":"Hasegawa Kento","year":"2016","unstructured":"Kento Hasegawa, Masaru Oya, Masao Yanagisawa, and Nozomu Togawa. 2016. Hardware Trojans classification for gate-level netlists based on machine learning. In 2016 IEEE 22nd International Symposium on On-line Testing and Robust System Design (IOLTS\u201916). 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