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Syst."],"published-print":{"date-parts":[[2023,10,31]]},"abstract":"<jats:p>Approximate computing (AxC) provides the scope for achieving disproportionate gains in a system\u2019s power, performance, and area (PPA) metrics by leveraging an application\u2019s inherent error-resilient behavior (BEHAV). Trading computational accuracy for performance gains makes AxC an attractive proposition for implementing computationally complex AI\/ML-based applications on resource-constrained embedded systems. The growing diversity of application domains using AI\/ML has also led to the increasing usage of FPGA-based embedded systems. However, implementing AxC for FPGAs has primarily been limited to the post-processing of ASIC-optimized approximate operators (AxOs). This approach usually involves selecting from a set of AxOs that have been optimized for a gate-based implementation in an ASIC. While such an approach does allow leveraging existing knowledge of ASIC-based AxO design, it limits the scope for considering the challenges and opportunities associated with FPGA\u2019s LUT-based computation structures. Similarly, the few works considering the LUT-based computing for AxO design use generic optimization approaches that do not allow integrating problem-specific prior knowledge\u2014empirical and\/or statistical. To this end, we propose a novel tree search-based approach to AxO synthesis for FPGAs. Specifically, we present a design methodology using Monte Carlo Tree Search (MCTS)-based search tree traversal that allows the designer to integrate statistical data, such as correlation, into the AxOs optimization. With the proposed methods, we report improvements over standard MCTS algorithm-based results as well as improved hypervolume for both operator-level and application-specific DSE, compared to state-of-the-art design methodologies.<\/jats:p>","DOI":"10.1145\/3609096","type":"journal-article","created":{"date-parts":[[2023,9,9]],"date-time":"2023-09-09T13:33:18Z","timestamp":1694266398000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["<i>AxOTreeS<\/i>\n            : A\n            <u>Tree<\/u>\n            <u>S<\/u>\n            earch Approach to Synthesizing FPGA-based\n            <u>A<\/u>\n            ppro\n            <u>x<\/u>\n            imate\n            <u>O<\/u>\n            perators"],"prefix":"10.1145","volume":"22","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2243-5350","authenticated-orcid":false,"given":"Siva Satyendra","family":"Sahoo","sequence":"first","affiliation":[{"name":"Interuniversity Microelectronics Centre (IMEC), Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9774-9522","authenticated-orcid":false,"given":"Salim","family":"Ullah","sequence":"additional","affiliation":[{"name":"cfaed, Technische Universit\u00e4t Dresden, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7125-1737","authenticated-orcid":false,"given":"Akash","family":"Kumar","sequence":"additional","affiliation":[{"name":"cfaed, Technische Universit\u00e4t Dresden, Germany"}]}],"member":"320","published-online":{"date-parts":[[2023,9,9]]},"reference":[{"key":"e_1_3_2_2_2","doi-asserted-by":"publisher","DOI":"10.1145\/2858965.2814314"},{"key":"e_1_3_2_3_2","doi-asserted-by":"publisher","DOI":"10.21105\/joss.02338"},{"key":"e_1_3_2_4_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCIAIG.2012.2186810"},{"key":"e_1_3_2_5_2","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS.2019.8771610"},{"key":"e_1_3_2_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2276759"},{"key":"e_1_3_2_7_2","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3005286"},{"key":"e_1_3_2_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/TSSC.1968.300136"},{"key":"e_1_3_2_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372600"},{"key":"e_1_3_2_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2148970"},{"key":"e_1_3_2_11_2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2011.51"},{"key":"e_1_3_2_12_2","article-title":"On effective parallelization of Monte Carlo tree search","author":"Liu Anji","year":"2020","unstructured":"Anji Liu, Yitao Liang, Ji Liu, Guy Van den Broeck, and Jianshu Chen. 2020. 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