{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,12]],"date-time":"2026-06-12T10:08:37Z","timestamp":1781258917786,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":51,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,4,27]],"date-time":"2024-04-27T00:00:00Z","timestamp":1714176000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100006041","name":"Innovate UK","doi-asserted-by":"publisher","award":["DSbD 105694"],"award-info":[{"award-number":["DSbD 105694"]}],"id":[{"id":"10.13039\/501100006041","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency","doi-asserted-by":"publisher","award":["HR0011-18-C-0016"],"award-info":[{"award-number":["HR0011-18-C-0016"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]},{"name":"DARPA","award":["HR0011-18-C-0016"],"award-info":[{"award-number":["HR0011-18-C-0016"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,4,27]]},"DOI":"10.1145\/3620665.3640416","type":"proceedings-article","created":{"date-parts":[[2024,4,22]],"date-time":"2024-04-22T14:18:06Z","timestamp":1713795486000},"page":"251-268","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["Cornucopia Reloaded: Load Barriers for CHERI Heap Temporal Safety"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-9698-1503","authenticated-orcid":false,"given":"Nathaniel Wesley","family":"Filardo","sequence":"first","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"},{"name":"Microsoft, Toronto, Ontario, Canada"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-8276-3647","authenticated-orcid":false,"given":"Brett F.","family":"Gutstein","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3971-2681","authenticated-orcid":false,"given":"Jonathan","family":"Woodruff","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8157-5567","authenticated-orcid":false,"given":"Jessica","family":"Clarke","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-2976-0474","authenticated-orcid":false,"given":"Peter","family":"Rugg","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-6256-0419","authenticated-orcid":false,"given":"Brooks","family":"Davis","sequence":"additional","affiliation":[{"name":"SRI International, Menlo Park, California, United States of America"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-0038-7635","authenticated-orcid":false,"given":"Mark","family":"Johnston","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6095-6405","authenticated-orcid":false,"given":"Robert","family":"Norton","sequence":"additional","affiliation":[{"name":"Microsoft, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6060-0153","authenticated-orcid":false,"given":"David","family":"Chisnall","sequence":"additional","affiliation":[{"name":"SCI Semiconductor, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2806-495X","authenticated-orcid":false,"given":"Simon W.","family":"Moore","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-1197-8000","authenticated-orcid":false,"given":"Peter G.","family":"Neumann","sequence":"additional","affiliation":[{"name":"SRI International, Menlo Park, California, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8139-8783","authenticated-orcid":false,"given":"Robert N. M.","family":"Watson","sequence":"additional","affiliation":[{"name":"University of Cambridge, Cambridge, Cambridgeshire, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2024,4,27]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Benchmarking | grpc. URL: https:\/\/grpc.io\/docs\/guides\/benchmarking\/."},{"key":"e_1_3_2_1_2_1","unstructured":"PostgreSQL. URL: https:\/\/www.postgresql.org\/."},{"key":"e_1_3_2_1_3_1","unstructured":"PostgreSQL 9.6 CHERI port. URL: https:\/\/github.com\/CTSRD-CHERI\/postgres\/tree\/96-cheri."},{"key":"e_1_3_2_1_4_1","unstructured":"PostgreSQL pgbench benchmark. URL: https:\/\/www.postgresql.org\/docs\/9.6\/pgbench.html."},{"key":"e_1_3_2_1_5_1","unstructured":"Advanced Micro Devices Inc. AMD SEV-SNP: Strengthening VM isolation with integrity protection and more January 2020. URL: https:\/\/www.amd.com\/system\/files\/TechDocs\/SEV-SNP-strengthening-vm-isolation-with-integrity-protection-and-more.pdf."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3613424.3614266"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/960116.53992"},{"key":"e_1_3_2_1_9_1","unstructured":"Arm Inc. Arm architecture reference manual for a-profile architecture. URL: https:\/\/developer.arm.com\/documentation\/ddi0487\/latest\/."},{"key":"e_1_3_2_1_10_1","unstructured":"Arm Inc. Morello program. URL: https:\/\/www.arm.com\/architecture\/cpu\/morello."},{"key":"e_1_3_2_1_11_1","volume-title":"August","author":"Limited Arm","year":"2023","unstructured":"Arm Limited. Morello pure capability kernel user Linux ABI specification, August 2023. URL: https:\/\/git.morello-project.org\/morello\/kernel\/linux\/-\/wikis\/Morello-pure-capability-kernel-user-Linux-ABI-specification."},{"key":"e_1_3_2_1_13_1","volume-title":"Security analysis of memory tagging","author":"Bialek Joe","year":"2020","unstructured":"Joe Bialek, Ken Johnson, Matt Miller, and Tony Chen. Security analysis of memory tagging, 2020. URL: https:\/\/github.com\/microsoft\/MSRC-Security-Research\/blob\/master\/papers\/2020\/Security%20analysis%20of%20memory%20tagging.pdf."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/113445.113459"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/357766.351265"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/362790.362798"},{"key":"e_1_3_2_1_17_1","unstructured":"The Chromium Team. Memory safety. URL: https:\/\/www.chromium.org\/Home\/chromium-security\/memory-safety."},{"key":"e_1_3_2_1_18_1","volume-title":"October","author":"Clements Austin","year":"2016","unstructured":"Austin Clements and Rick Hudson. Proposal: Eliminate STW stack re-scanning, October 2016. URL: https:\/\/github.com\/golang\/proposal\/blob\/master\/design\/17503-eliminate-rescan.md."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1064979.1064988"},{"key":"e_1_3_2_1_20_1","first-page":"815","volume-title":"26th USENIX Security Symposium (USENIX Security 17)","author":"Dang Thurston H.Y.","year":"2017","unstructured":"Thurston H.Y. Dang, Petros Maniatis, and David Wagner. Oscar: A practical Page-Permissions-Based scheme for thwarting dangling pointers. In 26th USENIX Security Symposium (USENIX Security 17), pages 815--832, Vancouver, BC, August 2017. USENIX Association. URL: https:\/\/www.usenix.org\/conference\/usenixsecurity17\/technical-sessions\/presentation\/dang."},{"key":"e_1_3_2_1_21_1","unstructured":"Data61 Trustworthy Systems Team. sel4 reference manual version 12.1.0. URL: https:\/\/sel4.systems\/Info\/Docs\/seL4-manual-latest.pdf."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304042"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00098"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/2972206.2972210"},{"key":"e_1_3_2_1_25_1","unstructured":"Brett Gutstein. CHERI Malloc Revocation Shim. URL: https:\/\/github.com\/CTSRD-CHERI\/mrs."},{"key":"e_1_3_2_1_27_1","volume-title":"September","author":"Henning John L.","year":"2006","unstructured":"John L. Henning. Spec cpu2006 benchmark descriptions. SIGARCH Comput. Archit. News, 34(4), September 2006."},{"key":"e_1_3_2_1_28_1","volume-title":"Proceedings of the OOPSLA'93 Workshop on Garbage Collection","author":"H\u00f6lzle Urs","year":"1993","unstructured":"Urs H\u00f6lzle. A fast write barrier for generational garbage collectors. In Proceedings of the OOPSLA'93 Workshop on Garbage Collection, October 1993. URL: https:\/\/bibliography.selflanguage.org\/write-barrier.html."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/286860.286878"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.112"},{"key":"e_1_3_2_1_31_1","volume-title":"December","author":"Johnstone Mark Stuart","year":"1997","unstructured":"Mark Stuart Johnstone. Non-compacting memory allocation and realtime garbage collection, December 1997. URL: https:\/\/proquest.com\/docview\/304374180."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/3315573.3329980"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/3243734.3243826"},{"key":"e_1_3_2_1_35_1","volume-title":"February","author":"Miller Matt","year":"2019","unstructured":"Matt Miller. Trends, challenges, and strategic shifts in the software vulnerability mitigation landscape, February 2019. URL: https:\/\/github.com\/microsoft\/MSRC-Security-Research\/blob\/master\/presentations\/2019_02_BlueHatIL\/2019_01%20-%20BlueHatIL%20-%20Trends%2C%20challenge%2C%20and%20shifts%20in%20software%20vulnerability%20mitigation.pdf."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/800214.806541"},{"key":"e_1_3_2_1_38_1","volume-title":"Hardware-assisted checking using Silicon Secured Memory (SSM)","author":"Oracle Inc.","year":"2015","unstructured":"Oracle Inc. Hardware-assisted checking using Silicon Secured Memory (SSM), 2015. URL: https:\/\/docs.oracle.com\/cd\/E37069_01\/html\/E37085\/gphwb.html."},{"key":"e_1_3_2_1_39_1","unstructured":"Matthew J. Parkinson. Hardening snmalloc. URL: https:\/\/github.com\/microsoft\/snmalloc\/tree\/9d4466093a7c42e4fe43e032aeca356674d6e55c\/docs\/security."},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/286860.286863"},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/1379022.1375587"},{"key":"e_1_3_2_1_43_1","unstructured":"Chris Rohlf. Isolation alloc heap allocator security feature comparison. URL: https:\/\/github.com\/struct\/isoalloc\/blob\/947f3bc91c3a61e3ec85bff8f43034d2a59c897d\/SECURITY_COMPARISON.MD."},{"key":"e_1_3_2_1_45_1","unstructured":"The Rust Reference. 1.71.0 edition. URL: https:\/\/doc.rust-lang.org\/1.71.0\/reference."},{"key":"e_1_3_2_1_46_1","volume-title":"USENIX ATC 2012","author":"Serebryany Konstantin","year":"2012","unstructured":"Konstantin Serebryany, Derek Bruening, Alexander Potapenko, and Dmitry Vyukov. Addresssanitizer: A fast address sanity checker. In USENIX ATC 2012, 2012. URL: https:\/\/www.usenix.org\/conference\/usenixfederatedconferencesweek\/addresssanitizer-fast-address-sanity-checker."},{"key":"e_1_3_2_1_47_1","unstructured":"Kostya Serebryany Evgenii Stepanov Aleksey Shlyapnikov Vlad Tsyrklevich and Dmitry Vyukov. Memory Tagging and how it improves C\/C++ memory safety. URL: http:\/\/arxiv.org\/abs\/1802.09517 arXiv:1802.09517."},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.14722\/ndss.2019.23541"},{"key":"e_1_3_2_1_49_1","volume-title":"Low Latency Summit","author":"Tene Gil","year":"2013","unstructured":"Gil Tene. How NOT to Measure Latency. In Low Latency Summit, 2013. A version of this presentation is available at https:\/\/www.infoq.com\/presentations\/latency-pitfalls\/."},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1145\/3064176.3064211"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.48456\/tr-987"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.48456\/tr-951"},{"key":"e_1_3_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.48456\/tr-927"},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1145\/66068.66077"},{"key":"e_1_3_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2914037"},{"key":"e_1_3_2_1_58_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358288"},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1145\/3538532"},{"key":"e_1_3_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304017"}],"event":{"name":"ASPLOS '24: 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2","location":"La Jolla CA USA","acronym":"ASPLOS '24","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture","SIGOPS ACM Special Interest Group on Operating Systems","SIGPLAN ACM Special Interest Group on Programming Languages","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3620665.3640416","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3620665.3640416","content-type":"text\/html","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3620665.3640416","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3620665.3640416","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T00:03:42Z","timestamp":1750291422000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3620665.3640416"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4,27]]},"references-count":51,"alternative-id":["10.1145\/3620665.3640416","10.1145\/3620665"],"URL":"https:\/\/doi.org\/10.1145\/3620665.3640416","relation":{},"subject":[],"published":{"date-parts":[[2024,4,27]]},"assertion":[{"value":"2024-04-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}