{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T14:07:46Z","timestamp":1769263666497,"version":"3.49.0"},"reference-count":20,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2024,1,27]],"date-time":"2024-01-27T00:00:00Z","timestamp":1706313600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2024,3,31]]},"abstract":"<jats:p>This article describes an extensive study of the use of DSP48E2 Slices in Ultrascale FPGAs to design hardware versions of the Montgomery Multiplication algorithm for the hardware acceleration of modular multiplications. Our fully scalable systolic architectures result in parallelized, DSP48E2-optimized scheduling of operations analogous to the FIOS block variant of the Montgomery Multiplication. We explore the impacts of different pipelining strategies within DSP blocks, scheduling of operations, processing element configurations, global design structures and their tradeoffs in terms of performance and resource costs. We discuss the application of our methodology to multiple types of DSP primitives. We provide ready-to-use fast, efficient, and fully parametrizable designs, which can adapt to a wide range of requirements and applications. Implementations are scalable to any operand width. Our most efficient designs can perform 128, 256, 512, 1024, 2048, and 4096 bits Montgomery modular multiplications in 0.0992 \u03bcs, 0.2032 \u03bcs, 0.3952 \u03bcs, 0.7792\u03bcs, 1.550 \u03bcs, and 3.099 \u03bcs using 4, 6, 11, 21, 41, and 82 DSP blocks, respectively.<\/jats:p>","DOI":"10.1145\/3624571","type":"journal-article","created":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T12:00:56Z","timestamp":1694779256000},"page":"1-31","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["Montgomery Multiplication Scalable Systolic Designs Optimized for DSP48E2"],"prefix":"10.1145","volume":"17","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3105-0321","authenticated-orcid":false,"given":"Louis","family":"Noyez","sequence":"first","affiliation":[{"name":"Mines Saint-Etienne, CEA, Leti, Centre CMP, F\u201413541 Gardanne, France"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3840-584X","authenticated-orcid":false,"given":"Nadia El","family":"Mrabet","sequence":"additional","affiliation":[{"name":"Mines Saint-Etienne, CEA, Leti, Centre CMP, F\u201413541 Gardanne, France"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9110-2800","authenticated-orcid":false,"given":"Olivier","family":"Potin","sequence":"additional","affiliation":[{"name":"Mines Saint-Etienne, CEA, Leti, Centre CMP, F\u201413541 Gardanne, France"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7610-6870","authenticated-orcid":false,"given":"Pascal","family":"Veron","sequence":"additional","affiliation":[{"name":"Laboratoire IMath, Universit\u00e9 de Toulon, Toulon, France"}]}],"member":"320","published-online":{"date-parts":[[2024,1,27]]},"reference":[{"key":"e_1_3_3_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3040665"},{"key":"e_1_3_3_3_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2021.12.006"},{"key":"e_1_3_3_4_2","doi-asserted-by":"crossref","first-page":"83","DOI":"10.1007\/978-3-030-31578-8_5","volume-title":"Cryptology and Network Security","author":"Khatib Rami E. l.","year":"2019","unstructured":"Rami E. l. Khatib, Reza Azarderakhsh, and Mehran Mozaffari-Kermani. 2019. Optimized algorithms and architectures for montgomery multiplication for post-quantum cryptography. In Cryptology and Network Security. Yi Mu, Robert H. Deng, and Xinyi Huang (Eds.). Springer International Publishing, Cham, 83\u201398."},{"key":"e_1_3_3_5_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3129589"},{"key":"e_1_3_3_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2920352"},{"key":"e_1_3_3_7_2","doi-asserted-by":"publisher","DOI":"10.1155\/2008\/583926"},{"key":"e_1_3_3_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.247"},{"key":"e_1_3_3_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/40.502403"},{"key":"e_1_3_3_10_2","doi-asserted-by":"publisher","DOI":"10.1090\/S0025-5718-1987-0866109-5"},{"key":"e_1_3_3_11_2","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2004.36"},{"key":"e_1_3_3_12_2","doi-asserted-by":"publisher","unstructured":"Arpan Mondal Santosh Ghosh Abhijit Das and Dipanwita Roy Chowdhury. 2012. Efficient FPGA implementation of montgomery multiplier using DSP blocks. Proceedings of the 16th international conference on Progress in VLSI Design and Test370\u2013372. DOI:DOI:10.1007\/978-3-642-31494-0_47","DOI":"10.1007\/978-3-642-31494-0_47"},{"key":"e_1_3_3_13_2","doi-asserted-by":"publisher","DOI":"10.1090\/S0025-5718-1985-0777282-X"},{"key":"e_1_3_3_14_2","doi-asserted-by":"publisher","DOI":"10.1090\/S0025-5718-1987-0866113-7"},{"key":"e_1_3_3_15_2","doi-asserted-by":"publisher","unstructured":"Amine Mrabet Nadia El Mrabet Ronan Lashermes Jean-Baptiste Rigaud Belgacem Bouallegue Sihem Mesnager and Mohsen Machhout. 2017. A scalable and systolic architectures of montgomery modular multiplication for public key cryptosystems based on DSPs. Journal of Hardware and Systems Security 1 3 (2017) 219\u2013236. DOI:10.1007\/978-3-319-49445-6_8","DOI":"10.1007\/978-3-319-49445-6_8"},{"key":"e_1_3_3_16_2","unstructured":"Louis NOYEZ. 2017. FIOS DSP Montgomery Multiplier. (2017). Retrieved from https:\/\/github.com\/LOUISNOYEZ\/FIOS_DSP_MM"},{"key":"e_1_3_3_17_2","doi-asserted-by":"publisher","DOI":"10.1145\/359340.359342"},{"key":"e_1_3_3_18_2","doi-asserted-by":"crossref","first-page":"185","DOI":"10.1007\/3-540-44709-1_17","volume-title":"Cryptographic Hardware and Embedded Systems\u2014CHES 2001","author":"Tenca Alexandre F.","year":"2001","unstructured":"Alexandre F. Tenca, Georgi Todorov, and \u00c7etin K. Ko\u00e7. 2001. High-radix design of a scalable modular multiplier. In Cryptographic Hardware and Embedded Systems\u2014CHES 2001. \u00c7etin K. Ko\u00e7, David Naccache, and Christof Paar (Eds.). Springer, Berlin, 185\u2013201."},{"key":"e_1_3_3_19_2","doi-asserted-by":"publisher","DOI":"10.5555\/648252.752396"},{"key":"e_1_3_3_20_2","unstructured":"Colin D. Walter. 2017. Hardware aspects of montgomery modular multiplication. Topics in Computational Number Theory P. L. Montgomery (Ed.). Cambridge University Press Cambridge."},{"key":"e_1_3_3_21_2","volume-title":"UltraScale Architecture DSP Slice","year":"2022","unstructured":"Xilinx 2022. UltraScale Architecture DSP Slice. Xilinx. Retrieved from https:\/\/0x04.net\/mwk\/xidocs\/ug\/ug579-ultrascale-dsp.pdf"}],"container-title":["ACM Transactions on Reconfigurable Technology and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3624571","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3624571","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T17:49:46Z","timestamp":1750268986000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3624571"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1,27]]},"references-count":20,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2024,3,31]]}},"alternative-id":["10.1145\/3624571"],"URL":"https:\/\/doi.org\/10.1145\/3624571","relation":{},"ISSN":["1936-7406","1936-7414"],"issn-type":[{"value":"1936-7406","type":"print"},{"value":"1936-7414","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,1,27]]},"assertion":[{"value":"2023-02-17","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2023-09-04","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-01-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}