{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T19:38:23Z","timestamp":1776713903690,"version":"3.51.2"},"reference-count":36,"publisher":"Association for Computing Machinery (ACM)","issue":"CoNEXT3","license":[{"start":{"date-parts":[[2023,11,27]],"date-time":"2023-11-27T00:00:00Z","timestamp":1701043200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/100030798","name":"KTH Digital Futures","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100030798","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100004359","name":"Swedish Research Council","doi-asserted-by":"crossref","award":["2021-04212"],"award-info":[{"award-number":["2021-04212"]}],"id":[{"id":"10.13039\/501100004359","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100006374","name":"European Research Council","doi-asserted-by":"publisher","award":["770889"],"award-info":[{"award-number":["770889"]}],"id":[{"id":"10.13039\/501100006374","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Proc. ACM Netw."],"published-print":{"date-parts":[[2023,11,27]]},"abstract":"<jats:p>Key-value data structures are an essential component of today's stateful packet processors such as load balancers, packet schedulers, and more. Realizing key-value data structures entirely in the data-plane of an ASIC switch would bring enormous energy savings. Yet, today's implementations are ill-suited for stateful packet processing as they support only a limited amount of flow-state insertions per second into these data structures. In this paper, we present SWITCHAROO, a mechanism for realizing key-value data structures on programmable ASIC switches that supports both high-frequency insertions and fast lookups entirely in the data plane. We show that SWITCHAROO can be realized on ASIC, supports millions of flow-state insertions per second with only limited amount of packet recirculation.<\/jats:p>","DOI":"10.1145\/3629144","type":"journal-article","created":{"date-parts":[[2023,11,28]],"date-time":"2023-11-28T15:40:05Z","timestamp":1701186005000},"page":"1-23","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["Millions of Low-latency State Insertions on ASIC Switches"],"prefix":"10.1145","volume":"1","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-2852-6310","authenticated-orcid":false,"given":"Tommaso","family":"Caiazzi","sequence":"first","affiliation":[{"name":"Roma Tre University &amp; KTH Royal Institute of Technology, Rome, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9780-873X","authenticated-orcid":false,"given":"Mariano","family":"Scazzariello","sequence":"additional","affiliation":[{"name":"KTH Royal Institute of Technology, Stockholm, Sweden"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9675-9729","authenticated-orcid":false,"given":"Marco","family":"Chiesa","sequence":"additional","affiliation":[{"name":"KTH Royal Institute of Technology, Stockholm, Sweden"}]}],"member":"320","published-online":{"date-parts":[[2023,11,28]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/HCS49909.2020.9220636"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ANCS.2015.7110116"},{"key":"e_1_2_1_3_1","volume-title":"17th USENIX Symposium on Networked Systems Design and Implementation (NSDI 20)","author":"Barbette Tom","year":"2020","unstructured":"Tom Barbette, Chen Tang, Haoran Yao, Dejan Kosti\u0107, Gerald Q. Maguire Jr., Panagiotis Papadimitratos, and Marco Chiesa. 2020. A High-Speed Load-Balancer Design with Guaranteed Per-Connection-Consistency. In 17th USENIX Symposium on Networked Systems Design and Implementation (NSDI 20). USENIX Association, Santa Clara, CA, 667--683. https:\/\/www.usenix.org\/conference\/nsdi20\/presentation\/barbette"},{"key":"e_1_2_1_4_1","doi-asserted-by":"crossref","unstructured":"Pat Bosshart Glen Gibb Hun-Seok Kim George Varghese Nick McKeown Martin Izzard Fernando Mujica and Mark Horowitz. 2013. Forwarding Metamorphosis: Fast Programmable Match-Action Processing in Hardware for SDN. In ACM SIGCOMM 2013 (acm sigcomm 2013 ed.). ACM. https:\/\/www.microsoft.com\/en-us\/research\/publication\/forwarding-metamorphosis-fast-programmable-match-action-processing-in-hardware-for-sdn\/","DOI":"10.1145\/2486001.2486011"},{"key":"e_1_2_1_5_1","unstructured":"Tommaso Caiazzi Mariano Scazzariello and Marco Chiesa. 2023. Switcharoo GitHub Repository. https:\/\/github.com\/orgs\/Switcharoo-P4\/repositories."},{"key":"e_1_2_1_6_1","unstructured":"CAIDA . 2019. Trace Statistics for CAIDA Passive OC48 and OC192 Traces. https:\/\/www.caida.org\/catalog\/datasets\/trace_stats\/."},{"key":"e_1_2_1_7_1","unstructured":"Philippe Flajolet Patricio Poblete and Alfredo Viola. 1997. On the Analysis of Linear Probing Hashing. Research Report RR-3265. INRIA. https:\/\/hal.inria.fr\/inria-00073424"},{"key":"e_1_2_1_8_1","volume-title":"19th USENIX Symposium on Networked Systems Design and Implementation (NSDI 22)","author":"Ghasemirahni Hamid","year":"2022","unstructured":"Hamid Ghasemirahni, Tom Barbette, Georgios P. Katsikas, Alireza Farshin, Amir Roozbeh, Massimo Girondi, Marco Chiesa, Gerald Q. Maguire Jr., and Dejan Kosti\u0107. 2022. Packet Order Matters! Improving Application Performance by Deliberately Delaying Packets. In 19th USENIX Symposium on Networked Systems Design and Implementation (NSDI 22). USENIX Association, Renton, WA, 807--827. https:\/\/www.usenix.org\/conference\/nsdi22\/presentation\/ghasemirahni"},{"key":"e_1_2_1_9_1","unstructured":"Intel. 2021. P416 Intel Tofino Native Architecture -- Public Version. https:\/\/github.com\/barefootnetworks\/Open-Tofino\/blob\/master\/PUBLIC_Tofino-Native-Arch.pdf."},{"key":"e_1_2_1_10_1","unstructured":"Intel. 2023. Intel Tofino 2. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/tofino-2-series.html."},{"key":"e_1_2_1_11_1","unstructured":"Intel. 2023. Intel Tofino Series. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/tofino-series.html."},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/3387514.3405855"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3387514.3406591"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.2017.1700132"},{"key":"e_1_2_1_15_1","volume-title":"Pegasus: Tolerating Skewed Workloads in Distributed Storage with In-Network Coherence Directories. In 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI 20)","author":"Li Jialin","unstructured":"Jialin Li, Jacob Nelson, Ellis Michael, Xin Jin, and Dan R. K. Ports. 2020. Pegasus: Tolerating Skewed Workloads in Distributed Storage with In-Network Coherence Directories. In 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI 20). USENIX Association, 387--406. https:\/\/www.usenix.org\/conference\/osdi20\/presentation\/li-jialin"},{"key":"e_1_2_1_16_1","volume-title":"Algorithms and Data Structures: The Basic Toolbox (1 ed.)","author":"Mehlhorn Kurt","unstructured":"Kurt Mehlhorn and Peter Sanders. 2008. Algorithms and Data Structures: The Basic Toolbox (1 ed.). Springer Publishing Company, Incorporated."},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/3098822.3098824"},{"key":"e_1_2_1_18_1","volume-title":"Open Data Structures: An Introduction","author":"Morin Pat","unstructured":"Pat Morin. 2013. Open Data Structures: An Introduction. Athabasca University Press., CAN."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/3359989.3365417"},{"key":"e_1_2_1_20_1","unstructured":"NSLab @ KTH. 2021. The Cheetah Load Balancer. https:\/\/github.com\/cheetahlb\/."},{"key":"e_1_2_1_21_1","unstructured":"nsnam. 2023. ns-3. https:\/\/www.nsnam.org\/."},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44676-1_10"},{"key":"e_1_2_1_23_1","unstructured":"Ivan Pepelnjak. 2022. Data Center Switching ASICs Tradeoffs. https:\/\/blog.ipspace.net\/2022\/06\/data-center-switching-asic-tradeoffs.html."},{"key":"e_1_2_1_24_1","volume-title":"FlowBlaze: Stateful Packet Processing in Hardware. In 16th USENIX Symposium on Networked Systems Design and Implementation (NSDI 19)","author":"Pontarelli Salvatore","year":"2019","unstructured":"Salvatore Pontarelli, Roberto Bifulco, Marco Bonola, Carmelo Cascone, Marco Spaziani, Valerio Bruschi, Davide Sanvito, Giuseppe Siracusano, Antonio Capone, Michio Honda, Felipe Huici, and Giuseppe Siracusano. 2019. FlowBlaze: Stateful Packet Processing in Hardware. In 16th USENIX Symposium on Networked Systems Design and Implementation (NSDI 19). USENIX Association, Boston, MA, 531--548. https:\/\/www.usenix.org\/conference\/nsdi19\/presentation\/pontarelli"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/3127479.3132018"},{"key":"e_1_2_1_26_1","volume-title":"Scaling Distributed Machine Learning with In-Network Aggregation. In 18th USENIX Symposium on Networked Systems Design and Implementation (NSDI 21)","author":"Sapio Amedeo","year":"2021","unstructured":"Amedeo Sapio, Marco Canini, Chen-Yu Ho, Jacob Nelson, Panos Kalnis, Changhoon Kim, Arvind Krishnamurthy, Masoud Moshref, Dan Ports, and Peter Richtarik. 2021. Scaling Distributed Machine Learning with In-Network Aggregation. In 18th USENIX Symposium on Networked Systems Design and Implementation (NSDI 21). USENIX Association, 785--808. https:\/\/www.usenix.org\/conference\/nsdi21\/presentation\/sapio"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/3544216.3544222"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/3452296.3472903"},{"key":"e_1_2_1_29_1","unstructured":"John Sonchack Devon Loehr Jennifer Rexford and David Walker. 2023. Lucid - Stateful Firewall (Github). https:\/\/github.com\/PrincetonUniversity\/lucid\/blob\/main\/examples\/publications\/sigcomm21\/orig\/stateful_fw.dpt#L150."},{"key":"e_1_2_1_30_1","volume-title":"Let It Flow: Resilient Asymmetric Load Balancing with Flowlet Switching. In 14th USENIX Symposium on Networked Systems Design and Implementation (NSDI 17)","author":"Vanini Erico","year":"2017","unstructured":"Erico Vanini, Rong Pan, Mohammad Alizadeh, Parvin Taheri, and Tom Edsall. 2017. Let It Flow: Resilient Asymmetric Load Balancing with Flowlet Switching. In 14th USENIX Symposium on Networked Systems Design and Implementation (NSDI 17). USENIX Association, Boston, MA, 407--420. https:\/\/www.usenix.org\/conference\/nsdi17\/technical-sessions\/presentation\/vanini"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.jnca.2020.102676"},{"key":"e_1_2_1_32_1","unstructured":"Bob Wheeler. 2019. Tomahawk 4 switch first to 25.6 Tbps. https:\/\/docs.broadcom.com\/doc\/12398014."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/3230543.3230544"},{"key":"e_1_2_1_34_1","volume-title":"19th USENIX Symposium on Networked Systems Design and Implementation (NSDI 22)","author":"Zeng Chaoliang","year":"2022","unstructured":"Chaoliang Zeng, Layong Luo, Teng Zhang, Zilong Wang, Luyang Li, Wenchen Han, Nan Chen, Lebing Wan, Lichao Liu, Zhipeng Ding, Xiongfei Geng, Tao Feng, Feng Ning, Kai Chen, and Chuanxiong Guo. 2022. Tiara: A Scalable and Efficient Hardware Acceleration Architecture for Stateful Layer-4 Load Balancing. In 19th USENIX Symposium on Networked Systems Design and Implementation (NSDI 22). USENIX Association, Renton, WA. https:\/\/www.usenix.org\/conference\/nsdi22\/presentation\/zeng"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/3098822.3098841"},{"key":"e_1_2_1_36_1","unstructured":"Junxue Zhang. 2023. ns3-load-balance. https:\/\/github.com\/snowzjx\/ns3-load-balance."}],"container-title":["Proceedings of the ACM on Networking"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3629144","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3629144","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T18:46:56Z","timestamp":1776710816000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3629144"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,11,27]]},"references-count":36,"journal-issue":{"issue":"CoNEXT3","published-print":{"date-parts":[[2023,11,27]]}},"alternative-id":["10.1145\/3629144"],"URL":"https:\/\/doi.org\/10.1145\/3629144","relation":{},"ISSN":["2834-5509"],"issn-type":[{"value":"2834-5509","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,11,27]]},"assertion":[{"value":"2023-11-28","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}