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This flexible routing allows for a rather easy realization of the desired functionality, but our evaluations show that the full routing flexibility is not required in many occasions. In this work, we focus on what is actually needed and introduce a new switch-box realization what we call\n            <jats:italic>Turn-Restricted Switch-Boxes<\/jats:italic>\n            which supports only a subset of possible turns. The proposed method increases the utilization rate of FPGA switch-boxes by eliminating the unemployed resources. Experimental evaluations confirm that the area and average power consumption can be reduced by 12.8% and 14.1%, on average, respectively and the FPGA routing susceptibility to SEU and MBU can be improved by 18.2%, on average, by imposing negligible performance.\n            <jats:xref ref-type=\"fn\">\n              <jats:sup>1<\/jats:sup>\n            <\/jats:xref>\n          <\/jats:p>","DOI":"10.1145\/3643809","type":"journal-article","created":{"date-parts":[[2024,2,3]],"date-time":"2024-02-03T11:45:00Z","timestamp":1706960700000},"page":"1-18","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["An Efficient FPGA Architecture with Turn-Restricted Switch Boxes"],"prefix":"10.1145","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0009-0008-4562-506X","authenticated-orcid":false,"given":"Fatemeh Serajeh","family":"Hassani","sequence":"first","affiliation":[{"name":"Sharif University of Technology, Tehran, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4029-0175","authenticated-orcid":false,"given":"Mohammad","family":"Sadrosadati","sequence":"additional","affiliation":[{"name":"Institute for Research in Fundamental Sciences, Tehran, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1935-7830","authenticated-orcid":false,"given":"Nezam","family":"Rohbani","sequence":"additional","affiliation":[{"name":"Institute for Research in Fundamental Sciences, Tehran, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9892-8485","authenticated-orcid":false,"given":"Sebastian","family":"Pointner","sequence":"additional","affiliation":[{"name":"Johannes Kepler University, Linz, Austria"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4993-7860","authenticated-orcid":false,"given":"Robert","family":"Wille","sequence":"additional","affiliation":[{"name":"Technical University of Munich, Munich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4079-8603","authenticated-orcid":false,"given":"Hamid","family":"Sarbazi-Azad","sequence":"additional","affiliation":[{"name":"Sharif University of Technology and Institute for Research in Fundamental Sciences, Tehran, Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2024,3,14]]},"reference":[{"key":"e_1_3_2_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2010.5699279"},{"key":"e_1_3_2_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL50879.2020.00036"},{"key":"e_1_3_2_4_2","doi-asserted-by":"publisher","DOI":"10.3390\/electronics9010175"},{"key":"e_1_3_2_5_2","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2005.75"},{"key":"e_1_3_2_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2007.910426"},{"key":"e_1_3_2_7_2","unstructured":"DS150 August. 2015. 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