{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,3]],"date-time":"2026-03-03T20:18:56Z","timestamp":1772569136269,"version":"3.50.1"},"reference-count":37,"publisher":"Association for Computing Machinery (ACM)","issue":"5","license":[{"start":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T00:00:00Z","timestamp":1725408000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"Sweden\u2019s Innovation Agency","award":["2017-04892"],"award-info":[{"award-number":["2017-04892"]}]},{"name":"ITEA","award":["2018-02228"],"award-info":[{"award-number":["2018-02228"]}]},{"name":"PANORAMA - Boosting Design Efficiency for Heterogeneous Systems","award":["2019-02743"],"award-info":[{"award-number":["2019-02743"]}]},{"name":"TRANSFORM - Design transformation for correct-by-construction design methodology, and the Advanced and innovative digitalization","award":["2021-02484"],"award-info":[{"award-number":["2021-02484"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2024,9,30]]},"abstract":"<jats:p>Design space exploration (DSE) is a key activity in embedded design processes, where a mapping between applications and platforms that meets the process design requirements must be found. Finding such mappings is very challenging due to the complexity of modern embedded platforms and applications. DSE tools aid in this challenge by potentially covering sections of the design space that could be unintuitive to designers, leading to more optimised designs. Despite this potential benefit, DSE tools remain relatively niche in the embedded industry. A significant obstacle hindering their wider adoption is integrating such tools into embedded design processes.<\/jats:p>\n          <jats:p>We present two contributions that address this integration issue. First, we present the design space identification (DSI) approach for systematically constructing DSE solutions that are modular and tuneable. Modularity means that DSE solutions can be reused to construct other DSE solutions, while tuneability means that the most specific DSE solution is chosen for the target DSE problem. Moreover, DSI enables transparent cooperation between exploration algorithms. Second, we present IDeSyDe, an extensible DSE framework for DSE solutions based on DSI. IDeSyDe allows extensions to be developed in different programming languages in a manner compliant with the DSI approach.<\/jats:p>\n          <jats:p>We showcase the relevance of these contributions through five different case studies. The case study evaluations showed that non-exploration DSI procedures create overheads, which are marginal compared to the exploration algorithms. Empirically, most evaluations average 2% of the total DSE request. More importantly, the case studies have shown that IDeSyDe indeed provides a modular and incremental framework for constructing DSE solutions. In particular, the last case study required minimal extensions over the previous case studies so that support for a new application type was added to IDeSyDe.<\/jats:p>","DOI":"10.1145\/3647640","type":"journal-article","created":{"date-parts":[[2024,2,10]],"date-time":"2024-02-10T10:18:58Z","timestamp":1707560338000},"page":"1-45","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["IDeSyDe: Systematic Design Space Exploration via Design Space Identification"],"prefix":"10.1145","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1277-3903","authenticated-orcid":false,"given":"Rodolfo","family":"Jord\u00e3o","sequence":"first","affiliation":[{"name":"KTH Royal Institute of Technology, Kista, Sweden"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1276-3609","authenticated-orcid":false,"given":"Matthias","family":"Becker","sequence":"additional","affiliation":[{"name":"KTH Royal Institute of Technology, Kista, Sweden"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4859-3100","authenticated-orcid":false,"given":"Ingo","family":"Sander","sequence":"additional","affiliation":[{"name":"KTH Royal Institute of Technology, Kista, Sweden"}]}],"member":"320","published-online":{"date-parts":[[2024,9,4]]},"reference":[{"key":"e_1_3_2_2_2","unstructured":"Charles Andr\u00e9. 2009. Syntax and Semantics of the Clock Constraint Specification Language (CCSL). Resarch Report RR-6925. INRIA 37. Retrieved Apr. 25 2023 from https:\/\/inria.hal.science\/inria-00384077\/document"},{"key":"e_1_3_2_3_2","doi-asserted-by":"publisher","unstructured":"Seyed-Hosein Attarzadeh-Niaki and Ingo Sander. 2017. Automatic construction of models for analytic system-level design space exploration problems. In Design Automation & Test in Europe Conference & Exhibition (DATE\u201917). IEEE Lausanne Switzerland 20 (Mar. 2017) 670\u2013673. DOI:10.23919\/DATE.2017.7927074","DOI":"10.23919\/DATE.2017.7927074"},{"key":"e_1_3_2_4_2","doi-asserted-by":"publisher","DOI":"10.1145\/384198.384210"},{"key":"e_1_3_2_5_2","unstructured":"David Benavides Sergio Segura Pablo Trinidad and Antonio Ruiz-Cortes. 2007. FAMA: Tooling a Framework for the Automated Analysis of Feature Models. Retrieved April 25 2023 from https:\/\/idus.us.es\/handle\/11441\/26357"},{"key":"e_1_3_2_6_2","doi-asserted-by":"publisher","unstructured":"Julien Forget Fr\u00e9d\u00e9ric Boniol Emmanuel Grolleau David Lesens and Claire Pagetti. 2010-04. Scheduling dependent periodic tasks without synchronization mechanisms. In Proceedings of the 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium. IEEE 301\u2013310. DOI:10.1109\/RTAS.2010.26ISSN: 1545-3421.","DOI":"10.1109\/RTAS.2010.26"},{"key":"e_1_3_2_7_2","doi-asserted-by":"publisher","unstructured":"Marc Geilen Joachim Falk Christian Haubelt Twan Basten Bart Theelen and Sander Stuijk. 2017-04. Performance analysis of weakly-consistent scenario-aware dataflow graphs. Journal of Signal Processing Systems 87 1 (2017-04) 157\u2013175. DOI:10.1007\/s11265-016-1193-7Number: 1.","DOI":"10.1007\/s11265-016-1193-7"},{"key":"e_1_3_2_8_2","doi-asserted-by":"publisher","unstructured":"Andreas Gerstlauer Christian Haubelt Andy D. Pimentel Todor P. Stefanov Daniel D. Gajski and given-i=J\u00fc family=Teich given=J\u00fcrgen. 2009-10. Electronic system-level synthesis methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28 10 (2009-10) 1517\u20131530. DOI:10.1109\/TCAD.2009.2026356","DOI":"10.1109\/TCAD.2009.2026356"},{"key":"e_1_3_2_9_2","doi-asserted-by":"publisher","unstructured":"Fernando Herrera H\u00e9ctor Posadas Pablo Pe\u00f1il Eugenio Villar Francisco Ferrero Ra\u00fal Valencia and Gianluca Palermo. 2014-01-01. The complex methodology for UML\/marte modeling and design space exploration of embedded systems. Journal of Systems Architecture 60 1 (2014-01-01) 55\u201378. DOI:10.1016\/j.sysarc.2013.10.003","DOI":"10.1016\/j.sysarc.2013.10.003"},{"key":"e_1_3_2_10_2","doi-asserted-by":"crossref","unstructured":"Rodolfo Jordao Matthias Becker Ingo Sander and Ingemar S\u00f6derquist. 2023. Design space exploration for safe and optimal mapping of avionics functionality on IMA platforms. IEEE. Retrieved April 25 2023 from https:\/\/urn.kb.se\/resolve?urn=urn:nbn:se:kth:diva-338768","DOI":"10.1109\/DASC58513.2023.10311316"},{"key":"e_1_3_2_11_2","doi-asserted-by":"publisher","unstructured":"Rodolfo Jord\u00e3o Fahimeh Bahrami Rui Chen and Ingo Sander. 2022-09. A multi-view and programming language agnostic framework for model-driven engineering. In Proceedings of the 2022 Forum on Specification and Design Languages. Linz Austria 1\u20138. DOI:10.1109\/FDL56239.2022.9925666ISSN: 1636-9874.","DOI":"10.1109\/FDL56239.2022.9925666"},{"key":"e_1_3_2_12_2","doi-asserted-by":"publisher","unstructured":"Rodolfo Jord\u00e3o Ingo Sander and Matthias Becker. 2021-02. Formulation of design space exploration problems by composable design space identification. In Proceedings of the 2021 Design Automation and Test in Europe Conference & Exhibition. 1204\u20131207. DOI:10.23919\/DATE51398.2021.9474082ISSN: 1558-1101.","DOI":"10.23919\/DATE51398.2021.9474082"},{"key":"e_1_3_2_13_2","doi-asserted-by":"publisher","unstructured":"Nima Khalilzad Kathrin Rosvall and Ingo Sander. 2016-09. A modular design space exploration framework for multiprocessor real-time systems. In Proceedings of the 2016 Forum on Specification and Design Languages. 1\u20137. DOI:10.1109\/FDL.2016.7880377","DOI":"10.1109\/FDL.2016.7880377"},{"key":"e_1_3_2_14_2","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45874-3_2"},{"key":"e_1_3_2_15_2","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"key":"e_1_3_2_16_2","doi-asserted-by":"publisher","unstructured":"Chris Lattner Mehdi Amini Uday Bondhugula Albert Cohen Andy Davis Jacques Pienaar River Riddle Tatiana Shpeisman Nicolas Vasilache and Oleksandr Zinenko. 2021. MLIR: Scaling compiler infrastructure for domain specific computation. IEEE\/ACM International Symposium on Code Generation and Optimization (CGO\u201921) 2\u201314. DOI:10.1109\/CGO51591.2021.9370308","DOI":"10.1109\/CGO51591.2021.9370308"},{"key":"e_1_3_2_17_2","doi-asserted-by":"publisher","unstructured":"E. A. Lee and D. G. Messerschmitt. 1987-01. Static scheduling of synchronous data flow programs for digital signal processing. IEEE Transactions on computers C-36 1 (1987-01) 24\u201335. DOI:10.1109\/TC.1987.5009446","DOI":"10.1109\/TC.1987.5009446"},{"key":"e_1_3_2_18_2","doi-asserted-by":"publisher","unstructured":"Grischa Liebel Nadja Marko Matthias Tichy Andrea Leitner and J\u00f6rgen Hansson. 2018-02-01. Model-based engineering in the embedded systems domain: An industrial survey on the state-of-practice. Software and Systems Modeling 17 1 (2018-02-01) 91\u2013113. DOI:10.1007\/s10270-016-0523-3","DOI":"10.1007\/s10270-016-0523-3"},{"key":"e_1_3_2_19_2","doi-asserted-by":"publisher","DOI":"10.1145\/3444950.3447285"},{"key":"e_1_3_2_20_2","doi-asserted-by":"publisher","DOI":"10.1145\/1639950.1640002"},{"key":"e_1_3_2_21_2","doi-asserted-by":"publisher","unstructured":"S. Mohanty V. K. Prasanna S. Neema and J. Davis. 2002-06. Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation. ACM SIGPLAN Notices 37 7 (2002-06) 18\u201327. DOI:10.1145\/566225.513835Number of pages: 10 Place: New York NY USA Publisher: Association for Computing Machinery tex.issue_date: July 2002.","DOI":"10.1145\/566225.513835"},{"key":"e_1_3_2_22_2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45212-6_19"},{"key":"e_1_3_2_23_2","doi-asserted-by":"publisher","unstructured":"A. D. Pimentel C. Erbas and S. Polstra. 2006-02. A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Transactions on Computers 55 2 (2006-02) 99\u2013112. DOI:10.1109\/TC.2006.16","DOI":"10.1109\/TC.2006.16"},{"key":"e_1_3_2_24_2","doi-asserted-by":"publisher","unstructured":"Andy D. Pimentel. 2017-02. Exploring exploration: A tutorial introduction to embedded systems design space exploration. IEEE Design and Test 34 1 (2017-02) 77\u201390. DOI:10.1109\/MDAT.2016.2626445","DOI":"10.1109\/MDAT.2016.2626445"},{"key":"e_1_3_2_25_2","doi-asserted-by":"publisher","unstructured":"Charles Prud\u2019homme and Jean-Guillaume Fages. 2022. Choco-solver: a java library for constraint programming. Journal of Open Source Software 7 78 (2022) 4708. DOI:10.21105\/joss.04708","DOI":"10.21105\/joss.04708"},{"key":"e_1_3_2_26_2","doi-asserted-by":"publisher","DOI":"10.1145\/3023973.3023977"},{"key":"e_1_3_2_27_2","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2014.339"},{"key":"e_1_3_2_28_2","doi-asserted-by":"publisher","unstructured":"Kathrin Rosvall and Ingo Sander. 2017-11-27. Flexible and tradeoff-aware constraint-based design space exploration for streaming applications on heterogeneous platforms. ACM Transactions on Design Automation of Electronic Systems 23 2 (2017-11-27) 21:1\u201321:26. DOI:10.1145\/3133210","DOI":"10.1145\/3133210"},{"key":"e_1_3_2_29_2","unstructured":"Ingo Sander Ingemar S\u00f6derquist Mats Ekman Rodolfo Jordao Fahimeh Bahrami Rui Chen and Anders \u00c5hlander. 2022. Towards correct-byconstruction design of safety-critical embedded avionics systems. In International Council for Aeronautical Sciences (ICAS\u201922). Vol. 33. Sotckholm."},{"key":"e_1_3_2_30_2","doi-asserted-by":"publisher","unstructured":"Tripti Saxena and Gabor Karsai. 2011-04. A meta-framework for design space exploration. In Proceedings of the 2011 18th IEEE International Conference and Workshops on Engineering of Computer-Based Systems. 71\u201380. DOI:10.1109\/ECBS.2011.21","DOI":"10.1109\/ECBS.2011.21"},{"key":"e_1_3_2_31_2","doi-asserted-by":"publisher","unstructured":"Christian Schneider Miro Sp\u00f6nemann and Reinhard von Hanxleden. 2013-09. Just model! \u2014 Putting automatic synthesis of node-link-diagrams into practice. In Proceedings of the 2013 IEEE Symposium on Visual Languages and Human Centric Computing. 75\u201382. DOI:10.1109\/VLHCC.2013.6645246ISSN: 1943-6106.","DOI":"10.1109\/VLHCC.2013.6645246"},{"key":"e_1_3_2_32_2","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-007-1488-5_4"},{"key":"e_1_3_2_33_2","volume-title":"Embedded Multiprocessors: Scheduling and Synchronization, Second Edition","author":"Sriram Sundararajan","year":"2017","unstructured":"Sundararajan Sriram and Shuvra S. Bhattacharyya. 2017. Embedded Multiprocessors: Scheduling and Synchronization, Second Edition. CRC press. Retrieved from DOI:http:\/\/www.crcnetbase.com\/isbn\/9781315219752"},{"key":"e_1_3_2_34_2","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-017-7267-9_30"},{"key":"e_1_3_2_35_2","doi-asserted-by":"publisher","unstructured":"Sander Stuijk Marc Geilen and Twan Basten. 2006. Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs. In Proceedings of the 43rd Annual Design Automation Conference (DAC\u201906). Association for Computing Machinery New York NY 899\u2013904. DOI:10.1145\/1145\/1146909.1147138","DOI":"10.1145\/1145\/1146909.1147138"},{"key":"e_1_3_2_36_2","doi-asserted-by":"publisher","DOI":"10.1109\/ACSD.2006.23"},{"key":"e_1_3_2_37_2","doi-asserted-by":"publisher","DOI":"10.1109\/FDL.2019.8876905"},{"key":"e_1_3_2_38_2","doi-asserted-by":"publisher","DOI":"10.1109\/IDAACS.2015.7341359"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3647640","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3647640","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T00:03:38Z","timestamp":1750291418000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3647640"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,9,4]]},"references-count":37,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2024,9,30]]}},"alternative-id":["10.1145\/3647640"],"URL":"https:\/\/doi.org\/10.1145\/3647640","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"value":"1084-4309","type":"print"},{"value":"1557-7309","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,9,4]]},"assertion":[{"value":"2023-12-03","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-01-26","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-09-04","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}